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bh=MXlQ6lOSCMrRfDexYW+mQhNyVYQEtLjRSt4eDRpcM/k=; b=b+KzsqjRD5JhSbsMJtejYlD3jIbzC1RoGYRblKZPOZM2n69KCxZ+p7yqxBb/ENe3X9wHY2 NNWvhpIFdrTdy3FYFHSjU/6UGomJgv61iBotzOP9EENHJFI+JPVIjElQ92FAgRoE2zyP2k fwAG0O941dcg3wi/3DuN6BezDfAges0= X-MC-Unique: ruSAmYpfNtKqQX7IrbbMiQ-1 From: David Hildenbrand To: qemu-devel@nongnu.org Subject: [PATCH v4 05/26] s390x/tcg: Simplify vfc64() handling Date: Tue, 8 Jun 2021 11:23:16 +0200 Message-Id: <20210608092337.12221-6-david@redhat.com> In-Reply-To: <20210608092337.12221-1-david@redhat.com> References: <20210608092337.12221-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.2, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Richard Henderson , Laurent Vivier , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Pass the m5 field via simd_data() and don't provide specialized handlers for single-element variants. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 6 --- target/s390x/translate_vx.c.inc | 45 +++++----------- target/s390x/vec_fpu_helper.c | 94 +++++++++------------------------ 3 files changed, 38 insertions(+), 107 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 4788c1ddaf..02a16924a7 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -250,17 +250,11 @@ DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, = ptr, cptr, cptr, env, i32) DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32) DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env= , i32) -DEF_HELPER_FLAGS_5(gvec_vfce64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, en= v, i32) DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32) -DEF_HELPER_5(gvec_vfce64s_cc, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfch64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env= , i32) -DEF_HELPER_FLAGS_5(gvec_vfch64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, en= v, i32) DEF_HELPER_5(gvec_vfch64_cc, void, ptr, cptr, cptr, env, i32) -DEF_HELPER_5(gvec_vfch64s_cc, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, en= v, i32) -DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, e= nv, i32) DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32) -DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.= inc index 280d45bb19..604ae11024 100644 --- a/target/s390x/translate_vx.c.inc +++ b/target/s390x/translate_vx.c.inc @@ -2497,7 +2497,6 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps= *o) const uint8_t fpf =3D get_field(s, m4); const uint8_t m5 =3D get_field(s, m5); const uint8_t m6 =3D get_field(s, m6); - const bool se =3D extract32(m5, 3, 1); const bool cs =3D extract32(m6, 0, 1); gen_helper_gvec_3_ptr *fn; =20 @@ -2506,37 +2505,21 @@ static DisasJumpType op_vfc(DisasContext *s, DisasO= ps *o) return DISAS_NORETURN; } =20 - if (cs) { - switch (s->fields.op2) { - case 0xe8: - fn =3D se ? gen_helper_gvec_vfce64s_cc : gen_helper_gvec_vfce6= 4_cc; - break; - case 0xeb: - fn =3D se ? gen_helper_gvec_vfch64s_cc : gen_helper_gvec_vfch6= 4_cc; - break; - case 0xea: - fn =3D se ? gen_helper_gvec_vfche64s_cc : gen_helper_gvec_vfch= e64_cc; - break; - default: - g_assert_not_reached(); - } - } else { - switch (s->fields.op2) { - case 0xe8: - fn =3D se ? gen_helper_gvec_vfce64s : gen_helper_gvec_vfce64; - break; - case 0xeb: - fn =3D se ? gen_helper_gvec_vfch64s : gen_helper_gvec_vfch64; - break; - case 0xea: - fn =3D se ? gen_helper_gvec_vfche64s : gen_helper_gvec_vfche64; - break; - default: - g_assert_not_reached(); - } + switch (s->fields.op2) { + case 0xe8: + fn =3D cs ? gen_helper_gvec_vfce64_cc : gen_helper_gvec_vfce64; + break; + case 0xeb: + fn =3D cs ? gen_helper_gvec_vfch64_cc : gen_helper_gvec_vfch64; + break; + case 0xea: + fn =3D cs ? gen_helper_gvec_vfche64_cc : gen_helper_gvec_vfche64; + break; + default: + g_assert_not_reached(); } - gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), - get_field(s, v3), cpu_env, 0, fn); + gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3), + cpu_env, m5, fn); if (cs) { set_cc_static(s); } diff --git a/target/s390x/vec_fpu_helper.c b/target/s390x/vec_fpu_helper.c index ab23a597da..01ee41d154 100644 --- a/target/s390x/vec_fpu_helper.c +++ b/target/s390x/vec_fpu_helper.c @@ -239,8 +239,8 @@ static int vfc64(S390Vector *v1, const S390Vector *v2, = const S390Vector *v3, int i; =20 for (i =3D 0; i < 2; i++) { - const float64 a =3D s390_vec_read_element64(v2, i); - const float64 b =3D s390_vec_read_element64(v3, i); + const float64 a =3D s390_vec_read_float64(v2, i); + const float64 b =3D s390_vec_read_float64(v3, i); =20 /* swap the order of the parameters, so we can use existing functi= ons */ if (fn(b, a, &env->fpu_status)) { @@ -261,77 +261,31 @@ static int vfc64(S390Vector *v1, const S390Vector *v2= , const S390Vector *v3, return 3; } =20 -void HELPER(gvec_vfce64)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, false, float64_eq_quiet, GETPC()); -} - -void HELPER(gvec_vfce64s)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, true, float64_eq_quiet, GETPC()); -} - -void HELPER(gvec_vfce64_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, false, float64_eq_quiet, GETPC()= ); -} - -void HELPER(gvec_vfce64s_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, true, float64_eq_quiet, GETPC()); -} - -void HELPER(gvec_vfch64)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, false, float64_lt_quiet, GETPC()); -} - -void HELPER(gvec_vfch64s)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, true, float64_lt_quiet, GETPC()); -} - -void HELPER(gvec_vfch64_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, false, float64_lt_quiet, GETPC()= ); -} - -void HELPER(gvec_vfch64s_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, true, float64_lt_quiet, GETPC()); -} - -void HELPER(gvec_vfche64)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, false, float64_le_quiet, GETPC()); -} - -void HELPER(gvec_vfche64s)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC()); +#define DEF_GVEC_VFC_B(NAME, OP, BITS) = \ +void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, = \ + CPUS390XState *env, uint32_t desc) = \ +{ = \ + const bool se =3D extract32(simd_data(desc), 3, 1); = \ + vfc##BITS##_fn fn =3D float##BITS##_##OP##_quiet; = \ + = \ + vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); = \ +} = \ + = \ +void HELPER(gvec_##NAME##BITS##_cc)(void *v1, const void *v2, const void *= v3, \ + CPUS390XState *env, uint32_t desc) = \ +{ = \ + const bool se =3D extract32(simd_data(desc), 3, 1); = \ + vfc##BITS##_fn fn =3D float##BITS##_##OP##_quiet; = \ + = \ + env->cc_op =3D vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); = \ } =20 -void HELPER(gvec_vfche64_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, false, float64_le_quiet, GETPC()= ); -} +#define DEF_GVEC_VFC(NAME, OP) = \ +DEF_GVEC_VFC_B(NAME, OP, 64) =20 -void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2, const void *v3, - CPUS390XState *env, uint32_t desc) -{ - env->cc_op =3D vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC()); -} +DEF_GVEC_VFC(vfce, eq) +DEF_GVEC_VFC(vfch, lt) +DEF_GVEC_VFC(vfche, le) =20 static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *en= v, bool s, uintptr_t retaddr) --=20 2.31.1