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Thu, 3 Jun 2021 18:22:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708558; bh=j9TUNzCEGVnAmFrOpn95U8c7ggjH9tgYiGBE/L9na0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ktPlR2HlU4CZVOrzXbDTN0G5En/x4gqqu9Hhh37ELw7PH0kJRVSAcNLwW1n5RhYkf i5VN10Bz+uyqMdTiGm3RFFRLVUn1vQ+33kFsi+w4PKF4rSPWNz44PFc/LtrrxatWix I/349Rj7E2A0Je7FF3u04tb1+6TCQghdNorhmHk0= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 30/42] target/ppc: Add infrastructure for prefixed insns Date: Thu, 3 Jun 2021 18:22:19 +1000 Message-Id: <20210603082231.601214-31-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-devel@nongnu.org, Luis Pires , qemu-ppc@nongnu.org, Matheus Ferst , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Luis Pires Signed-off-by: Richard Henderson Signed-off-by: Matheus Ferst Message-Id: <20210601193528.2533031-4-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson --- target/ppc/cpu.h | 1 + target/ppc/insn32.decode | 18 +++++++++++ target/ppc/insn64.decode | 18 +++++++++++ target/ppc/meson.build | 9 ++++++ target/ppc/translate.c | 37 ++++++++++++++++++---- target/ppc/translate/fixedpoint-impl.c.inc | 18 +++++++++++ 6 files changed, 95 insertions(+), 6 deletions(-) create mode 100644 target/ppc/insn32.decode create mode 100644 target/ppc/insn64.decode create mode 100644 target/ppc/translate/fixedpoint-impl.c.inc diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b7ae4902e4..b4de0db7ff 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -144,6 +144,7 @@ enum { POWERPC_EXCP_ALIGN_PROT =3D 0x04, /* Access cross protection bound= ary */ POWERPC_EXCP_ALIGN_BAT =3D 0x05, /* Access cross a BAT/seg bounda= ry */ POWERPC_EXCP_ALIGN_CACHE =3D 0x06, /* Impossible dcbz access = */ + POWERPC_EXCP_ALIGN_INSN =3D 0x07, /* Pref. insn x-ing 64-byte boun= dary */ /* Exception subtypes for POWERPC_EXCP_PROGRAM = */ /* FP exceptions = */ POWERPC_EXCP_FP =3D 0x10, diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode new file mode 100644 index 0000000000..a3a8ae06bf --- /dev/null +++ b/target/ppc/insn32.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 32-bit insns (opcode space 0) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode new file mode 100644 index 0000000000..a38b1f84dc --- /dev/null +++ b/target/ppc/insn64.decode @@ -0,0 +1,18 @@ +# +# Power ISA decode for 64-bit prefixed insns (opcode space 0 and 1) +# +# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see . +# diff --git a/target/ppc/meson.build b/target/ppc/meson.build index a6a53a8d5c..a4f18ff414 100644 --- a/target/ppc/meson.build +++ b/target/ppc/meson.build @@ -20,6 +20,15 @@ ppc_ss.add(when: 'CONFIG_TCG', if_true: files( =20 ppc_ss.add(libdecnumber) =20 +gen =3D [ + decodetree.process('insn32.decode', + extra_args: '--static-decode=3Ddecode_insn32'), + decodetree.process('insn64.decode', + extra_args: ['--static-decode=3Ddecode_insn64', + '--insnwidth=3D64']), +] +ppc_ss.add(gen) + ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('k= vm-stub.c')) ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c')) =20 diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d2c9fd9dd7..f3f464c654 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7690,6 +7690,10 @@ static inline void set_avr64(int regno, TCGv_i64 src= , bool high) # define REQUIRE_64BIT(CTX) REQUIRE_INSNS_FLAGS(CTX, 64B) #endif =20 +#include "decode-insn32.c.inc" +#include "decode-insn64.c.inc" +#include "translate/fixedpoint-impl.c.inc" + #include "translate/fp-impl.c.inc" =20 #include "translate/vmx-impl.c.inc" @@ -8850,11 +8854,18 @@ static bool ppc_tr_breakpoint_check(DisasContextBas= e *dcbase, CPUState *cs, return true; } =20 +static bool is_prefix_insn(DisasContext *ctx, uint32_t insn) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + return opc1(insn) =3D=3D 1; +} + static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx =3D container_of(dcbase, DisasContext, base); PowerPCCPU *cpu =3D POWERPC_CPU(cs); CPUPPCState *env =3D cs->env_ptr; + target_ulong pc; uint32_t insn; bool ok; =20 @@ -8862,18 +8873,32 @@ static void ppc_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cs) LOG_DISAS("nip=3D" TARGET_FMT_lx " super=3D%d ir=3D%d\n", ctx->base.pc_next, ctx->mem_idx, (int)msr_ir); =20 - ctx->cia =3D ctx->base.pc_next; - insn =3D translator_ldl_swap(env, ctx->base.pc_next, need_byteswap(ctx= )); - ctx->base.pc_next +=3D 4; + ctx->cia =3D pc =3D ctx->base.pc_next; + insn =3D translator_ldl_swap(env, pc, need_byteswap(ctx)); + ctx->base.pc_next =3D pc +=3D 4; =20 - ok =3D decode_legacy(cpu, ctx, insn); + if (!is_prefix_insn(ctx, insn)) { + ok =3D (decode_insn32(ctx, insn) || + decode_legacy(cpu, ctx, insn)); + } else if ((pc & 63) =3D=3D 0) { + /* + * Power v3.1, section 1.9 Exceptions: + * attempt to execute a prefixed instruction that crosses a + * 64-byte address boundary (system alignment error). + */ + gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_INSN= ); + ok =3D true; + } else { + uint32_t insn2 =3D translator_ldl_swap(env, pc, need_byteswap(ctx)= ); + ctx->base.pc_next =3D pc +=3D 4; + ok =3D decode_insn64(ctx, deposit64(insn2, 32, 32, insn)); + } if (!ok) { gen_invalid(ctx); } =20 /* End the TB when crossing a page boundary. */ - if (ctx->base.is_jmp =3D=3D DISAS_NEXT && - !(ctx->base.pc_next & ~TARGET_PAGE_MASK)) { + if (ctx->base.is_jmp =3D=3D DISAS_NEXT && !(pc & ~TARGET_PAGE_MASK)) { ctx->base.is_jmp =3D DISAS_TOO_MANY; } =20 diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/transl= ate/fixedpoint-impl.c.inc new file mode 100644 index 0000000000..be75085cee --- /dev/null +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -0,0 +1,18 @@ +/* + * Power ISA decode for Fixed-Point Facility instructions + * + * Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ --=20 2.31.1