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Thu, 3 Jun 2021 18:22:37 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1622708558; bh=7XCyyicopD+KliJrC1vNXiyCbu18JV5HsK9uW6aFv/c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SrxOWavA/bm6+0vdiTDD5QiUhcQCIKb7WCGCuGTJSYJ3un/cxhSv9DVUDzp8CCx/q nHHvzGP4ZoozNg8ym7xJU46TugMmYkoDLZ9S64gdgqlYax8aOVOnX/WlYWPo0OzzO3 PEPEiX8a+nmxd+kLWkXoDylk6NtIS3sMbPmwn5bE= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 25/42] target/ppc: powerpc_excp: Move lpes code to where it is used Date: Thu, 3 Jun 2021 18:22:14 +1000 Message-Id: <20210603082231.601214-26-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210603082231.601214-1-david@gibson.dropbear.id.au> References: <20210603082231.601214-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Fabiano Rosas Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Fabiano Rosas Signed-off-by: Fabiano Rosas Message-Id: <20210601214649.785647-2-farosas@linux.ibm.com> Signed-off-by: David Gibson --- target/ppc/excp_helper.c | 47 +++++++++++++++++++++------------------- 1 file changed, 25 insertions(+), 22 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 04418054f5..5ea8503b46 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -333,7 +333,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int ex= cp_model, int excp) CPUPPCState *env =3D &cpu->env; target_ulong msr, new_msr, vector; int srr0, srr1, asrr0, asrr1, lev =3D -1; - bool lpes0; =20 qemu_log_mask(CPU_LOG_INT, "Raise exception at " TARGET_FMT_lx " =3D> %08x (%02x)\n", env->nip, excp, env->error_code); @@ -365,27 +364,6 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int e= xcp_model, int excp) excp =3D powerpc_reset_wakeup(cs, env, excp, &msr); } =20 - /* - * Exception targeting modifiers - * - * LPES0 is supported on POWER7/8/9 - * LPES1 is not supported (old iSeries mode) - * - * On anything else, we behave as if LPES0 is 1 - * (externals don't alter MSR:HV) - */ -#if defined(TARGET_PPC64) - if (excp_model =3D=3D POWERPC_EXCP_POWER7 || - excp_model =3D=3D POWERPC_EXCP_POWER8 || - excp_model =3D=3D POWERPC_EXCP_POWER9 || - excp_model =3D=3D POWERPC_EXCP_POWER10) { - lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); - } else -#endif /* defined(TARGET_PPC64) */ - { - lpes0 =3D true; - } - /* * Hypervisor emulation assistance interrupt only exists on server * arch 2.05 server or later. We also don't want to generate it if @@ -473,8 +451,32 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int e= xcp_model, int excp) msr |=3D env->error_code; break; case POWERPC_EXCP_EXTERNAL: /* External input = */ + { + bool lpes0; + cs =3D CPU(cpu); =20 + /* + * Exception targeting modifiers + * + * LPES0 is supported on POWER7/8/9 + * LPES1 is not supported (old iSeries mode) + * + * On anything else, we behave as if LPES0 is 1 + * (externals don't alter MSR:HV) + */ +#if defined(TARGET_PPC64) + if (excp_model =3D=3D POWERPC_EXCP_POWER7 || + excp_model =3D=3D POWERPC_EXCP_POWER8 || + excp_model =3D=3D POWERPC_EXCP_POWER9 || + excp_model =3D=3D POWERPC_EXCP_POWER10) { + lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); + } else +#endif /* defined(TARGET_PPC64) */ + { + lpes0 =3D true; + } + if (!lpes0) { new_msr |=3D (target_ulong)MSR_HVB; new_msr |=3D env->msr & ((target_ulong)1 << MSR_RI); @@ -486,6 +488,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int ex= cp_model, int excp) env->spr[SPR_BOOKE_EPR] =3D ldl_phys(cs->as, env->mpic_iack); } break; + } case POWERPC_EXCP_ALIGN: /* Alignment exception = */ /* Get rS/rD and rA from faulting opcode */ /* --=20 2.31.1