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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id g13sm285355pfi.18.2021.05.26.16.47.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 May 2021 16:47:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=i9sjalUJzXMjcjyM8v8NrOBCxoHFCzoZhE1tMS09ZS0=; b=WA4TJgVcUZnGKzQpqnyNs8o55zSoz4EoSFJwsDFyc+9M7G+G7U7Pol9zOwCPI0Qcll 7VW5DTCtdTUwADJVf4L0OgdQE20HDeAAEFeHNU6RZjcJGU7VvtdqZbsKkLIzAyIzSCU+ i2jVEydHwyv2oOdjlbDOPj0g7OJBFvHfnpCFe38YW8WsGnAzY4ZhiTzvHnJO3Bnk3gqR LhhHEZOGUIIbovfKg4bEL6r/JoPLjqBmE5PqncFrZuBesykzRzmJc5YMEDTf/Q4Bxkp7 6O1C/0WkWNEt/KkyW4keL2DEzyY8pRZmBwUDEhJUds39Ik8VSZfrflw6BexlAEzlw/Tq tbCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=i9sjalUJzXMjcjyM8v8NrOBCxoHFCzoZhE1tMS09ZS0=; b=bu9krZ0r9WNvUzcc9bJzzFnsbZpZtawwRrHsnEFQRkb24odKao9UohUZSeVFWdmckT eHVO9s3RZvQFpik3L3MDTgYzjucJabIkcUdfn0rSQW6lAdV9Z1cyjmByB/HDmR6pZ9HR d0KX1n7K7J8wLyqMB+CO9h1PFCZAO0YKSLbyszjtVe+rRrvAncF4ip8rwjh76TPP2Bjn Mushe5+Cy9bKw3MIR6ROCjPW72bVoEwsi1gNj/f3Qo1g6lh6kWQkYZXAIcBYP2Vb6ETp CudO6oRFiKygZ8s8SSpNlzMq7vRIWhV/6mNWcCYoMX8s7rpwgABtdNnbIAUFH4SMqV6v ZyKA== X-Gm-Message-State: AOAM532cM3tFJv2xX/HjzyuHkefC7VZJmNqMJgWUuq5ZS4C+cG+H+Q1v i0XukHO5ATaRnXMwAagZmBVi1KxctIQPjQ== X-Google-Smtp-Source: ABdhPJw4+WG9bSCD1ZDZdc6GZckPEwwqmtZc6oz9FeM4AxFotQF89PkS69WefCRIGyoYnu2oAEXX8A== X-Received: by 2002:a17:90a:1fc1:: with SMTP id z1mr6448560pjz.183.1622072850773; Wed, 26 May 2021 16:47:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 23/31] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps Date: Wed, 26 May 2021 16:47:02 -0700 Message-Id: <20210526234710.125396-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210526234710.125396-1-richard.henderson@linaro.org> References: <20210526234710.125396-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 VirtIO devices are only meaningful with system emulation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20210517105140.1062037-17-f4bug@amsat.org> Signed-off-by: Richard Henderson --- include/hw/core/cpu.h | 5 ----- include/hw/core/sysemu-cpu-ops.h | 9 +++++++++ hw/core/cpu-sysemu.c | 5 +++-- target/arm/cpu.c | 2 +- target/ppc/cpu_init.c | 4 +--- 5 files changed, 14 insertions(+), 11 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c8d4a8a642..dd3f5f996e 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -90,10 +90,6 @@ struct SysemuCPUOps; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. Non-configurab= le - * CPUs can use the default implementation of this method. This method sho= uld - * not be used by any callers other than the pre-1.0 virtio devices. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. @@ -152,7 +148,6 @@ struct CPUClass { =20 int reset_dump_flags; bool (*has_work)(CPUState *cpu); - bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 0370ac1519..8fa98bf2a7 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,15 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @virtio_is_big_endian: Callback to return %true if a CPU which supp= orts + * runtime configurable endianness is currently big-endian. + * Non-configurable CPUs can use the default implementation of this me= thod. + * This method should not be used by any callers other than the pre-1.0 + * virtio devices. + */ + bool (*virtio_is_big_endian)(CPUState *cpu); + /** * @legacy_vmsd: Legacy state for migration. * Do not use in new targets, use #DeviceClass::vmsd ins= tead. diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index aa68ca281e..bad7d2cb01 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/core/cpu.h" +#include "hw/core/sysemu-cpu-ops.h" =20 bool cpu_paging_enabled(const CPUState *cpu) { @@ -126,8 +127,8 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->virtio_is_big_endian) { - return cc->virtio_is_big_endian(cpu); + if (cc->sysemu_ops->virtio_is_big_endian) { + return cc->sysemu_ops->virtio_is_big_endian(cpu); } return target_words_bigendian(); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index bd623a4961..0111201235 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1948,6 +1948,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs) #include "hw/core/sysemu-cpu-ops.h" =20 static const struct SysemuCPUOps arm_sysemu_ops =3D { + .virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian, .legacy_vmsd =3D &vmstate_arm_cpu, }; #endif @@ -1991,7 +1992,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs =3D arm_asidx_from_attrs; - cc->virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian; cc->write_elf64_note =3D arm_cpu_write_elf64_note; cc->write_elf32_note =3D arm_cpu_write_elf32_note; cc->sysemu_ops =3D &arm_sysemu_ops; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 5121f9cfd4..108e0c6580 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -9267,6 +9267,7 @@ static Property ppc_cpu_properties[] =3D { #include "hw/core/sysemu-cpu-ops.h" =20 static const struct SysemuCPUOps ppc_sysemu_ops =3D { + .virtio_is_big_endian =3D ppc_cpu_is_big_endian, .legacy_vmsd =3D &vmstate_ppc_cpu, }; #endif @@ -9335,9 +9336,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void = *data) cc->gdb_core_xml_file =3D "power64-core.xml"; #else cc->gdb_core_xml_file =3D "power-core.xml"; -#endif -#ifndef CONFIG_USER_ONLY - cc->virtio_is_big_endian =3D ppc_cpu_is_big_endian; #endif cc->disas_set_info =3D ppc_disas_set_info; =20 --=20 2.25.1