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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::329; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" A user-mode executable always runs in ring 3. Signed-off-by: Richard Henderson Reviewed-by: Paolo Bonzini Message-Id: <20210514151342.384376-8-richard.henderson@linaro.org> --- target/i386/tcg/translate.c | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 7f3993fccb..4c9194416d 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -94,6 +94,11 @@ typedef struct DisasContext { target_ulong pc; /* pc =3D eip + cs_base */ /* current block context */ target_ulong cs_base; /* base of CS segment */ + +#ifndef CONFIG_USER_ONLY + uint8_t cpl; /* code priv level */ +#endif + int code32; /* 32 bit code segment */ #ifdef TARGET_X86_64 int lma; /* long mode active */ @@ -111,7 +116,6 @@ typedef struct DisasContext { int addseg; /* non zero if either DS/ES/SS have a non zero base */ int f_st; /* currently unused */ int vm86; /* vm86 mode */ - int cpl; int iopl; int tf; /* TF cpu flag */ int jmp_opt; /* use direct block chaining for direct jumps */ @@ -148,8 +152,10 @@ typedef struct DisasContext { /* The environment in which user-only runs is constrained. */ #ifdef CONFIG_USER_ONLY #define PE(S) true +#define CPL(S) 3 #else #define PE(S) (((S)->flags & HF_PE_MASK) !=3D 0) +#define CPL(S) ((S)->cpl) #endif =20 static void gen_eob(DisasContext *s); @@ -623,7 +629,7 @@ static void gen_check_io(DisasContext *s, MemOp ot, tar= get_ulong cur_eip, { target_ulong next_eip; =20 - if (PE(s) && (s->cpl > s->iopl || s->vm86)) { + if (PE(s) && (CPL(s) > s->iopl || s->vm86)) { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); switch (ot) { case MO_8: @@ -1291,7 +1297,7 @@ static void gen_exception_gpf(DisasContext *s) /* Check for cpl =3D=3D 0; if not, raise #GP and return false. */ static bool check_cpl0(DisasContext *s) { - if (s->cpl =3D=3D 0) { + if (CPL(s) =3D=3D 0) { return true; } gen_exception_gpf(s); @@ -1311,7 +1317,7 @@ static bool check_vm86_iopl(DisasContext *s) /* Check for iopl allowing access; if not, raise #GP and return false. */ static bool check_iopl(DisasContext *s) { - if (s->vm86 ? s->iopl =3D=3D 3 : s->cpl <=3D s->iopl) { + if (s->vm86 ? s->iopl =3D=3D 3 : CPL(s) <=3D s->iopl) { return true; } gen_exception_gpf(s); @@ -6735,7 +6741,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF); if (check_vm86_iopl(s)) { ot =3D gen_pop_T0(s); - if (s->cpl =3D=3D 0) { + if (CPL(s) =3D=3D 0) { if (dflag !=3D MO_16) { gen_helper_write_eflags(cpu_env, s->T0, tcg_const_i32((TF_MASK | AC_MA= SK | @@ -6750,7 +6756,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) & 0xffff)); } } else { - if (s->cpl <=3D s->iopl) { + if (CPL(s) <=3D s->iopl) { if (dflag !=3D MO_16) { gen_helper_write_eflags(cpu_env, s->T0, tcg_const_i32((TF_MASK | @@ -7380,7 +7386,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) break; =20 case 0xc8: /* monitor */ - if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || s->cpl != =3D 0) { + if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || CPL(s) != =3D 0) { goto illegal_op; } gen_update_cc_op(s); @@ -7392,7 +7398,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) break; =20 case 0xc9: /* mwait */ - if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || s->cpl != =3D 0) { + if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || CPL(s) != =3D 0) { goto illegal_op; } gen_update_cc_op(s); @@ -7403,7 +7409,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) =20 case 0xca: /* clac */ if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_SMAP) - || s->cpl !=3D 0) { + || CPL(s) !=3D 0) { goto illegal_op; } gen_helper_clac(cpu_env); @@ -7413,7 +7419,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) =20 case 0xcb: /* stac */ if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_SMAP) - || s->cpl !=3D 0) { + || CPL(s) !=3D 0) { goto illegal_op; } gen_helper_stac(cpu_env); @@ -8467,19 +8473,23 @@ static void i386_tr_init_disas_context(DisasContext= Base *dcbase, CPUState *cpu) DisasContext *dc =3D container_of(dcbase, DisasContext, base); CPUX86State *env =3D cpu->env_ptr; uint32_t flags =3D dc->base.tb->flags; + int cpl =3D (flags >> HF_CPL_SHIFT) & 3; =20 dc->cs_base =3D dc->base.tb->cs_base; dc->flags =3D flags; +#ifndef CONFIG_USER_ONLY + dc->cpl =3D cpl; +#endif =20 /* We make some simplifying assumptions; validate they're correct. */ g_assert(PE(dc) =3D=3D ((flags & HF_PE_MASK) !=3D 0)); + g_assert(CPL(dc) =3D=3D cpl); =20 dc->code32 =3D (flags >> HF_CS32_SHIFT) & 1; dc->ss32 =3D (flags >> HF_SS32_SHIFT) & 1; dc->addseg =3D (flags >> HF_ADDSEG_SHIFT) & 1; dc->f_st =3D 0; dc->vm86 =3D (flags >> VM_SHIFT) & 1; - dc->cpl =3D (flags >> HF_CPL_SHIFT) & 3; dc->iopl =3D (flags >> IOPL_SHIFT) & 3; dc->tf =3D (flags >> TF_SHIFT) & 1; dc->cc_op =3D CC_OP_DYNAMIC; --=20 2.25.1