From nobody Tue May 14 17:04:59 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1621434900; cv=none; d=zohomail.com; s=zohoarc; b=i87rchAaOGlTp6ZGK2k6YlI0/9RUJWZBwSLk7gFe7Z65s1z/kkZrcv/ExK0b+un4Mt5s0B7cINUkTgby22dX3xa0DIAiQxf4GuWpum0TyRm5k3iNU/SjQ+dUaWPh9zVqonchFfpOo7EAO4X2RgEL2WPt08VJL9n/DKBYb/4nEVM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621434900; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=OyyDPeGwFo80rQcY5mIhmTjT4y7LtvrJ33u39/4USdg=; b=SpSYZlr/QNQaGEMewfX7T3AbnpTAVCL21e4ORMXqRm98y2UBlSnHErje2SdV0rk8wtmPGDMF3jWt8sANAV+zGZMD2Yji3P9PCRBEggCSBUZjGdoQxXCE9fLdGIpQG49OWBtuVn4xN6As9wGoMI8P/3JiXNK95/tJFoTIS9DLoq8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1621434900024860.9713165649346; Wed, 19 May 2021 07:35:00 -0700 (PDT) Received: from localhost ([::1]:54974 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljNHn-0001de-93 for importer@patchew.org; Wed, 19 May 2021 10:34:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57406) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCd-0000gK-Ht for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:39 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:37852 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCY-0008Iy-CS for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:39 -0400 Received: from host217-39-58-213.range217-39.btcentralplus.com ([217.39.58.213] helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ljNCR-0003Tz-Ny; Wed, 19 May 2021 15:29:31 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, laurent@vivier.eu Date: Wed, 19 May 2021 15:29:14 +0100 Message-Id: <20210519142917.16693-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> References: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 217.39.58.213 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 1/4] target/m68k: introduce is_singlestepping() function X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The m68k translator currently checks the DisasContextBase singlestep_enabled boolean directly to determine whether to single-step execution. Soon single-stepping may also be triggered by setting the appropriate bits in the SR register so centralise the check into a single is_singlestepping() function. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/m68k/translate.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 200018ae6a..c774f2e8f0 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -194,6 +194,17 @@ static void do_writebacks(DisasContext *s) } } =20 +static bool is_singlestepping(DisasContext *s) +{ + /* + * Return true if we are singlestepping either because of QEMU gdbstub + * singlestep. This does not include the command line '-singlestep' mo= de + * which is rather misnamed as it only means "one instruction per TB" = and + * doesn't affect the code we generate. + */ + return s->base.singlestep_enabled; +} + /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically= */ #define DISAS_EXIT DISAS_TARGET_1 /* cpu state was modified dynamical= ly */ @@ -1506,7 +1517,7 @@ static inline bool use_goto_tb(DisasContext *s, uint3= 2_t dest) /* Generate a jump to an immediate address. */ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) { - if (unlikely(s->base.singlestep_enabled)) { + if (unlikely(is_singlestepping(s))) { gen_exception(s, dest, EXCP_DEBUG); } else if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(n); @@ -6245,7 +6256,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) break; case DISAS_TOO_MANY: update_cc_op(dc); - if (dc->base.singlestep_enabled) { + if (is_singlestepping(dc)) { tcg_gen_movi_i32(QREG_PC, dc->pc); gen_raise_exception(EXCP_DEBUG); } else { @@ -6254,7 +6265,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) break; case DISAS_JUMP: /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ - if (dc->base.singlestep_enabled) { + if (is_singlestepping(dc)) { gen_raise_exception(EXCP_DEBUG); } else { tcg_gen_lookup_and_goto_ptr(); @@ -6265,7 +6276,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) * We updated CC_OP and PC in gen_exit_tb, but also modified * other state that may require returning to the main loop. */ - if (dc->base.singlestep_enabled) { + if (is_singlestepping(dc)) { gen_raise_exception(EXCP_DEBUG); } else { tcg_gen_exit_tb(NULL, 0); --=20 2.20.1 From nobody Tue May 14 17:04:59 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; 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Wed, 19 May 2021 07:33:28 -0700 (PDT) Received: from localhost ([::1]:48402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljNGJ-0005fI-RM for importer@patchew.org; Wed, 19 May 2021 10:33:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57392) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCc-0000eb-VT for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:38 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:37856 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCY-0008J2-Df for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:38 -0400 Received: from host217-39-58-213.range217-39.btcentralplus.com ([217.39.58.213] helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ljNCV-0003Tz-VL; Wed, 19 May 2021 15:29:32 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, laurent@vivier.eu Date: Wed, 19 May 2021 15:29:15 +0100 Message-Id: <20210519142917.16693-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> References: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 217.39.58.213 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 2/4] target/m68k: call gen_raise_exception() directly if single-stepping in gen_jmp_tb() X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In order to consolidate the single-step exception handling into a single helper, change gen_jmp_tb() so that it calls gen_raise_exception() directly instead of gen_exception(). This ensures that all single-step exceptions are now handled directly by gen_raise_exception(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/m68k/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index c774f2e8f0..f14ecab5a5 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1518,7 +1518,9 @@ static inline bool use_goto_tb(DisasContext *s, uint3= 2_t dest) static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) { if (unlikely(is_singlestepping(s))) { - gen_exception(s, dest, EXCP_DEBUG); + update_cc_op(s); + tcg_gen_movi_i32(QREG_PC, dest); + gen_raise_exception(EXCP_DEBUG); } else if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(n); tcg_gen_movi_i32(QREG_PC, dest); --=20 2.20.1 From nobody Tue May 14 17:04:59 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1621434879; cv=none; d=zohomail.com; s=zohoarc; b=HnQ3br9n5KfqninSK1GBG0aWElVERPY0Y9iWiIMWLLLGLW0/tLf/VW4AM4tR7RLRw+HOP3Tt/wSpbd8G6eXTSRihd5WwLwdqKq1WPRSG80fA91IabeDLw2a1GK0CaO/oXc1HgootagbANM22jzdaYUBVN3qJFMF0CIpLf9T65bw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621434879; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=DVNOOoiXH8rzjxC5LmWqE/y4XphHixEdv0Gt+Lb459Y=; b=CwPzwXMT0LkGAmO/tvuEIdZaMASecOvLS2EFTl8jtbikY+XYeFSanJbA0OcI13IJ1zkO8ZVqq57K/coIxfzJFV1n9nWTLGd0y2i79dRuqIJ5gusivu9vC73evrVCQX+SfVS2yhUnvKW5Sd5IXddYoq5PADeqKLynUbJ55xRAVKg= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1621434879445654.3040668994563; Wed, 19 May 2021 07:34:39 -0700 (PDT) Received: from localhost ([::1]:53616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljNHS-0000kF-L9 for importer@patchew.org; Wed, 19 May 2021 10:34:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57432) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCe-0000iW-EN for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:40 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:37862 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCY-0008Je-Dl for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:40 -0400 Received: from host217-39-58-213.range217-39.btcentralplus.com ([217.39.58.213] helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ljNCW-0003Tz-A8; Wed, 19 May 2021 15:29:32 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, laurent@vivier.eu Date: Wed, 19 May 2021 15:29:16 +0100 Message-Id: <20210519142917.16693-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> References: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 217.39.58.213 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 3/4] target/m68k: introduce gen_singlestep_exception() function X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Introduce a new gen_singlestep_exception() function to be called when gener= ating the EXCP_DEBUG exception in single-step mode rather than calling gen_raise_exception(EXCP_DEBUG) directly. This allows for the single-step exception behaviour for all callers to be managed in a single place. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/m68k/translate.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index f14ecab5a5..10e8aba42e 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -319,6 +319,15 @@ static void gen_exception(DisasContext *s, uint32_t de= st, int nr) s->base.is_jmp =3D DISAS_NORETURN; } =20 +static void gen_singlestep_exception(DisasContext *s) +{ + /* + * Generate the right kind of exception for singlestep, which is + * EXCP_DEBUG for QEMU's gdb singlestepping. + */ + gen_raise_exception(EXCP_DEBUG); +} + static inline void gen_addr_fault(DisasContext *s) { gen_exception(s, s->base.pc_next, EXCP_ADDRESS); @@ -1520,7 +1529,7 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32= _t dest) if (unlikely(is_singlestepping(s))) { update_cc_op(s); tcg_gen_movi_i32(QREG_PC, dest); - gen_raise_exception(EXCP_DEBUG); + gen_singlestep_exception(s); } else if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(n); tcg_gen_movi_i32(QREG_PC, dest); @@ -6260,7 +6269,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) update_cc_op(dc); if (is_singlestepping(dc)) { tcg_gen_movi_i32(QREG_PC, dc->pc); - gen_raise_exception(EXCP_DEBUG); + gen_singlestep_exception(dc); } else { gen_jmp_tb(dc, 0, dc->pc); } @@ -6268,7 +6277,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) case DISAS_JUMP: /* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */ if (is_singlestepping(dc)) { - gen_raise_exception(EXCP_DEBUG); + gen_singlestep_exception(dc); } else { tcg_gen_lookup_and_goto_ptr(); } @@ -6279,7 +6288,7 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cpu) * other state that may require returning to the main loop. */ if (is_singlestepping(dc)) { - gen_raise_exception(EXCP_DEBUG); + gen_singlestep_exception(dc); } else { tcg_gen_exit_tb(NULL, 0); } --=20 2.20.1 From nobody Tue May 14 17:04:59 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Wed, 19 May 2021 07:36:46 -0700 (PDT) Received: from localhost ([::1]:58242 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljNJV-0003vK-Cb for importer@patchew.org; Wed, 19 May 2021 10:36:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57436) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCe-0000j4-LP for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:40 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:37868 helo=mail.default.ilande.bv.iomart.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljNCY-0008Jz-SZ for qemu-devel@nongnu.org; Wed, 19 May 2021 10:29:40 -0400 Received: from host217-39-58-213.range217-39.btcentralplus.com ([217.39.58.213] helo=kentang.home) by mail.default.ilande.bv.iomart.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1ljNCW-0003Tz-Kz; Wed, 19 May 2021 15:29:32 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, laurent@vivier.eu Date: Wed, 19 May 2021 15:29:17 +0100 Message-Id: <20210519142917.16693-5-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> References: <20210519142917.16693-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 217.39.58.213 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH 4/4] target/m68k: implement m68k "any instruction" trace mode X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.bv.iomart.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.bv.iomart.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The m68k trace mode is controlled by the top 2 bits in the SR register. Imp= lement the m68k "any instruction" trace mode where bit T1=3D1 and bit T0=3D0 in wh= ich the CPU generates an EXCP_TRACE exception (vector 9 or offset 0x24) after executing= each instruction. This functionality is used by the NetBSD kernel debugger to allow single-st= epping on m68k architectures. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson --- target/m68k/cpu.h | 8 ++++++++ target/m68k/translate.c | 27 ++++++++++++++++++++------- 2 files changed, 28 insertions(+), 7 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 402c86c876..997d588911 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -230,6 +230,9 @@ typedef enum { #define SR_T_SHIFT 14 #define SR_T 0xc000 =20 +#define M68K_SR_TRACE(sr) ((sr & SR_T) >> SR_T_SHIFT) +#define M68K_SR_TRACE_ANY_INS 0x2 + #define M68K_SSP 0 #define M68K_USP 1 #define M68K_ISP 2 @@ -590,6 +593,8 @@ typedef M68kCPU ArchCPU; #define TB_FLAGS_SFC_S (1 << TB_FLAGS_SFC_S_BIT) #define TB_FLAGS_DFC_S_BIT 15 #define TB_FLAGS_DFC_S (1 << TB_FLAGS_DFC_S_BIT) +#define TB_FLAGS_TRACE 16 +#define TB_FLAGS_TRACE_BIT (1 << TB_FLAGS_TRACE) =20 static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *p= c, target_ulong *cs_base, uint32_t *f= lags) @@ -602,6 +607,9 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *e= nv, target_ulong *pc, *flags |=3D (env->sfc << (TB_FLAGS_SFC_S_BIT - 2)) & TB_FLAGS_SFC_= S; *flags |=3D (env->dfc << (TB_FLAGS_DFC_S_BIT - 2)) & TB_FLAGS_DFC_= S; } + if (M68K_SR_TRACE(env->sr) =3D=3D M68K_SR_TRACE_ANY_INS) { + *flags |=3D TB_FLAGS_TRACE; + } } =20 void dump_mmu(CPUM68KState *env); diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 10e8aba42e..f0c5bf9154 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -124,6 +124,7 @@ typedef struct DisasContext { #define MAX_TO_RELEASE 8 int release_count; TCGv release[MAX_TO_RELEASE]; + bool ss_active; } DisasContext; =20 static void init_release_array(DisasContext *s) @@ -197,12 +198,13 @@ static void do_writebacks(DisasContext *s) static bool is_singlestepping(DisasContext *s) { /* - * Return true if we are singlestepping either because of QEMU gdbstub - * singlestep. This does not include the command line '-singlestep' mo= de - * which is rather misnamed as it only means "one instruction per TB" = and - * doesn't affect the code we generate. + * Return true if we are singlestepping either because of + * architectural singlestep or QEMU gdbstub singlestep. This does + * not include the command line '-singlestep' mode which is rather + * misnamed as it only means "one instruction per TB" and doesn't + * affect the code we generate. */ - return s->base.singlestep_enabled; + return s->base.singlestep_enabled || s->ss_active; } =20 /* is_jmp field values */ @@ -323,9 +325,14 @@ static void gen_singlestep_exception(DisasContext *s) { /* * Generate the right kind of exception for singlestep, which is - * EXCP_DEBUG for QEMU's gdb singlestepping. + * either the architectural singlestep or EXCP_DEBUG for QEMU's + * gdb singlestepping. */ - gen_raise_exception(EXCP_DEBUG); + if (s->ss_active) { + gen_raise_exception(EXCP_TRACE); + } else { + gen_raise_exception(EXCP_DEBUG); + } } =20 static inline void gen_addr_fault(DisasContext *s) @@ -6194,6 +6201,12 @@ static void m68k_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cpu) dc->done_mac =3D 0; dc->writeback_mask =3D 0; init_release_array(dc); + + dc->ss_active =3D (M68K_SR_TRACE(env->sr) =3D=3D M68K_SR_TRACE_ANY_INS= ); + /* If architectural single step active, limit to 1 */ + if (is_singlestepping(dc)) { + dc->base.max_insns =3D 1; + } } =20 static void m68k_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) --=20 2.20.1