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[83.51.215.31]) by smtp.gmail.com with ESMTPSA id q20sm23081179wmq.2.2021.05.17.03.53.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 03:53:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R6/9QXNVBtIBcMma+2nqCStG6/fu3uxJQHcr+W0fUdE=; b=ZsQiE3adxKjkMl8HQS0AjOQd3J/uyyKqnWzW/XIlOiT1yRvgfrJTtspozLz+cyCQSq Hu9Hppfy7YL7zMN/ZjRsR9snKAP29YZfeK2TXo6F9MDGfNDGpTZJq8/DjnusD3/ZZ1Qn iOtFgsFC4Jz96M1KXd/I5fVJTztvYVN+c3QcUDb6icqyvPSLXLNYZienKlDTlRGiKLhw EXmIc5aJVyt5eSgzhrao8DTyhqVpOc4ZTxUbYthbegZpgO65zMfG0MjCvRyz0s0Fyeqy zxjl9cKX3+v9gM/FGdMF67RuC3LWQUYNyYacoFHZBhb6YrhyMtUVM/ud1BwVgLUXweGL E9MA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=R6/9QXNVBtIBcMma+2nqCStG6/fu3uxJQHcr+W0fUdE=; b=irKy0XNN9f7xVP/xJWtGSo+2yyI7ZjsfdwUxv5EWKrf+EhNbDLLfyAAoGMDIffLSIh UaIRejf37v9zjb6lM1LuYw0UOXrfjPWhsG3O6Cv0dPaz06817cHBB/tROuj9P3pvtfMU UEDW3XG5NSUE58VCc/K+mFHTXG9RrvhgKs4/qf/hQle8MwMOyFb5cT9TkiCvBtsdn1MC sxh44hsdrjDScvIJyhxQTyN++0TSqG6DCCS7puh5Joe3jD2Lh842r/WI9sdFfv8t9VXe CnGnlMOtNqOLlzzGB1V+LC3GjpCu5QLcR6mYP6HF9KMECRCuG+HOnWsFyC7+lBZ3DRZ1 0foA== X-Gm-Message-State: AOAM533IjsStMMjIKmEPHGEcBN/tvgTOvPMxwnZd/BP2/twVuGzoj+RK m0E6h8iEVOC+vI2vWVRwkhQ= X-Google-Smtp-Source: ABdhPJwGjqFRy0Hel78NABTweEgXOFV/zZ5Z+Mw8L6eGW+9PKUr1f/mlk0NafvqVK3dPTsEvts0lyw== X-Received: by 2002:adf:ee44:: with SMTP id w4mr28902496wro.415.1621248809517; Mon, 17 May 2021 03:53:29 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-arm@nongnu.org, Laurent Vivier , Paolo Bonzini , qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v7 22/23] cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps Date: Mon, 17 May 2021 12:51:39 +0200 Message-Id: <20210517105140.1062037-23-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org> References: <20210517105140.1062037-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 2 -- include/hw/core/sysemu-cpu-ops.h | 4 ++++ hw/core/cpu-sysemu.c | 4 ++-- target/i386/cpu.c | 4 +++- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c95fc76064d..45fb543c291 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -93,7 +93,6 @@ struct AccelCPUClass; * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. - * @get_paging_enabled: Callback for inquiring whether paging is enabled. * @set_pc: Callback for setting the Program Counter register. This * should have the semantics used by the target architecture when * setting the PC from a source such as an ELF file entry point; @@ -136,7 +135,6 @@ struct CPUClass { void (*dump_state)(CPUState *cpu, FILE *, int flags); void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); - bool (*get_paging_enabled)(const CPUState *cpu); void (*set_pc)(CPUState *cpu, vaddr value); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 959523315ba..554af5bebe9 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -21,6 +21,10 @@ typedef struct SysemuCPUOps { */ void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); + /** + * @get_paging_enabled: Callback for inquiring whether paging is enabl= ed. + */ + bool (*get_paging_enabled)(const CPUState *cpu); /** * @get_phys_page_debug: Callback for obtaining a physical address. */ diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index 3850fcb27f0..00253f89293 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -27,8 +27,8 @@ bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->get_paging_enabled) { - return cc->get_paging_enabled(cpu); + if (cc->sysemu_ops->get_paging_enabled) { + return cc->sysemu_ops->get_paging_enabled(cpu); } =20 return false; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 26640d9cacf..839b9d9f8b2 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6485,12 +6485,14 @@ static int64_t x86_cpu_get_arch_id(CPUState *cs) return cpu->apic_id; } =20 +#if !defined(CONFIG_USER_ONLY) static bool x86_cpu_get_paging_enabled(const CPUState *cs) { X86CPU *cpu =3D X86_CPU(cs); =20 return cpu->env.cr[0] & CR0_PG_MASK; } +#endif /* !CONFIG_USER_ONLY */ =20 static void x86_cpu_set_pc(CPUState *cs, vaddr value) { @@ -6717,6 +6719,7 @@ static Property x86_cpu_properties[] =3D { #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps i386_sysemu_ops =3D { .get_memory_mapping =3D x86_cpu_get_memory_mapping, + .get_paging_enabled =3D x86_cpu_get_paging_enabled, .get_phys_page_attrs_debug =3D x86_cpu_get_phys_page_attrs_debug, .asidx_from_attrs =3D x86_asidx_from_attrs, .get_crash_info =3D x86_cpu_get_crash_info, @@ -6752,7 +6755,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->gdb_read_register =3D x86_cpu_gdb_read_register; cc->gdb_write_register =3D x86_cpu_gdb_write_register; cc->get_arch_id =3D x86_cpu_get_arch_id; - cc->get_paging_enabled =3D x86_cpu_get_paging_enabled; =20 #ifndef CONFIG_USER_ONLY cc->sysemu_ops =3D &i386_sysemu_ops; --=20 2.26.3