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[83.51.215.31]) by smtp.gmail.com with ESMTPSA id f4sm17426570wrz.33.2021.05.17.03.52.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 03:53:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=63onU3fEYl+uRL/ePx949VTfyQdXHEiC6uRm6+a0hK8=; b=KaoKdbeif/Ibc1q3jebyXE+kfjBYxefCHMKFCfVGN7ZWvalO9bzRVDCahiWZlgIOlY jp86O9+9tTtKOb8jAsNJuOhuqVI2IZB66vA0KIAizRxF3puxmXlzkdjbCEt5KwT3inG3 KSaayB1T/OhtY04TY7HhUrPr7Tud4N1dSqIueRUnz4CCCTfJpTHea75DoIv/KeXNNBft /dE7HBHuLc3iTKJlnWPk0zNDfcV+XBwafO57ai1rCMvAYXUepVEwJXhLuNB6fffhVAwn h2D7E2mh6RJs/XEMpHNPQGYp5bUqZNg3V+awER0EsvBfm7NROsRvwfBlUY3Y/E/irf7h 2KrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=63onU3fEYl+uRL/ePx949VTfyQdXHEiC6uRm6+a0hK8=; b=VtMKw1gqWTK87vR2mwhQtBa1YevVn8+T8HlcQeuPL3+jFqqlAFUqRxUprJPOz488tV aoSsb98snxi3KehqAk5TZDOeL/KBlm3lUNQhnVT88BTYQhyK0CD98sbgisR3AcGMz6Ni PQdFhwfdIgAChWliquICogZcXNo7y567R8TFlYYBJr6XA6PJCHtSWn4HcrId7iSBPrZj 0VXcZ3IUSt3tGi5u2H1EppFJi/xieX2bMf3M83BwKGyg8h0tJ7lgRKYK6KSrDhNzLUKV R5P7lapP7No9S5PBh7eaM311FF9e6SJyzWQgwgzjNY3XySRJjo85IQ0dpn03Z232LcBY 2CNA== X-Gm-Message-State: AOAM533h4cW+RkGiQjbnruAyH/CjP0Nd4fnRywV75xlQ9RuipC66sRYP DmW2S4iSFcWoLZBLg5TIleE= X-Google-Smtp-Source: ABdhPJwxzxTtvDIXAOW55WeFxDVgptFoXz1U/8jWr+4SXApU3E7rkOkXDelW/laOysP7uSBEUhFGwg== X-Received: by 2002:adf:fb87:: with SMTP id a7mr74184247wrr.58.1621248780538; Mon, 17 May 2021 03:53:00 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-arm@nongnu.org, Laurent Vivier , Paolo Bonzini , qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v7 16/23] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps Date: Mon, 17 May 2021 12:51:33 +0200 Message-Id: <20210517105140.1062037-17-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org> References: <20210517105140.1062037-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) VirtIO devices are only meaningful with system emulation. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 5 ----- include/hw/core/sysemu-cpu-ops.h | 9 +++++++++ hw/core/cpu-sysemu.c | 5 +++-- target/arm/cpu.c | 2 +- target/ppc/translate_init.c.inc | 4 +--- 5 files changed, 14 insertions(+), 11 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 8e4f0662eb5..1b7e815c871 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -89,10 +89,6 @@ struct AccelCPUClass; * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. - * @virtio_is_big_endian: Callback to return %true if a CPU which supports - * runtime configurable endianness is currently big-endian. Non-configurab= le - * CPUs can use the default implementation of this method. This method sho= uld - * not be used by any callers other than the pre-1.0 virtio devices. * @memory_rw_debug: Callback for GDB memory access. * @dump_state: Callback for dumping state. * @dump_statistics: Callback for dumping statistics. @@ -151,7 +147,6 @@ struct CPUClass { =20 int reset_dump_flags; bool (*has_work)(CPUState *cpu); - bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); void (*dump_state)(CPUState *cpu, FILE *, int flags); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 0370ac15196..ed212085f89 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,15 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @virtio_is_big_endian: Callback to return %true if a CPU which supp= orts + * runtime configurable endianness is currently big-endian. + * Non-configurable CPUs can use the default implementation of this me= thod. + * This method should not be used by any callers other than the pre-1.0 + * virtio devices. + */ + bool (*virtio_is_big_endian)(CPUState *cpu); + /** * @legacy_vmsd: Legacy state for migration. * Do not use in new targets, use #DeviceClass::vmsd ins= tead. diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index aa68ca281e8..bad7d2cb016 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/core/cpu.h" +#include "hw/core/sysemu-cpu-ops.h" =20 bool cpu_paging_enabled(const CPUState *cpu) { @@ -126,8 +127,8 @@ bool cpu_virtio_is_big_endian(CPUState *cpu) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->virtio_is_big_endian) { - return cc->virtio_is_big_endian(cpu); + if (cc->sysemu_ops->virtio_is_big_endian) { + return cc->sysemu_ops->virtio_is_big_endian(cpu); } return target_words_bigendian(); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 0a104cec633..9100947905a 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1944,6 +1944,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs) =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps arm_sysemu_ops =3D { + .virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian, .legacy_vmsd =3D &vmstate_arm_cpu, }; #endif @@ -1987,7 +1988,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs =3D arm_asidx_from_attrs; - cc->virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian; cc->write_elf64_note =3D arm_cpu_write_elf64_note; cc->write_elf32_note =3D arm_cpu_write_elf32_note; cc->sysemu_ops =3D &arm_sysemu_ops; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.= inc index 9f20cdb569b..73e859ea0d3 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10239,6 +10239,7 @@ static Property ppc_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps ppc_sysemu_ops =3D { + .virtio_is_big_endian =3D ppc_cpu_is_big_endian, .legacy_vmsd =3D &vmstate_ppc_cpu, }; #endif @@ -10307,9 +10308,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) cc->gdb_core_xml_file =3D "power64-core.xml"; #else cc->gdb_core_xml_file =3D "power-core.xml"; -#endif -#ifndef CONFIG_USER_ONLY - cc->virtio_is_big_endian =3D ppc_cpu_is_big_endian; #endif cc->disas_set_info =3D ppc_disas_set_info; =20 --=20 2.26.3