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[83.51.215.31]) by smtp.gmail.com with ESMTPSA id v12sm18894444wrv.76.2021.05.17.03.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 May 2021 03:52:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=J3KkyeAHowjlEzex1WLthgPCVr0R+I2QlAwoz2UGp0U=; b=k72uOhN3De4XB0RFeJSsYEv20VpS2bwY/EgWxdrqyk0hFb/o6y5KKN2WjLmgI6hRqQ 1SXixgRr2my9rAsxUftcur++udG4Yd3EHw5J7PWb8r/NJv4JMPRhNnW3bYj0/U6lWHM3 As//QVnAeNyn8JBhSB+PRbQCIwzb/NeS7kQ0R9rwh6DPdWWk3Ly0stfYCL1mpU8h1hzj t8djT6xKzNtzcr2N/Ij01FpfC8sbgMA6CrsqImVTroK9ZLihY3iggqNym9p8ZfARswsJ MPt/NzvMRtU9PZb3YZaUhMcfdWiKI1lNx7vZyBALrjDrEENXpDxSLZOI2evxFz4uWGyE 7vcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=J3KkyeAHowjlEzex1WLthgPCVr0R+I2QlAwoz2UGp0U=; b=ZyEl/L2sryjHts+/lxdVsG9MlPK//LOGL8bFjzb3SnBc2TRCer0nglV+J9rS1+Fng5 o3jSxNVXwcZ+433yyKYvQhyYqlO0ro2S9qTS3v/88InnxY4rCzk9+RMvF5YcCl4MzgxI QBveWk/wnlQEQE7wLxRupePDfpwWx0ItQ0EHQHJYAG1pinUC9u1Rw54x2LWnISn/RQLZ sHjRTQAXHeCtuJ446K+TsvB1ofTXCPxRBfGyNLd7ZCykF7JQz8QMjrWpqmu2rn6m6fi8 4aCbjAoi5ZmA4UQFXYqcuqEhqCt2nAvTAQ3oavsVdCj9GG1tBeB4RXFthPl18ue7LEoR +ysw== X-Gm-Message-State: AOAM530WeYIWGeJbbt/vBLy1tFp1DE8rdfIfCVntU2adMoCWZ76IhVGG 4jCFIqSXYB+18csibgpIdfc= X-Google-Smtp-Source: ABdhPJzbve7Elmdz0zpUPEI3D7THwAgrpv6jYPvYg1YlosjUEqQwkDmR0R2QN4VmFej+fbuI4vMhFQ== X-Received: by 2002:a7b:c206:: with SMTP id x6mr22680958wmi.72.1621248775774; Mon, 17 May 2021 03:52:55 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-arm@nongnu.org, Laurent Vivier , Paolo Bonzini , qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v7 15/23] cpu: Move CPUClass::vmsd to SysemuCPUOps Date: Mon, 17 May 2021 12:51:32 +0200 Message-Id: <20210517105140.1062037-16-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org> References: <20210517105140.1062037-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Migration is specific to system emulation. - Move the CPUClass::vmsd field to SysemuCPUOps, - restrict VMSTATE_CPU() macro to sysemu, - vmstate_dummy is now unused, remove it. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 8 ++------ include/hw/core/sysemu-cpu-ops.h | 6 ++++++ include/migration/vmstate.h | 2 -- cpu.c | 15 +++++++-------- stubs/vmstate.c | 2 -- target/arm/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/riscv/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sparc/cpu.c | 2 +- target/ppc/translate_init.c.inc | 2 +- 12 files changed, 22 insertions(+), 25 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index da55d310d4b..8e4f0662eb5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -124,8 +124,6 @@ struct AccelCPUClass; * 32-bit VM coredump. * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF * note to a 32-bit VM coredump. - * @legacy_vmsd: Legacy state description for migration. - * Do not use in new targets, use #DeviceClass::vmsd instead. * @gdb_num_core_regs: Number of core registers accessible to GDB. * @gdb_core_xml_file: File name for core registers GDB XML description. * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to s= top @@ -180,7 +178,6 @@ struct CPUClass { int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu, void *opaque); =20 - const VMStateDescription *legacy_vmsd; const char *gdb_core_xml_file; gchar * (*gdb_arch_name)(CPUState *cpu); const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname= ); @@ -1064,10 +1061,8 @@ bool target_words_bigendian(void); #ifdef NEED_CPU_H =20 #ifdef CONFIG_SOFTMMU + extern const VMStateDescription vmstate_cpu_common; -#else -#define vmstate_cpu_common vmstate_dummy -#endif =20 #define VMSTATE_CPU() { = \ .name =3D "parent_obj", = \ @@ -1076,6 +1071,7 @@ extern const VMStateDescription vmstate_cpu_common; .flags =3D VMS_STRUCT, = \ .offset =3D 0, = \ } +#endif /* CONFIG_SOFTMMU */ =20 #endif /* NEED_CPU_H */ =20 diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index e54a08ea25e..0370ac15196 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,12 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @legacy_vmsd: Legacy state for migration. + * Do not use in new targets, use #DeviceClass::vmsd ins= tead. + */ + const VMStateDescription *legacy_vmsd; + } SysemuCPUOps; =20 #endif /* SYSEMU_CPU_OPS_H */ diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h index 075ee800960..8df7b69f389 100644 --- a/include/migration/vmstate.h +++ b/include/migration/vmstate.h @@ -194,8 +194,6 @@ struct VMStateDescription { const VMStateDescription **subsections; }; =20 -extern const VMStateDescription vmstate_dummy; - extern const VMStateInfo vmstate_info_bool; =20 extern const VMStateInfo vmstate_info_int8; diff --git a/cpu.c b/cpu.c index c57f4c302bc..76047fcd4d6 100644 --- a/cpu.c +++ b/cpu.c @@ -127,7 +127,9 @@ const VMStateDescription vmstate_cpu_common =3D { =20 void cpu_exec_realizefn(CPUState *cpu, Error **errp) { +#ifndef CONFIG_USER_ONLY CPUClass *cc =3D CPU_GET_CLASS(cpu); +#endif =20 cpu_list_add(cpu); if (!accel_cpu_realizefn(cpu, errp)) { @@ -143,26 +145,23 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #ifdef CONFIG_USER_ONLY assert(qdev_get_vmsd(DEVICE(cpu)) =3D=3D NULL || qdev_get_vmsd(DEVICE(cpu))->unmigratable); - assert(cc->legacy_vmsd =3D=3D NULL); #else if (qdev_get_vmsd(DEVICE(cpu)) =3D=3D NULL) { vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); } - if (cc->legacy_vmsd !=3D NULL) { - vmstate_register(NULL, cpu->cpu_index, cc->legacy_vmsd, cpu); + if (cc->sysemu_ops->legacy_vmsd !=3D NULL) { + vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd= , cpu); } #endif /* CONFIG_USER_ONLY */ } =20 void cpu_exec_unrealizefn(CPUState *cpu) { +#ifndef CONFIG_USER_ONLY CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 -#ifdef CONFIG_USER_ONLY - assert(cc->legacy_vmsd =3D=3D NULL); -#else - if (cc->legacy_vmsd !=3D NULL) { - vmstate_unregister(NULL, cc->legacy_vmsd, cpu); + if (cc->sysemu_ops->legacy_vmsd !=3D NULL) { + vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu); } if (qdev_get_vmsd(DEVICE(cpu)) =3D=3D NULL) { vmstate_unregister(NULL, &vmstate_cpu_common, cpu); diff --git a/stubs/vmstate.c b/stubs/vmstate.c index cc4fe41dfc2..8513d9204e4 100644 --- a/stubs/vmstate.c +++ b/stubs/vmstate.c @@ -1,8 +1,6 @@ #include "qemu/osdep.h" #include "migration/vmstate.h" =20 -const VMStateDescription vmstate_dummy =3D {}; - int vmstate_register_with_alias_id(VMStateIf *obj, uint32_t instance_id, const VMStateDescription *vmsd, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a9c9389859b..0a104cec633 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1944,6 +1944,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs) =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps arm_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_arm_cpu, }; #endif =20 @@ -1986,7 +1987,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) #ifndef CONFIG_USER_ONLY cc->get_phys_page_attrs_debug =3D arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs =3D arm_asidx_from_attrs; - cc->legacy_vmsd =3D &vmstate_arm_cpu; cc->virtio_is_big_endian =3D arm_cpu_virtio_is_big_endian; cc->write_elf64_note =3D arm_cpu_write_elf64_note; cc->write_elf32_note =3D arm_cpu_write_elf32_note; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 35ef2eb1a41..f8750f6400f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6716,6 +6716,7 @@ static Property x86_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps i386_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_x86_cpu, }; #endif =20 @@ -6754,7 +6755,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->write_elf64_qemunote =3D x86_cpu_write_elf64_qemunote; cc->write_elf32_note =3D x86_cpu_write_elf32_note; cc->write_elf32_qemunote =3D x86_cpu_write_elf32_qemunote; - cc->legacy_vmsd =3D &vmstate_x86_cpu; cc->sysemu_ops =3D &i386_sysemu_ops; #endif /* !CONFIG_USER_ONLY */ =20 diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e61677fab74..a74b7fab318 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -523,6 +523,7 @@ static Property mips_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps mips_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_mips_cpu, }; #endif =20 @@ -566,7 +567,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *d= ata) cc->gdb_write_register =3D mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug =3D mips_cpu_get_phys_page_debug; - cc->legacy_vmsd =3D &vmstate_mips_cpu; cc->sysemu_ops =3D &mips_sysemu_ops; #endif cc->disas_set_info =3D mips_cpu_disas_set_info; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f23eb63d186..e724c10a2ed 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -598,6 +598,7 @@ static const char *riscv_gdb_get_dynamic_xml(CPUState *= cs, const char *xmlname) =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps riscv_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_riscv_cpu, }; #endif =20 @@ -643,7 +644,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *= data) cc->disas_set_info =3D riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug =3D riscv_cpu_get_phys_page_debug; - cc->legacy_vmsd =3D &vmstate_riscv_cpu; cc->sysemu_ops =3D &riscv_sysemu_ops; cc->write_elf64_note =3D riscv_cpu_write_elf64_note; cc->write_elf32_note =3D riscv_cpu_write_elf32_note; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 1fb4af4f2ca..aafe5fa2ef5 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -478,6 +478,7 @@ static void s390_cpu_reset_full(DeviceState *dev) =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps s390_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_s390_cpu, }; #endif =20 @@ -521,7 +522,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *= data) cc->gdb_write_register =3D s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug =3D s390_cpu_get_phys_page_debug; - cc->legacy_vmsd =3D &vmstate_s390_cpu; cc->get_crash_info =3D s390_cpu_get_crash_info; cc->write_elf64_note =3D s390_cpu_write_elf64_note; cc->sysemu_ops =3D &s390_sysemu_ops; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 743a7287a4f..543853c24dc 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -850,6 +850,7 @@ static Property sparc_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps sparc_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_sparc_cpu, }; #endif =20 @@ -894,7 +895,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) cc->gdb_write_register =3D sparc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug =3D sparc_cpu_get_phys_page_debug; - cc->legacy_vmsd =3D &vmstate_sparc_cpu; cc->sysemu_ops =3D &sparc_sysemu_ops; #endif cc->disas_set_info =3D cpu_sparc_disas_set_info; diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.= inc index 9e828402a35..9f20cdb569b 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -10239,6 +10239,7 @@ static Property ppc_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps ppc_sysemu_ops =3D { + .legacy_vmsd =3D &vmstate_ppc_cpu, }; #endif =20 @@ -10284,7 +10285,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) cc->gdb_write_register =3D ppc_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug =3D ppc_cpu_get_phys_page_debug; - cc->legacy_vmsd =3D &vmstate_ppc_cpu; cc->sysemu_ops =3D &ppc_sysemu_ops; #endif #if defined(CONFIG_SOFTMMU) --=20 2.26.3