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From: Alistair Francis <alistair.francis@wdc.com>
To: peter.maydell@linaro.org
Subject: [PULL v3 30/42] hw/riscv: Fix OT IBEX reset vector
Date: Tue, 11 May 2021 20:19:39 +1000
Message-Id: <20210511101951.165287-31-alistair.francis@wdc.com>
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From: Alexander Wagner <alexander.wagner@ulal.de>
The IBEX documentation [1] specifies the reset vector to be "the most
significant 3 bytes of the boot address and the reset value (0x80) as
the least significant byte".
[1] https://github.com/lowRISC/ibex/blob/master/doc/03_reference/exception_=
interrupts.rst
Signed-off-by: Alexander Wagner <alexander.wagner@ulal.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210420080008.119798-1-alexander.wagner@ulal.de
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/riscv/opentitan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 557d73726b..7545dcda9c 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -119,7 +119,7 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_s=
oc, Error **errp)
&error_abort);
object_property_set_int(OBJECT(&s->cpus), "num-harts", ms->smp.cpus,
&error_abort);
- object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x8090, &error_a=
bort);
+ object_property_set_int(OBJECT(&s->cpus), "resetvec", 0x8080, &error_a=
bort);
sysbus_realize(SYS_BUS_DEVICE(&s->cpus), &error_abort);
=20
/* Boot ROM */
--=20
2.31.1