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From: Alistair Francis <alistair.francis@wdc.com>
To: peter.maydell@linaro.org
Subject: [PULL v3 11/42] target/riscv: Fix 32-bit HS mode access permissions
Date: Tue, 11 May 2021 20:19:20 +1000
Message-Id: <20210511101951.165287-12-alistair.francis@wdc.com>
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Cc: alistair23@gmail.com, Richard Henderson <richard.henderson@linaro.org>,
Alistair Francis <alistair.francis@wdc.com>, qemu-devel@nongnu.org,
Bin Meng <bmeng.cn@gmail.com>
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Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: cb1ef2061547dc9028ce3cf4f6622588f9c09149.1617290165.git.alistai=
r.francis@wdc.com
---
target/riscv/csr.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 1938bdca7d..6a39c4aa96 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -181,7 +181,11 @@ static RISCVException hmode(CPURISCVState *env, int cs=
rno)
static RISCVException hmode32(CPURISCVState *env, int csrno)
{
if (!riscv_cpu_is_32bit(env)) {
- return RISCV_EXCP_NONE;
+ if (riscv_cpu_virt_enabled(env)) {
+ return RISCV_EXCP_ILLEGAL_INST;
+ } else {
+ return RISCV_EXCP_VIRT_INSTRUCTION_FAULT;
+ }
}
=20
return hmode(env, csrno);
--=20
2.31.1