From nobody Tue Feb 10 20:47:53 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620721921; cv=none; d=zohomail.com; s=zohoarc; b=iqXh03dZ3ye5lf1Fae2OMicxLcK2GgclDV0paIpwABI96u4lq//t2TD8y8rwP54xbM/6pik7V9M4SpqffckCS3XTjyuDd7Wi4kRIleNRNmg8JrVYPtn++zu/N5ziBS0vIONwmu/vhaMDerFLpZDTbpBiuffh7x1Bi2wi6O3jw/E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620721921; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EJ4eSq8p5vK4NJafQPGABPQ+1aZyk2CTHqY8mHKQT1M=; b=j0BasoY82AM7VyXCqPfsjTQ0N40xUw++3Q5jo48hsibMTBsY2aBRVSIsvxURf+/OU94EpmeQQediAQagogKvG8JPxTv/K6Vs0sBUh7JD3/WK2crbNSFC1YAZ4YDV+Q4xZNHiTqiwwNSkKYYTZ/IV1n9RSYfY0TMpGNs7yus8Z0s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1620721921494106.52678270602303; Tue, 11 May 2021 01:32:01 -0700 (PDT) Received: from localhost ([::1]:35050 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lgNac-0000d7-Rm for importer@patchew.org; Tue, 11 May 2021 04:18:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgNWl-0001YS-Ri for qemu-devel@nongnu.org; Tue, 11 May 2021 04:14:03 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:28648) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgNWh-0000he-3z for qemu-devel@nongnu.org; Tue, 11 May 2021 04:14:03 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-180-xafr3ZtkOOGxKkDJh9jmnA-1; Tue, 11 May 2021 04:13:56 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3D9F91854E21; Tue, 11 May 2021 08:13:55 +0000 (UTC) Received: from virtlab701.virt.lab.eng.bos.redhat.com (virtlab701.virt.lab.eng.bos.redhat.com [10.19.152.228]) by smtp.corp.redhat.com (Postfix) with ESMTP id C35EF5D9E3; Tue, 11 May 2021 08:13:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620720838; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EJ4eSq8p5vK4NJafQPGABPQ+1aZyk2CTHqY8mHKQT1M=; b=Gkp/+LKL3XSMQWwRXR3N5e4GyS1rc4cDo2wJ1ntE+NmV1pHcCAAe+nNEfGMx2nqL4RQ47v UqDYzjAC4V5raCIffS+RAAUUyZvNkFhuiIluyYzgmIgm+WpSOmToB9OAhovvpN5mVzAvpR u9ZAgUfeAmpvHPxaTeM6f69VMWLTdO0= X-MC-Unique: xafr3ZtkOOGxKkDJh9jmnA-1 From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 07/33] accel-cpu: make cpu_realizefn return a bool Date: Tue, 11 May 2021 04:13:24 -0400 Message-Id: <20210511081350.419428-8-pbonzini@redhat.com> In-Reply-To: <20210511081350.419428-1-pbonzini@redhat.com> References: <20210511081350.419428-1-pbonzini@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=pbonzini@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.698, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Claudio Fontana Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Claudio Fontana overall, all devices' realize functions take an Error **errp, but return vo= id. hw/core/qdev.c code, which realizes devices, therefore does: local_err =3D NULL; dc->realize(dev, &local_err); if (local_err !=3D NULL) { goto fail; } However, we can improve at least accel_cpu to return a meaningful bool valu= e. Signed-off-by: Claudio Fontana Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Message-Id: <20210322132800.7470-9-cfontana@suse.de> Signed-off-by: Paolo Bonzini --- accel/accel-common.c | 6 +++--- cpu.c | 5 +++-- include/hw/core/accel-cpu.h | 2 +- include/qemu/accel.h | 2 +- target/i386/host-cpu.c | 5 +++-- target/i386/host-cpu.h | 2 +- target/i386/kvm/kvm-cpu.c | 4 ++-- target/i386/tcg/tcg-cpu.c | 6 ++++-- 8 files changed, 18 insertions(+), 14 deletions(-) diff --git a/accel/accel-common.c b/accel/accel-common.c index 0f6fb4fb66..d77c09d7b5 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -98,14 +98,14 @@ void accel_cpu_instance_init(CPUState *cpu) } } =20 -void accel_cpu_realizefn(CPUState *cpu, Error **errp) +bool accel_cpu_realizefn(CPUState *cpu, Error **errp) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 if (cc->accel_cpu && cc->accel_cpu->cpu_realizefn) { - /* NB: errp parameter is unused currently */ - cc->accel_cpu->cpu_realizefn(cpu, errp); + return cc->accel_cpu->cpu_realizefn(cpu, errp); } + return true; } =20 static const TypeInfo accel_cpu_type =3D { diff --git a/cpu.c b/cpu.c index 25e6fbfa2c..34a0484bf4 100644 --- a/cpu.c +++ b/cpu.c @@ -130,8 +130,9 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 cpu_list_add(cpu); - accel_cpu_realizefn(cpu, errp); - + if (!accel_cpu_realizefn(cpu, errp)) { + return; + } #ifdef CONFIG_TCG /* NB: errp parameter is unused currently */ if (tcg_enabled()) { diff --git a/include/hw/core/accel-cpu.h b/include/hw/core/accel-cpu.h index 24a6697412..5dbfd79955 100644 --- a/include/hw/core/accel-cpu.h +++ b/include/hw/core/accel-cpu.h @@ -32,7 +32,7 @@ typedef struct AccelCPUClass { =20 void (*cpu_class_init)(CPUClass *cc); void (*cpu_instance_init)(CPUState *cpu); - void (*cpu_realizefn)(CPUState *cpu, Error **errp); + bool (*cpu_realizefn)(CPUState *cpu, Error **errp); } AccelCPUClass; =20 #endif /* ACCEL_CPU_H */ diff --git a/include/qemu/accel.h b/include/qemu/accel.h index da0c8ab523..4f4c283f6f 100644 --- a/include/qemu/accel.h +++ b/include/qemu/accel.h @@ -89,6 +89,6 @@ void accel_cpu_instance_init(CPUState *cpu); * @cpu: The CPU that needs to call accel-specific cpu realization. * @errp: currently unused. */ -void accel_cpu_realizefn(CPUState *cpu, Error **errp); +bool accel_cpu_realizefn(CPUState *cpu, Error **errp); =20 #endif /* QEMU_ACCEL_H */ diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c index d07d41c34c..4ea9e354ea 100644 --- a/target/i386/host-cpu.c +++ b/target/i386/host-cpu.c @@ -80,7 +80,7 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu) return phys_bits; } =20 -void host_cpu_realizefn(CPUState *cs, Error **errp) +bool host_cpu_realizefn(CPUState *cs, Error **errp) { X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; @@ -97,10 +97,11 @@ void host_cpu_realizefn(CPUState *cs, Error **errp) error_setg(errp, "phys-bits should be between 32 and %u " " (but is %u)", TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); - return; + return false; } cpu->phys_bits =3D phys_bits; } + return true; } =20 #define CPUID_MODEL_ID_SZ 48 diff --git a/target/i386/host-cpu.h b/target/i386/host-cpu.h index b47bc0943f..6a9bc918ba 100644 --- a/target/i386/host-cpu.h +++ b/target/i386/host-cpu.h @@ -12,7 +12,7 @@ =20 void host_cpu_instance_init(X86CPU *cpu); void host_cpu_max_instance_init(X86CPU *cpu); -void host_cpu_realizefn(CPUState *cs, Error **errp); +bool host_cpu_realizefn(CPUState *cs, Error **errp); =20 void host_cpu_vendor_fms(char *vendor, int *family, int *model, int *stepp= ing); =20 diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index c23bbe6c50..c660ad4293 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -18,7 +18,7 @@ #include "kvm_i386.h" #include "hw/core/accel-cpu.h" =20 -static void kvm_cpu_realizefn(CPUState *cs, Error **errp) +static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) { X86CPU *cpu =3D X86_CPU(cs); CPUX86State *env =3D &cpu->env; @@ -41,7 +41,7 @@ static void kvm_cpu_realizefn(CPUState *cs, Error **errp) MSR_IA32_UCODE_REV); } } - host_cpu_realizefn(cs, errp); + return host_cpu_realizefn(cs, errp); } =20 /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index 1d3d6d1c6a..23e1f5f0c3 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -96,7 +96,7 @@ static void x86_cpu_machine_done(Notifier *n, void *unuse= d) } } =20 -static void tcg_cpu_realizefn(CPUState *cs, Error **errp) +static bool tcg_cpu_realizefn(CPUState *cs, Error **errp) { X86CPU *cpu =3D X86_CPU(cs); =20 @@ -132,12 +132,14 @@ static void tcg_cpu_realizefn(CPUState *cs, Error **e= rrp) /* ... SMRAM with higher priority, linked from /machine/smram. */ cpu->machine_done.notify =3D x86_cpu_machine_done; qemu_add_machine_init_done_notifier(&cpu->machine_done); + return true; } =20 #else /* CONFIG_USER_ONLY */ =20 -static void tcg_cpu_realizefn(CPUState *cs, Error **errp) +static bool tcg_cpu_realizefn(CPUState *cs, Error **errp) { + return true; } =20 #endif /* !CONFIG_USER_ONLY */ --=20 2.26.2