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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id kx3sm10552169ejc.44.2021.05.10.21.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 21:19:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9KXY+rSnFHdghr1cU4rScJTvInhkNqH47h5SdvllRlA=; b=EpDEOGYhd50hrCIRqa1lkP0tf923p+Hq+9kZcCApmCpeFjvapzhdztwVijzvEewlOa KrzEdN0yzRk/QXeHUc7XSn6ukZWpEgOV/2KMyI6BeZdlMuSazMwnf+icX8vGRLzEyESB o5fxHO8lKC9B/NCZCeDVqkvs320skSPu0Khk3yBilMlovLpp+BdsgWPPpJ6YDRZBDy4Z H4ZsrgmGXc0sLfSk7t5wZuIqn/6cj1zB+2VOB2J+1w30UKb91VFjsF389e90F6TncuJr uzyX4fCEFKjuu6BgT/Sq/odjvoROuO2kLmL2Lb30AQvrG+iVDul2mrch4qtu4HUcujzi SzCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9KXY+rSnFHdghr1cU4rScJTvInhkNqH47h5SdvllRlA=; b=KxeJwltd6/j1GDEZD3quRD7A3EW2iRNTqbY7F8wNhNAbdiLMxn1JKYvHMpW8uvD2As 3X27urzwDqnBObghdot+hukOh0L8PBtlBto9129PfIU+PDYu99HI7zHHTg9s66TS1rzV kaAp+hBIREgG3bjCaad0PyVG97B2uwbZwy33sGgRRINEvLnOfR0rFnoDIHzPAIKVJErF MJaOS+OU8vhlZP5GWkZkYGF2qQDlpDSxaX67MXpZ7YBTAxGccFJkwR84/TIWoLlcMXr2 kDZSv0EnDq+Jxh/bLThxmoVWcgm75MXVAL51AvdkLnjb0ccaX1cnGgWSQILUaVVeEMpI wDOQ== X-Gm-Message-State: AOAM532q2PRLH1b0Wvx2SO83mqrHe83ZlFgskatgmRaS45M0A7Ta0NPJ WHyqfUA2yvOnl1kToQb6j9Y= X-Google-Smtp-Source: ABdhPJw8ho81RakrRar8zcDDGvV9u/KIYjxdBHg2f/a+zVj+nfdCg6pDLBcKrI5VKOHh0sFVzod/4A== X-Received: by 2002:a17:907:10c6:: with SMTP id rv6mr28920397ejb.526.1620706758695; Mon, 10 May 2021 21:19:18 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Jiaxun Yang , Huacai Chen , BALATON Zoltan , Aurelien Jarno , John Snow Subject: [PATCH v2 5/6] hw/ide/via: Connect IDE function output IRQs to the ISA function input Date: Tue, 11 May 2021 06:18:47 +0200 Message-Id: <20210511041848.2743312-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210511041848.2743312-1-f4bug@amsat.org> References: <20210511041848.2743312-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) To avoid abusing isa_get_irq(NULL) using a hidden ISA bridge under the hood, let the IDE function expose 2 output IRQs, and connect them to the ISA function inputs when creating the south bridge chipset model in vt82c686b_southbridge_init. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/via.c | 19 +++++++++++++++++-- hw/mips/fuloong2e.c | 9 ++++++++- 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/hw/ide/via.c b/hw/ide/via.c index 6c667a92130..7887bf181e6 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -33,6 +33,17 @@ #include "hw/ide/pci.h" #include "trace.h" =20 +#define TYPE_VIA_IDE "via-ide" +OBJECT_DECLARE_SIMPLE_TYPE(VIAIDEState, VIA_IDE) + +struct VIAIDEState { + /* */ + PCIIDEState parent_obj; + /* */ + + qemu_irq irq[2]; +}; + static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size) { @@ -105,6 +116,7 @@ static void bmdma_setup_bar(PCIIDEState *d) static void via_ide_set_irq(void *opaque, int n, int level) { PCIDevice *d =3D PCI_DEVICE(opaque); + VIAIDEState *s =3D VIA_IDE(d); =20 if (level) { d->config[0x70 + n * 8] |=3D 0x80; @@ -112,7 +124,7 @@ static void via_ide_set_irq(void *opaque, int n, int le= vel) d->config[0x70 + n * 8] &=3D ~0x80; } =20 - qemu_set_irq(isa_get_irq(NULL, 14 + n), level); + qemu_set_irq(s->irq[n], level); } =20 static void via_ide_reset(DeviceState *dev) @@ -159,6 +171,7 @@ static void via_ide_reset(DeviceState *dev) =20 static void via_ide_realize(PCIDevice *dev, Error **errp) { + VIAIDEState *s =3D VIA_IDE(dev); PCIIDEState *d =3D PCI_IDE(dev); DeviceState *ds =3D DEVICE(dev); uint8_t *pci_conf =3D dev->config; @@ -188,6 +201,7 @@ static void via_ide_realize(PCIDevice *dev, Error **err= p) bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 + qdev_init_gpio_out_named(ds, s->irq, "ide-irq", ARRAY_SIZE(s->irq)); qdev_init_gpio_in(ds, via_ide_set_irq, ARRAY_SIZE(d->bus)); for (i =3D 0; i < ARRAY_SIZE(d->bus); i++) { ide_bus_new(&d->bus[i], sizeof(d->bus[i]), ds, i, MAX_IDE_DEVS); @@ -227,8 +241,9 @@ static void via_ide_class_init(ObjectClass *klass, void= *data) } =20 static const TypeInfo via_ide_info =3D { - .name =3D "via-ide", + .name =3D TYPE_VIA_IDE, .parent =3D TYPE_PCI_IDE, + .instance_size =3D sizeof(VIAIDEState), .class_init =3D via_ide_class_init, }; =20 diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 3e7a7e4389d..17b5e41cc7d 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -201,12 +201,19 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bu= s, int slot, qemu_irq intc, I2CBus **i2c_bus) { PCIDevice *dev; + DeviceState *isa; =20 dev =3D pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), t= rue, TYPE_VT82C686B_ISA); - qdev_connect_gpio_out_named(DEVICE(dev), "intr", 0, intc); + isa =3D DEVICE(dev); + qdev_connect_gpio_out_named(isa, "intr", 0, intc); =20 dev =3D pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide"); + for (unsigned i =3D 0; i < 2; i++) { + qdev_connect_gpio_out_named(DEVICE(dev), "ide-irq", i, + qdev_get_gpio_in_named(isa, + "isa-irq", 14 += i)); + } pci_ide_create_devs(dev); =20 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci"); --=20 2.26.3