From nobody Mon Feb 9 22:38:54 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=huawei.com ARC-Seal: i=1; a=rsa-sha256; t=1620699723; cv=none; d=zohomail.com; s=zohoarc; b=Mb+h7N8roaCWtLOlNhBKbm/rzpU4krssSZrayT0wYrKQhhUJBRkczTQry4NgeVQbH6ee4Nwl+nJWXCdxhVSAFSwXLP0OooKc0W6xndOtx5c/X22yBvd9e0CrwVe+5Rl2ZghkqNeAtIrgIpj/Op46+W/lUxrYOJwiQP62amgAfYo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620699723; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ah3i7JvJlfmsOPKkfOLTBIWeD8GKiuIrw4l35CU3TfQ=; b=kn4K1wvXVhhhkwbUwuo8FcbH48Q2fCPDvsaO76GuHs71uTG5f5UMferRz6wiSjEmSUg0o9FEOb7L0mIhmheqfljjCOxk/PwCstYTI9zNsiPZUg+XPWvl+kAeR75tGe78ugMiZH+WMVFdqrYym4jxh4VsTxNQfLxtl/WEnTONnYo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1620699723611729.028200206058; Mon, 10 May 2021 19:22:03 -0700 (PDT) Received: from localhost ([::1]:48212 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lgI26-0000kZ-Ik for importer@patchew.org; Mon, 10 May 2021 22:22:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55818) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgHyY-0002cl-Ps; Mon, 10 May 2021 22:18:22 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:2172) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lgHyU-0001yt-FK; Mon, 10 May 2021 22:18:22 -0400 Received: from dggeml711-chm.china.huawei.com (unknown [172.30.72.55]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4FfM25102sz5vwQ; Tue, 11 May 2021 10:14:53 +0800 (CST) Received: from dggema765-chm.china.huawei.com (10.1.198.207) by dggeml711-chm.china.huawei.com (10.3.17.122) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 11 May 2021 10:18:13 +0800 Received: from DESKTOP-6NKE0BC.china.huawei.com (10.174.185.210) by dggema765-chm.china.huawei.com (10.1.198.207) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 11 May 2021 10:18:13 +0800 From: Kunkun Jiang To: Eric Auger , Peter Maydell , Alex Williamson , "open list:ARM SMMU" , "open list:All patches CC here" Subject: [RFC PATCH v3 4/4] hw/arm/smmuv3: Post-load stage 1 configurations to the host Date: Tue, 11 May 2021 10:08:16 +0800 Message-ID: <20210511020816.2905-5-jiangkunkun@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20210511020816.2905-1-jiangkunkun@huawei.com> References: <20210511020816.2905-1-jiangkunkun@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.174.185.210] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggema765-chm.china.huawei.com (10.1.198.207) X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.189; envelope-from=jiangkunkun@huawei.com; helo=szxga03-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kevin.tian@intel.com, Kunkun Jiang , Kirti Wankhede , Zenghui Yu , wanghaibin.wang@huawei.com, Keqian Zhu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In nested mode, we call the set_pasid_table() callback on each STE update to pass the guest stage 1 configuration to the host and apply it at physical level. In the case of live migration, we need to manually call the set_pasid_table() to load the guest stage 1 configurations to the host. If this operation fails, the migration fails. Signed-off-by: Kunkun Jiang --- hw/arm/smmuv3.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index ca690513e6..ac1de572f3 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -929,7 +929,7 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cm= d) } } =20 -static void smmuv3_notify_config_change(SMMUState *bs, uint32_t sid) +static int smmuv3_notify_config_change(SMMUState *bs, uint32_t sid) { #ifdef __linux__ IOMMUMemoryRegion *mr =3D smmu_iommu_mr(bs, sid); @@ -938,9 +938,10 @@ static void smmuv3_notify_config_change(SMMUState *bs,= uint32_t sid) IOMMUConfig iommu_config =3D {}; SMMUTransCfg *cfg; SMMUDevice *sdev; + int ret; =20 if (!mr) { - return; + return 0; } =20 sdev =3D container_of(mr, SMMUDevice, iommu); @@ -949,13 +950,13 @@ static void smmuv3_notify_config_change(SMMUState *bs= , uint32_t sid) smmuv3_flush_config(sdev); =20 if (!pci_device_is_pasid_ops_set(sdev->bus, sdev->devfn)) { - return; + return 0; } =20 cfg =3D smmuv3_get_config(sdev, &event); =20 if (!cfg) { - return; + return 0; } =20 iommu_config.pasid_cfg.argsz =3D sizeof(struct iommu_pasid_table_confi= g); @@ -977,10 +978,13 @@ static void smmuv3_notify_config_change(SMMUState *bs= , uint32_t sid) iommu_config.pasid_cfg.config, iommu_config.pasid_cfg.base_ptr); =20 - if (pci_device_set_pasid_table(sdev->bus, sdev->devfn, &iommu_config))= { + ret =3D pci_device_set_pasid_table(sdev->bus, sdev->devfn, &iommu_conf= ig); + if (ret) { error_report("Failed to pass PASID table to host for iommu mr %s (= %m)", mr->parent_obj.name); } + + return ret; #endif } =20 @@ -1545,6 +1549,24 @@ static void smmu_realize(DeviceState *d, Error **err= p) smmu_init_irq(s, dev); } =20 +static int smmuv3_post_load(void *opaque, int version_id) +{ + SMMUv3State *s3 =3D opaque; + SMMUState *s =3D &(s3->smmu_state); + SMMUDevice *sdev; + int ret =3D 0; + + QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) { + uint32_t sid =3D smmu_get_sid(sdev); + ret =3D smmuv3_notify_config_change(s, sid); + if (ret) { + break; + } + } + + return ret; +} + static const VMStateDescription vmstate_smmuv3_queue =3D { .name =3D "smmuv3_queue", .version_id =3D 1, @@ -1563,6 +1585,7 @@ static const VMStateDescription vmstate_smmuv3 =3D { .version_id =3D 1, .minimum_version_id =3D 1, .priority =3D MIG_PRI_IOMMU, + .post_load =3D smmuv3_post_load, .fields =3D (VMStateField[]) { VMSTATE_UINT32(features, SMMUv3State), VMSTATE_UINT8(sid_size, SMMUv3State), --=20 2.23.0