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Mon, 03 May 2021 06:45:09 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-374-kncvw3UGNjylkjN3BYiggg-1; Mon, 03 May 2021 06:45:01 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 88A29107ACCD; Mon, 3 May 2021 10:45:00 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id 36F185D9D5; Mon, 3 May 2021 10:44:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tcJMYWyzReI0061vbjJ3ZIm0WiAqzQLmZEtpX7E9y3Y=; b=WK6J6/r/BTrjnpyv/BB97DbjO2+gu3TKbiey7zRkvOpYJV4TFdnDg2CQasoT75qau1mgfe ENxIx7iQZjHrFerBmF31tE0coJRZsU+rY7HaJGjS7BsRqf8khPJoXK6A65YC8oQQ56QgTr h7z5hBglHdSnVWI/MlSP2sycvlOwz1E= X-MC-Unique: kncvw3UGNjylkjN3BYiggg-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 01/10] Remove the deprecated moxie target Date: Mon, 3 May 2021 12:44:47 +0200 Message-Id: <20210503104456.1036472-2-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" There are no known users of this CPU anymore, and there are no binaries available online which could be used for regression tests, so the code has likely completely bit-rotten already. It's been marked as deprecated since two releases now and nobody spoke up that there is still a need to keep it, thus let's remove it now. Signed-off-by: Thomas Huth Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson Message-Id: <20210430160355.698194-1-thuth@redhat.com> Signed-off-by: Thomas Huth --- .gitlab-ci.yml | 6 +- MAINTAINERS | 8 - default-configs/devices/moxie-softmmu.mak | 5 - default-configs/targets/moxie-softmmu.mak | 2 - disas/meson.build | 1 - disas/moxie.c | 360 --------- docs/system/deprecated.rst | 8 - docs/system/removed-features.rst | 7 + fpu/softfloat-specialize.c.inc | 2 +- hw/Kconfig | 1 - hw/meson.build | 1 - hw/moxie/Kconfig | 3 - hw/moxie/meson.build | 4 - hw/moxie/moxiesim.c | 157 ---- include/disas/dis-asm.h | 1 - include/elf.h | 3 - include/exec/poison.h | 2 - include/hw/elf_ops.h | 8 - include/sysemu/arch_init.h | 1 - meson.build | 1 - qapi/machine.json | 2 +- qapi/misc-target.json | 2 +- softmmu/arch_init.c | 2 - target/meson.build | 1 - target/moxie/cpu-param.h | 17 - target/moxie/cpu.c | 161 ---- target/moxie/cpu.h | 123 --- target/moxie/helper.c | 120 --- target/moxie/helper.h | 5 - target/moxie/machine.c | 19 - target/moxie/machine.h | 1 - target/moxie/meson.build | 14 - target/moxie/mmu.c | 32 - target/moxie/mmu.h | 19 - target/moxie/translate.c | 892 ---------------------- tests/qtest/boot-serial-test.c | 8 - tests/qtest/machine-none-test.c | 1 - tests/qtest/meson.build | 2 - 38 files changed, 13 insertions(+), 1989 deletions(-) delete mode 100644 default-configs/devices/moxie-softmmu.mak delete mode 100644 default-configs/targets/moxie-softmmu.mak delete mode 100644 disas/moxie.c delete mode 100644 hw/moxie/Kconfig delete mode 100644 hw/moxie/meson.build delete mode 100644 hw/moxie/moxiesim.c delete mode 100644 target/moxie/cpu-param.h delete mode 100644 target/moxie/cpu.c delete mode 100644 target/moxie/cpu.h delete mode 100644 target/moxie/helper.c delete mode 100644 target/moxie/helper.h delete mode 100644 target/moxie/machine.c delete mode 100644 target/moxie/machine.h delete mode 100644 target/moxie/meson.build delete mode 100644 target/moxie/mmu.c delete mode 100644 target/moxie/mmu.h delete mode 100644 target/moxie/translate.c diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 52d65d6c04..9970d91809 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -85,7 +85,7 @@ build-system-alpine: variables: IMAGE: alpine TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu - moxie-softmmu microblazeel-softmmu mips64el-softmmu + microblazeel-softmmu mips64el-softmmu MAKE_CHECK_ARGS: check-build CONFIGURE_ARGS: --enable-docs --enable-trace-backends=3Dlog,simple,sys= log artifacts: @@ -121,7 +121,7 @@ build-system-ubuntu: IMAGE: ubuntu2004 CONFIGURE_ARGS: --enable-docs --enable-fdt=3Dsystem --enable-slirp=3Ds= ystem TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu - moxie-softmmu microblazeel-softmmu mips64el-softmmu + microblazeel-softmmu mips64el-softmmu MAKE_CHECK_ARGS: check-build artifacts: expire_in: 2 days @@ -680,7 +680,7 @@ build-tci: variables: IMAGE: debian-all-test-cross script: - - TARGETS=3D"aarch64 alpha arm hppa m68k microblaze moxie ppc64 s390x = x86_64" + - TARGETS=3D"aarch64 alpha arm hppa m68k microblaze ppc64 s390x x86_64" - mkdir build - cd build - ../configure --enable-tcg-interpreter diff --git a/MAINTAINERS b/MAINTAINERS index 4c05ff8bba..7b9683732a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -258,14 +258,6 @@ MIPS TCG CPUs (nanoMIPS ISA) S: Orphan F: disas/nanomips.* =20 -Moxie TCG CPUs -M: Anthony Green -S: Maintained -F: target/moxie/ -F: disas/moxie.c -F: hw/moxie/ -F: default-configs/*/moxie-softmmu.mak - NiosII TCG CPUs M: Chris Wulff M: Marek Vasut diff --git a/default-configs/devices/moxie-softmmu.mak b/default-configs/de= vices/moxie-softmmu.mak deleted file mode 100644 index bd50da3c58..0000000000 --- a/default-configs/devices/moxie-softmmu.mak +++ /dev/null @@ -1,5 +0,0 @@ -# Default configuration for moxie-softmmu - -# Boards: -# -CONFIG_MOXIESIM=3Dy diff --git a/default-configs/targets/moxie-softmmu.mak b/default-configs/ta= rgets/moxie-softmmu.mak deleted file mode 100644 index 183e6b0ebd..0000000000 --- a/default-configs/targets/moxie-softmmu.mak +++ /dev/null @@ -1,2 +0,0 @@ -TARGET_ARCH=3Dmoxie -TARGET_WORDS_BIGENDIAN=3Dy diff --git a/disas/meson.build b/disas/meson.build index 4c8da01877..39a5475ff6 100644 --- a/disas/meson.build +++ b/disas/meson.build @@ -13,7 +13,6 @@ common_ss.add(when: 'CONFIG_LM32_DIS', if_true: files('lm= 32.c')) common_ss.add(when: 'CONFIG_M68K_DIS', if_true: files('m68k.c')) common_ss.add(when: 'CONFIG_MICROBLAZE_DIS', if_true: files('microblaze.c'= )) common_ss.add(when: 'CONFIG_MIPS_DIS', if_true: files('mips.c')) -common_ss.add(when: 'CONFIG_MOXIE_DIS', if_true: files('moxie.c')) common_ss.add(when: 'CONFIG_NANOMIPS_DIS', if_true: files('nanomips.cpp')) common_ss.add(when: 'CONFIG_NIOS2_DIS', if_true: files('nios2.c')) common_ss.add(when: 'CONFIG_PPC_DIS', if_true: files('ppc.c')) diff --git a/disas/moxie.c b/disas/moxie.c deleted file mode 100644 index e94ab4c33d..0000000000 --- a/disas/moxie.c +++ /dev/null @@ -1,360 +0,0 @@ -/* Disassemble moxie instructions. - Copyright (c) 2009 Free Software Foundation, Inc. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, see . */ - -#include "qemu/osdep.h" -#define STATIC_TABLE -#define DEFINE_TABLE - -#include "disas/dis-asm.h" - -static void *stream; - -/* Form 1 instructions come in different flavors: - - Some have no arguments (MOXIE_F1_NARG) - Some only use the A operand (MOXIE_F1_A) - Some use A and B registers (MOXIE_F1_AB) - Some use A and consume a 4 byte immediate value (MOXIE_F1_A4) - Some use just a 4 byte immediate value (MOXIE_F1_4) - Some use just a 4 byte memory address (MOXIE_F1_M) - Some use B and an indirect A (MOXIE_F1_AiB) - Some use A and an indirect B (MOXIE_F1_ABi) - Some consume a 4 byte immediate value and use X (MOXIE_F1_4A) - Some use B and an indirect A plus 4 bytes (MOXIE_F1_AiB4) - Some use A and an indirect B plus 4 bytes (MOXIE_F1_ABi4) - - Form 2 instructions also come in different flavors: - - Some have no arguments (MOXIE_F2_NARG) - Some use the A register and an 8-bit value (MOXIE_F2_A8V) - - Form 3 instructions also come in different flavors: - - Some have no arguments (MOXIE_F3_NARG) - Some have a 10-bit PC relative operand (MOXIE_F3_PCREL). */ - -#define MOXIE_F1_NARG 0x100 -#define MOXIE_F1_A 0x101 -#define MOXIE_F1_AB 0x102 -/* #define MOXIE_F1_ABC 0x103 */ -#define MOXIE_F1_A4 0x104 -#define MOXIE_F1_4 0x105 -#define MOXIE_F1_AiB 0x106 -#define MOXIE_F1_ABi 0x107 -#define MOXIE_F1_4A 0x108 -#define MOXIE_F1_AiB4 0x109 -#define MOXIE_F1_ABi4 0x10a -#define MOXIE_F1_M 0x10b - -#define MOXIE_F2_NARG 0x200 -#define MOXIE_F2_A8V 0x201 - -#define MOXIE_F3_NARG 0x300 -#define MOXIE_F3_PCREL 0x301 - -typedef struct moxie_opc_info_t { - short opcode; - unsigned itype; - const char * name; -} moxie_opc_info_t; - -extern const moxie_opc_info_t moxie_form1_opc_info[64]; -extern const moxie_opc_info_t moxie_form2_opc_info[4]; -extern const moxie_opc_info_t moxie_form3_opc_info[16]; - -/* The moxie processor's 16-bit instructions come in two forms: - - FORM 1 instructions start with a 0 bit... - - 0oooooooaaaabbbb - 0 F - - ooooooo - form 1 opcode number - aaaa - operand A - bbbb - operand B - - FORM 2 instructions start with bits "10"... - - 10ooaaaavvvvvvvv - 0 F - - oo - form 2 opcode number - aaaa - operand A - vvvvvvvv - 8-bit immediate value - - FORM 3 instructions start with a bits "11"... - - 11oooovvvvvvvvvv - 0 F - - oooo - form 3 opcode number - vvvvvvvvvv - 10-bit immediate value. */ - -const moxie_opc_info_t moxie_form1_opc_info[64] =3D - { - { 0x00, MOXIE_F1_NARG, "nop" }, - { 0x01, MOXIE_F1_A4, "ldi.l" }, - { 0x02, MOXIE_F1_AB, "mov" }, - { 0x03, MOXIE_F1_M, "jsra" }, - { 0x04, MOXIE_F1_NARG, "ret" }, - { 0x05, MOXIE_F1_AB, "add.l" }, - { 0x06, MOXIE_F1_AB, "push" }, - { 0x07, MOXIE_F1_AB, "pop" }, - { 0x08, MOXIE_F1_A4, "lda.l" }, - { 0x09, MOXIE_F1_4A, "sta.l" }, - { 0x0a, MOXIE_F1_ABi, "ld.l" }, - { 0x0b, MOXIE_F1_AiB, "st.l" }, - { 0x0c, MOXIE_F1_ABi4, "ldo.l" }, - { 0x0d, MOXIE_F1_AiB4, "sto.l" }, - { 0x0e, MOXIE_F1_AB, "cmp" }, - { 0x0f, MOXIE_F1_NARG, "bad" }, - { 0x10, MOXIE_F1_NARG, "bad" }, - { 0x11, MOXIE_F1_NARG, "bad" }, - { 0x12, MOXIE_F1_NARG, "bad" }, - { 0x13, MOXIE_F1_NARG, "bad" }, - { 0x14, MOXIE_F1_NARG, "bad" }, - { 0x15, MOXIE_F1_NARG, "bad" }, - { 0x16, MOXIE_F1_NARG, "bad" }, - { 0x17, MOXIE_F1_NARG, "bad" }, - { 0x18, MOXIE_F1_NARG, "bad" }, - { 0x19, MOXIE_F1_A, "jsr" }, - { 0x1a, MOXIE_F1_M, "jmpa" }, - { 0x1b, MOXIE_F1_A4, "ldi.b" }, - { 0x1c, MOXIE_F1_ABi, "ld.b" }, - { 0x1d, MOXIE_F1_A4, "lda.b" }, - { 0x1e, MOXIE_F1_AiB, "st.b" }, - { 0x1f, MOXIE_F1_4A, "sta.b" }, - { 0x20, MOXIE_F1_A4, "ldi.s" }, - { 0x21, MOXIE_F1_ABi, "ld.s" }, - { 0x22, MOXIE_F1_A4, "lda.s" }, - { 0x23, MOXIE_F1_AiB, "st.s" }, - { 0x24, MOXIE_F1_4A, "sta.s" }, - { 0x25, MOXIE_F1_A, "jmp" }, - { 0x26, MOXIE_F1_AB, "and" }, - { 0x27, MOXIE_F1_AB, "lshr" }, - { 0x28, MOXIE_F1_AB, "ashl" }, - { 0x29, MOXIE_F1_AB, "sub.l" }, - { 0x2a, MOXIE_F1_AB, "neg" }, - { 0x2b, MOXIE_F1_AB, "or" }, - { 0x2c, MOXIE_F1_AB, "not" }, - { 0x2d, MOXIE_F1_AB, "ashr" }, - { 0x2e, MOXIE_F1_AB, "xor" }, - { 0x2f, MOXIE_F1_AB, "mul.l" }, - { 0x30, MOXIE_F1_4, "swi" }, - { 0x31, MOXIE_F1_AB, "div.l" }, - { 0x32, MOXIE_F1_AB, "udiv.l" }, - { 0x33, MOXIE_F1_AB, "mod.l" }, - { 0x34, MOXIE_F1_AB, "umod.l" }, - { 0x35, MOXIE_F1_NARG, "brk" }, - { 0x36, MOXIE_F1_ABi4, "ldo.b" }, - { 0x37, MOXIE_F1_AiB4, "sto.b" }, - { 0x38, MOXIE_F1_ABi4, "ldo.s" }, - { 0x39, MOXIE_F1_AiB4, "sto.s" }, - { 0x3a, MOXIE_F1_NARG, "bad" }, - { 0x3b, MOXIE_F1_NARG, "bad" }, - { 0x3c, MOXIE_F1_NARG, "bad" }, - { 0x3d, MOXIE_F1_NARG, "bad" }, - { 0x3e, MOXIE_F1_NARG, "bad" }, - { 0x3f, MOXIE_F1_NARG, "bad" } - }; - -const moxie_opc_info_t moxie_form2_opc_info[4] =3D - { - { 0x00, MOXIE_F2_A8V, "inc" }, - { 0x01, MOXIE_F2_A8V, "dec" }, - { 0x02, MOXIE_F2_A8V, "gsr" }, - { 0x03, MOXIE_F2_A8V, "ssr" } - }; - -const moxie_opc_info_t moxie_form3_opc_info[16] =3D - { - { 0x00, MOXIE_F3_PCREL,"beq" }, - { 0x01, MOXIE_F3_PCREL,"bne" }, - { 0x02, MOXIE_F3_PCREL,"blt" }, - { 0x03, MOXIE_F3_PCREL,"bgt" }, - { 0x04, MOXIE_F3_PCREL,"bltu" }, - { 0x05, MOXIE_F3_PCREL,"bgtu" }, - { 0x06, MOXIE_F3_PCREL,"bge" }, - { 0x07, MOXIE_F3_PCREL,"ble" }, - { 0x08, MOXIE_F3_PCREL,"bgeu" }, - { 0x09, MOXIE_F3_PCREL,"bleu" }, - { 0x0a, MOXIE_F3_NARG, "bad" }, - { 0x0b, MOXIE_F3_NARG, "bad" }, - { 0x0c, MOXIE_F3_NARG, "bad" }, - { 0x0d, MOXIE_F3_NARG, "bad" }, - { 0x0e, MOXIE_F3_NARG, "bad" }, - { 0x0f, MOXIE_F3_NARG, "bad" } - }; - -/* Macros to extract operands from the instruction word. */ -#define OP_A(i) ((i >> 4) & 0xf) -#define OP_B(i) (i & 0xf) -#define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1) - -static const char * reg_names[16] =3D - { "$fp", "$sp", "$r0", "$r1", "$r2", "$r3", "$r4", "$r5", - "$r6", "$r7", "$r8", "$r9", "$r10", "$r11", "$r12", "$r13" }; - -int -print_insn_moxie(bfd_vma addr, struct disassemble_info * info) -{ - int length =3D 2; - int status; - stream =3D info->stream; - const moxie_opc_info_t * opcode; - bfd_byte buffer[4]; - unsigned short iword; - fprintf_function fpr =3D info->fprintf_func; - - if ((status =3D info->read_memory_func(addr, buffer, 2, info))) - goto fail; - iword =3D (bfd_getb16(buffer) >> 16); - - /* Form 1 instructions have the high bit set to 0. */ - if ((iword & (1<<15)) =3D=3D 0) { - /* Extract the Form 1 opcode. */ - opcode =3D &moxie_form1_opc_info[iword >> 8]; - switch (opcode->itype) { - case MOXIE_F1_NARG: - fpr(stream, "%s", opcode->name); - break; - case MOXIE_F1_A: - fpr(stream, "%s\t%s", opcode->name, - reg_names[OP_A(iword)]); - break; - case MOXIE_F1_AB: - fpr(stream, "%s\t%s, %s", opcode->name, - reg_names[OP_A(iword)], - reg_names[OP_B(iword)]); - break; - case MOXIE_F1_A4: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr + 2, buffer, 4= , info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t%s, 0x%x", opcode->name, - reg_names[OP_A(iword)], imm); - length =3D 6; - } - break; - case MOXIE_F1_4: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr + 2, buffer, 4= , info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t0x%x", opcode->name, imm); - length =3D 6; - } - break; - case MOXIE_F1_M: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr + 2, buffer, 4= , info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t", opcode->name); - info->print_address_func((bfd_vma) imm, info); - length =3D 6; - } - break; - case MOXIE_F1_AiB: - fpr (stream, "%s\t(%s), %s", opcode->name, - reg_names[OP_A(iword)], reg_names[OP_B(iword)]); - break; - case MOXIE_F1_ABi: - fpr(stream, "%s\t%s, (%s)", opcode->name, - reg_names[OP_A(iword)], reg_names[OP_B(iword)]); - break; - case MOXIE_F1_4A: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr + 2, buffer, 4= , info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t0x%x, %s", - opcode->name, imm, reg_names[OP_A(iword)]); - length =3D 6; - } - break; - case MOXIE_F1_AiB4: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr+2, buffer, 4, = info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t0x%x(%s), %s", opcode->name, - imm, - reg_names[OP_A(iword)], - reg_names[OP_B(iword)]); - length =3D 6; - } - break; - case MOXIE_F1_ABi4: - { - unsigned imm; - if ((status =3D info->read_memory_func(addr+2, buffer, 4, = info))) - goto fail; - imm =3D bfd_getb32(buffer); - fpr(stream, "%s\t%s, 0x%x(%s)", - opcode->name, - reg_names[OP_A(iword)], - imm, - reg_names[OP_B(iword)]); - length =3D 6; - } - break; - default: - abort(); - } - } - else if ((iword & (1<<14)) =3D=3D 0) { - /* Extract the Form 2 opcode. */ - opcode =3D &moxie_form2_opc_info[(iword >> 12) & 3]; - switch (opcode->itype) { - case MOXIE_F2_A8V: - fpr(stream, "%s\t%s, 0x%x", - opcode->name, - reg_names[(iword >> 8) & 0xf], - iword & ((1 << 8) - 1)); - break; - case MOXIE_F2_NARG: - fpr(stream, "%s", opcode->name); - break; - default: - abort(); - } - } else { - /* Extract the Form 3 opcode. */ - opcode =3D &moxie_form3_opc_info[(iword >> 10) & 15]; - switch (opcode->itype) { - case MOXIE_F3_PCREL: - fpr(stream, "%s\t", opcode->name); - info->print_address_func((bfd_vma) (addr + INST2OFFSET(iword) = + 2), - info); - break; - default: - abort(); - } - } - - return length; - - fail: - info->memory_error_func(status, addr, info); - return -1; -} diff --git a/docs/system/deprecated.rst b/docs/system/deprecated.rst index 80cae86252..edebf9ecd8 100644 --- a/docs/system/deprecated.rst +++ b/docs/system/deprecated.rst @@ -198,14 +198,6 @@ from Linux upstream kernel, declare it deprecated. System emulator CPUS -------------------- =20 -``moxie`` CPU (since 5.2.0) -''''''''''''''''''''''''''' - -The ``moxie`` guest CPU support is deprecated and will be removed in -a future version of QEMU. It's unclear whether anybody is still using -CPU emulation in QEMU, and there are no test images available to make -sure that the code is still working. - ``lm32`` CPUs (since 5.2.0) ''''''''''''''''''''''''''' =20 diff --git a/docs/system/removed-features.rst b/docs/system/removed-feature= s.rst index 29e90601a5..2133a5b9eb 100644 --- a/docs/system/removed-features.rst +++ b/docs/system/removed-features.rst @@ -285,6 +285,13 @@ The RISC-V no MMU cpus have been removed. The two CPUs= : ``rv32imacu-nommu`` and ``rv64imacu-nommu`` can no longer be used. Instead the MMU status can be s= pecified via the CPU ``mmu`` option when using the ``rv32`` or ``rv64`` CPUs. =20 +``moxie`` CPU (removed in 6.1) +'''''''''''''''''''''''''''''' + +Nobody was using this CPU emulation in QEMU, and there were no test images +available to make sure that the code is still working, so it has been remo= ved +without replacement. + System emulator machines ------------------------ =20 diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index c2f87addb2..291502156e 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -149,7 +149,7 @@ static FloatParts parts_default_nan(float_status *statu= s) /* This case is true for Alpha, ARM, MIPS, OpenRISC, PPC, RISC-V, * S390, SH4, TriCore, and Xtensa. I cannot find documentation * for Unicore32; the choice from the original commit is unchanged. - * Our other supported targets, CRIS, LM32, Moxie, Nios2, and Tile, + * Our other supported targets, CRIS, LM32, and Nios2, * do not have floating-point. */ if (snan_bit_is_one(status)) { diff --git a/hw/Kconfig b/hw/Kconfig index ff40bd3f7b..559b7636f4 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -51,7 +51,6 @@ source lm32/Kconfig source m68k/Kconfig source microblaze/Kconfig source mips/Kconfig -source moxie/Kconfig source nios2/Kconfig source openrisc/Kconfig source ppc/Kconfig diff --git a/hw/meson.build b/hw/meson.build index 8ba79b1a52..503cbc974f 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -51,7 +51,6 @@ subdir('lm32') subdir('m68k') subdir('microblaze') subdir('mips') -subdir('moxie') subdir('nios2') subdir('openrisc') subdir('ppc') diff --git a/hw/moxie/Kconfig b/hw/moxie/Kconfig deleted file mode 100644 index 3793ef0372..0000000000 --- a/hw/moxie/Kconfig +++ /dev/null @@ -1,3 +0,0 @@ -config MOXIESIM - bool - select SERIAL diff --git a/hw/moxie/meson.build b/hw/moxie/meson.build deleted file mode 100644 index 05a7c2e00f..0000000000 --- a/hw/moxie/meson.build +++ /dev/null @@ -1,4 +0,0 @@ -moxie_ss =3D ss.source_set() -moxie_ss.add(when: 'CONFIG_MOXIESIM', if_true: files('moxiesim.c')) - -hw_arch +=3D {'moxie': moxie_ss} diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c deleted file mode 100644 index f7b57fcae1..0000000000 --- a/hw/moxie/moxiesim.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * QEMU/moxiesim emulation - * - * Emulates a very simple machine model similar to the one used by the - * GDB moxie simulator. - * - * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green - * - * Permission is hereby granted, free of charge, to any person obtaining a= copy - * of this software and associated documentation files (the "Software"), t= o deal - * in the Software without restriction, including without limitation the r= ights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included= in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN - * THE SOFTWARE. - */ - -#include "qemu/osdep.h" -#include "qemu/error-report.h" -#include "qapi/error.h" -#include "cpu.h" -#include "hw/sysbus.h" -#include "net/net.h" -#include "sysemu/reset.h" -#include "sysemu/sysemu.h" -#include "hw/boards.h" -#include "hw/loader.h" -#include "hw/char/serial.h" -#include "exec/address-spaces.h" -#include "elf.h" - -#define PHYS_MEM_BASE 0x80000000 -#define FIRMWARE_BASE 0x1000 -#define FIRMWARE_SIZE (128 * 0x1000) - -typedef struct { - uint64_t ram_size; - const char *kernel_filename; - const char *kernel_cmdline; - const char *initrd_filename; -} LoaderParams; - -static void load_kernel(MoxieCPU *cpu, LoaderParams *loader_params) -{ - uint64_t entry, kernel_high; - int64_t initrd_size; - long kernel_size; - ram_addr_t initrd_offset; - - kernel_size =3D load_elf(loader_params->kernel_filename, NULL, NULL, = NULL, - &entry, NULL, &kernel_high, NULL, 1, EM_MOXIE, - 0, 0); - - if (kernel_size <=3D 0) { - error_report("could not load kernel '%s'", - loader_params->kernel_filename); - exit(1); - } - - /* load initrd */ - initrd_size =3D 0; - initrd_offset =3D 0; - if (loader_params->initrd_filename) { - initrd_size =3D get_image_size(loader_params->initrd_filename); - if (initrd_size > 0) { - initrd_offset =3D (kernel_high + ~TARGET_PAGE_MASK) - & TARGET_PAGE_MASK; - if (initrd_offset + initrd_size > loader_params->ram_size) { - error_report("memory too small for initial ram disk '%s'", - loader_params->initrd_filename); - exit(1); - } - initrd_size =3D load_image_targphys(loader_params->initrd_file= name, - initrd_offset, - loader_params->ram_size); - } - if (initrd_size =3D=3D (target_ulong)-1) { - error_report("could not load initial ram disk '%s'", - loader_params->initrd_filename); - exit(1); - } - } -} - -static void main_cpu_reset(void *opaque) -{ - MoxieCPU *cpu =3D opaque; - - cpu_reset(CPU(cpu)); -} - -static void moxiesim_init(MachineState *machine) -{ - MoxieCPU *cpu =3D NULL; - ram_addr_t ram_size =3D machine->ram_size; - const char *kernel_filename =3D machine->kernel_filename; - const char *kernel_cmdline =3D machine->kernel_cmdline; - const char *initrd_filename =3D machine->initrd_filename; - CPUMoxieState *env; - MemoryRegion *address_space_mem =3D get_system_memory(); - MemoryRegion *ram =3D g_new(MemoryRegion, 1); - MemoryRegion *rom =3D g_new(MemoryRegion, 1); - hwaddr ram_base =3D 0x200000; - LoaderParams loader_params; - - /* Init CPUs. */ - cpu =3D MOXIE_CPU(cpu_create(machine->cpu_type)); - env =3D &cpu->env; - - qemu_register_reset(main_cpu_reset, cpu); - - /* Allocate RAM. */ - memory_region_init_ram(ram, NULL, "moxiesim.ram", ram_size, &error_fat= al); - memory_region_add_subregion(address_space_mem, ram_base, ram); - - memory_region_init_ram(rom, NULL, "moxie.rom", FIRMWARE_SIZE, &error_f= atal); - memory_region_add_subregion(get_system_memory(), FIRMWARE_BASE, rom); - - if (kernel_filename) { - loader_params.ram_size =3D ram_size; - loader_params.kernel_filename =3D kernel_filename; - loader_params.kernel_cmdline =3D kernel_cmdline; - loader_params.initrd_filename =3D initrd_filename; - load_kernel(cpu, &loader_params); - } - if (machine->firmware) { - if (load_image_targphys(machine->firmware, FIRMWARE_BASE, FIRMWARE= _SIZE) < 0) { - error_report("Failed to load firmware '%s'", machine->firmware= ); - } - } - - /* A single 16450 sits at offset 0x3f8. */ - if (serial_hd(0)) { - serial_mm_init(address_space_mem, 0x3f8, 0, env->irq[4], - 8000000/16, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } -} - -static void moxiesim_machine_init(MachineClass *mc) -{ - mc->desc =3D "Moxie simulator platform"; - mc->init =3D moxiesim_init; - mc->is_default =3D true; - mc->default_cpu_type =3D MOXIE_CPU_TYPE_NAME("MoxieLite"); -} - -DEFINE_MACHINE("moxiesim", moxiesim_machine_init) diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h index 13fa1edd41..038d288316 100644 --- a/include/disas/dis-asm.h +++ b/include/disas/dis-asm.h @@ -437,7 +437,6 @@ int print_insn_m32r (bfd_vma, disassemble_i= nfo*); int print_insn_m88k (bfd_vma, disassemble_info*); int print_insn_mn10200 (bfd_vma, disassemble_info*); int print_insn_mn10300 (bfd_vma, disassemble_info*); -int print_insn_moxie (bfd_vma, disassemble_info*); int print_insn_ns32k (bfd_vma, disassemble_info*); int print_insn_big_powerpc (bfd_vma, disassemble_info*); int print_insn_little_powerpc (bfd_vma, disassemble_info*); diff --git a/include/elf.h b/include/elf.h index 78237c9a87..33ed830ec3 100644 --- a/include/elf.h +++ b/include/elf.h @@ -206,9 +206,6 @@ typedef struct mips_elf_abiflags_v0 { =20 #define EM_AARCH64 183 =20 -#define EM_MOXIE 223 /* Moxie processor family */ -#define EM_MOXIE_OLD 0xFEED - #define EF_AVR_MACH 0x7F /* Mask for AVR e_flags to get core typ= e */ =20 /* This is the info that is needed to parse the dynamic section of the fil= e */ diff --git a/include/exec/poison.h b/include/exec/poison.h index 4cd3f8abb4..de972bfd8e 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -20,7 +20,6 @@ #pragma GCC poison TARGET_ABI_MIPSO32 #pragma GCC poison TARGET_MIPS64 #pragma GCC poison TARGET_ABI_MIPSN64 -#pragma GCC poison TARGET_MOXIE #pragma GCC poison TARGET_NIOS2 #pragma GCC poison TARGET_OPENRISC #pragma GCC poison TARGET_PPC @@ -79,7 +78,6 @@ #pragma GCC poison CONFIG_MICROBLAZE_DIS #pragma GCC poison CONFIG_MIPS_DIS #pragma GCC poison CONFIG_NANOMIPS_DIS -#pragma GCC poison CONFIG_MOXIE_DIS #pragma GCC poison CONFIG_NIOS2_DIS #pragma GCC poison CONFIG_PPC_DIS #pragma GCC poison CONFIG_RISCV_DIS diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 6ee458e7bc..1c37cec4ae 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -368,14 +368,6 @@ static int glue(load_elf, SZ)(const char *name, int fd, } } break; - case EM_MOXIE: - if (ehdr.e_machine !=3D EM_MOXIE) { - if (ehdr.e_machine !=3D EM_MOXIE_OLD) { - ret =3D ELF_LOAD_WRONG_ARCH; - goto fail; - } - } - break; case EM_MIPS: case EM_NANOMIPS: if ((ehdr.e_machine !=3D EM_MIPS) && diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h index 16da279696..44e3734d18 100644 --- a/include/sysemu/arch_init.h +++ b/include/sysemu/arch_init.h @@ -19,7 +19,6 @@ enum { QEMU_ARCH_XTENSA =3D (1 << 12), QEMU_ARCH_OPENRISC =3D (1 << 13), QEMU_ARCH_UNICORE32 =3D (1 << 14), - QEMU_ARCH_MOXIE =3D (1 << 15), QEMU_ARCH_TRICORE =3D (1 << 16), QEMU_ARCH_NIOS2 =3D (1 << 17), QEMU_ARCH_HPPA =3D (1 << 18), diff --git a/meson.build b/meson.build index d8bb1ec5aa..a8e42314d8 100644 --- a/meson.build +++ b/meson.build @@ -1201,7 +1201,6 @@ disassemblers =3D { 'm68k' : ['CONFIG_M68K_DIS'], 'microblaze' : ['CONFIG_MICROBLAZE_DIS'], 'mips' : ['CONFIG_MIPS_DIS'], - 'moxie' : ['CONFIG_MOXIE_DIS'], 'nios2' : ['CONFIG_NIOS2_DIS'], 'or1k' : ['CONFIG_OPENRISC_DIS'], 'ppc' : ['CONFIG_PPC_DIS'], diff --git a/qapi/machine.json b/qapi/machine.json index 6e90d463fc..f1e2ccceba 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -31,7 +31,7 @@ { 'enum' : 'SysEmuTarget', 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm= 32', 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64', - 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc', + 'mips64el', 'mipsel', 'nios2', 'or1k', 'ppc', 'ppc64', 'riscv32', 'riscv64', 'rx', 's390x', 'sh4', 'sh4eb', 'sparc', 'sparc64', 'tricore', 'unicore32', 'x86_64', 'xtensa', 'xtensaeb' ] } diff --git a/qapi/misc-target.json b/qapi/misc-target.json index 0c7491cd82..6200c671be 100644 --- a/qapi/misc-target.json +++ b/qapi/misc-target.json @@ -23,7 +23,7 @@ ## { 'event': 'RTC_CHANGE', 'data': { 'offset': 'int' }, - 'if': 'defined(TARGET_ALPHA) || defined(TARGET_ARM) || defined(TARGET_HP= PA) || defined(TARGET_I386) || defined(TARGET_MIPS) || defined(TARGET_MIPS6= 4) || defined(TARGET_MOXIE) || defined(TARGET_PPC) || defined(TARGET_PPC64)= || defined(TARGET_S390X) || defined(TARGET_SH4) || defined(TARGET_SPARC)' } + 'if': 'defined(TARGET_ALPHA) || defined(TARGET_ARM) || defined(TARGET_HP= PA) || defined(TARGET_I386) || defined(TARGET_MIPS) || defined(TARGET_MIPS6= 4) || defined(TARGET_PPC) || defined(TARGET_PPC64) || defined(TARGET_S390X)= || defined(TARGET_SH4) || defined(TARGET_SPARC)' } =20 ## # @rtc-reset-reinjection: diff --git a/softmmu/arch_init.c b/softmmu/arch_init.c index 7fd5c09b2b..23b798da94 100644 --- a/softmmu/arch_init.c +++ b/softmmu/arch_init.c @@ -66,8 +66,6 @@ int graphic_depth =3D 32; #define QEMU_ARCH QEMU_ARCH_MICROBLAZE #elif defined(TARGET_MIPS) #define QEMU_ARCH QEMU_ARCH_MIPS -#elif defined(TARGET_MOXIE) -#define QEMU_ARCH QEMU_ARCH_MOXIE #elif defined(TARGET_NIOS2) #define QEMU_ARCH QEMU_ARCH_NIOS2 #elif defined(TARGET_OPENRISC) diff --git a/target/meson.build b/target/meson.build index 0e2c4b69cb..289a654caf 100644 --- a/target/meson.build +++ b/target/meson.build @@ -9,7 +9,6 @@ subdir('lm32') subdir('m68k') subdir('microblaze') subdir('mips') -subdir('moxie') subdir('nios2') subdir('openrisc') subdir('ppc') diff --git a/target/moxie/cpu-param.h b/target/moxie/cpu-param.h deleted file mode 100644 index 9a40ef525c..0000000000 --- a/target/moxie/cpu-param.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Moxie cpu parameters for qemu. - * - * Copyright (c) 2008, 2010, 2013 Anthony Green - * SPDX-License-Identifier: LGPL-2.1+ - */ - -#ifndef MOXIE_CPU_PARAM_H -#define MOXIE_CPU_PARAM_H 1 - -#define TARGET_LONG_BITS 32 -#define TARGET_PAGE_BITS 12 /* 4k */ -#define TARGET_PHYS_ADDR_SPACE_BITS 32 -#define TARGET_VIRT_ADDR_SPACE_BITS 32 -#define NB_MMU_MODES 1 - -#endif diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c deleted file mode 100644 index 83bec34d36..0000000000 --- a/target/moxie/cpu.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * QEMU Moxie CPU - * - * Copyright (c) 2013 Anthony Green - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -#include "qemu/osdep.h" -#include "qapi/error.h" -#include "cpu.h" -#include "migration/vmstate.h" -#include "machine.h" - -static void moxie_cpu_set_pc(CPUState *cs, vaddr value) -{ - MoxieCPU *cpu =3D MOXIE_CPU(cs); - - cpu->env.pc =3D value; -} - -static bool moxie_cpu_has_work(CPUState *cs) -{ - return cs->interrupt_request & CPU_INTERRUPT_HARD; -} - -static void moxie_cpu_reset(DeviceState *dev) -{ - CPUState *s =3D CPU(dev); - MoxieCPU *cpu =3D MOXIE_CPU(s); - MoxieCPUClass *mcc =3D MOXIE_CPU_GET_CLASS(cpu); - CPUMoxieState *env =3D &cpu->env; - - mcc->parent_reset(dev); - - memset(env, 0, offsetof(CPUMoxieState, end_reset_fields)); - env->pc =3D 0x1000; -} - -static void moxie_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) -{ - info->mach =3D bfd_arch_moxie; - info->print_insn =3D print_insn_moxie; -} - -static void moxie_cpu_realizefn(DeviceState *dev, Error **errp) -{ - CPUState *cs =3D CPU(dev); - MoxieCPUClass *mcc =3D MOXIE_CPU_GET_CLASS(dev); - Error *local_err =3D NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - - qemu_init_vcpu(cs); - cpu_reset(cs); - - mcc->parent_realize(dev, errp); -} - -static void moxie_cpu_initfn(Object *obj) -{ - MoxieCPU *cpu =3D MOXIE_CPU(obj); - - cpu_set_cpustate_pointers(cpu); -} - -static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model) -{ - ObjectClass *oc; - char *typename; - - typename =3D g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model); - oc =3D object_class_by_name(typename); - g_free(typename); - if (oc !=3D NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) || - object_class_is_abstract(oc))) { - return NULL; - } - return oc; -} - -#include "hw/core/tcg-cpu-ops.h" - -static struct TCGCPUOps moxie_tcg_ops =3D { - .initialize =3D moxie_translate_init, - .tlb_fill =3D moxie_cpu_tlb_fill, - -#ifndef CONFIG_USER_ONLY - .do_interrupt =3D moxie_cpu_do_interrupt, -#endif /* !CONFIG_USER_ONLY */ -}; - -static void moxie_cpu_class_init(ObjectClass *oc, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(oc); - CPUClass *cc =3D CPU_CLASS(oc); - MoxieCPUClass *mcc =3D MOXIE_CPU_CLASS(oc); - - device_class_set_parent_realize(dc, moxie_cpu_realizefn, - &mcc->parent_realize); - device_class_set_parent_reset(dc, moxie_cpu_reset, &mcc->parent_reset); - - cc->class_by_name =3D moxie_cpu_class_by_name; - - cc->has_work =3D moxie_cpu_has_work; - cc->dump_state =3D moxie_cpu_dump_state; - cc->set_pc =3D moxie_cpu_set_pc; -#ifndef CONFIG_USER_ONLY - cc->get_phys_page_debug =3D moxie_cpu_get_phys_page_debug; - cc->vmsd =3D &vmstate_moxie_cpu; -#endif - cc->disas_set_info =3D moxie_cpu_disas_set_info; - cc->tcg_ops =3D &moxie_tcg_ops; -} - -static void moxielite_initfn(Object *obj) -{ - /* Set cpu feature flags */ -} - -static void moxie_any_initfn(Object *obj) -{ - /* Set cpu feature flags */ -} - -#define DEFINE_MOXIE_CPU_TYPE(cpu_model, initfn) \ - { \ - .parent =3D TYPE_MOXIE_CPU, \ - .instance_init =3D initfn, \ - .name =3D MOXIE_CPU_TYPE_NAME(cpu_model), \ - } - -static const TypeInfo moxie_cpus_type_infos[] =3D { - { /* base class should be registered first */ - .name =3D TYPE_MOXIE_CPU, - .parent =3D TYPE_CPU, - .instance_size =3D sizeof(MoxieCPU), - .instance_init =3D moxie_cpu_initfn, - .class_size =3D sizeof(MoxieCPUClass), - .class_init =3D moxie_cpu_class_init, - }, - DEFINE_MOXIE_CPU_TYPE("MoxieLite", moxielite_initfn), - DEFINE_MOXIE_CPU_TYPE("any", moxie_any_initfn), -}; - -DEFINE_TYPES(moxie_cpus_type_infos) diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h deleted file mode 100644 index bd6ab66084..0000000000 --- a/target/moxie/cpu.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Moxie emulation - * - * Copyright (c) 2008, 2010, 2013 Anthony Green - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -#ifndef MOXIE_CPU_H -#define MOXIE_CPU_H - -#include "exec/cpu-defs.h" -#include "qom/object.h" - -#define MOXIE_EX_DIV0 0 -#define MOXIE_EX_BAD 1 -#define MOXIE_EX_IRQ 2 -#define MOXIE_EX_SWI 3 -#define MOXIE_EX_MMU_MISS 4 -#define MOXIE_EX_BREAK 16 - -typedef struct CPUMoxieState { - - uint32_t flags; /* general execution flags */ - uint32_t gregs[16]; /* general registers */ - uint32_t sregs[256]; /* special registers */ - uint32_t pc; /* program counter */ - /* Instead of saving the cc value, we save the cmp arguments - and compute cc on demand. */ - uint32_t cc_a; /* reg a for condition code calculation = */ - uint32_t cc_b; /* reg b for condition code calculation = */ - - void *irq[8]; - - /* Fields up to this point are cleared by a CPU reset */ - struct {} end_reset_fields; -} CPUMoxieState; - -#include "hw/core/cpu.h" - -#define TYPE_MOXIE_CPU "moxie-cpu" - -OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass, - MOXIE_CPU) - -/** - * MoxieCPUClass: - * @parent_reset: The parent class' reset handler. - * - * A Moxie CPU model. - */ -struct MoxieCPUClass { - /*< private >*/ - CPUClass parent_class; - /*< public >*/ - - DeviceRealize parent_realize; - DeviceReset parent_reset; -}; - -/** - * MoxieCPU: - * @env: #CPUMoxieState - * - * A Moxie CPU. - */ -struct MoxieCPU { - /*< private >*/ - CPUState parent_obj; - /*< public >*/ - - CPUNegativeOffsetState neg; - CPUMoxieState env; -}; - - -void moxie_cpu_do_interrupt(CPUState *cs); -void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags); -hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -void moxie_translate_init(void); -int cpu_moxie_signal_handler(int host_signum, void *pinfo, - void *puc); - -#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU -#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX -#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU - -#define cpu_signal_handler cpu_moxie_signal_handler - -static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch) -{ - return 0; -} - -typedef CPUMoxieState CPUArchState; -typedef MoxieCPU ArchCPU; - -#include "exec/cpu-all.h" - -static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *= pc, - target_ulong *cs_base, uint32_t *f= lags) -{ - *pc =3D env->pc; - *cs_base =3D 0; - *flags =3D 0; -} - -bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); - -#endif /* MOXIE_CPU_H */ diff --git a/target/moxie/helper.c b/target/moxie/helper.c deleted file mode 100644 index b1919f62b3..0000000000 --- a/target/moxie/helper.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Moxie helper routines. - * - * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -#include "qemu/osdep.h" - -#include "cpu.h" -#include "mmu.h" -#include "exec/exec-all.h" -#include "exec/cpu_ldst.h" -#include "qemu/host-utils.h" -#include "exec/helper-proto.h" - -void helper_raise_exception(CPUMoxieState *env, int ex) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D ex; - /* Stash the exception type. */ - env->sregs[2] =3D ex; - /* Stash the address where the exception occurred. */ - cpu_restore_state(cs, GETPC(), true); - env->sregs[5] =3D env->pc; - /* Jump to the exception handline routine. */ - env->pc =3D env->sregs[1]; - cpu_loop_exit(cs); -} - -uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b) -{ - if (unlikely(b =3D=3D 0)) { - helper_raise_exception(env, MOXIE_EX_DIV0); - return 0; - } - if (unlikely(a =3D=3D INT_MIN && b =3D=3D -1)) { - return INT_MIN; - } - - return (int32_t)a / (int32_t)b; -} - -uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b) -{ - if (unlikely(b =3D=3D 0)) { - helper_raise_exception(env, MOXIE_EX_DIV0); - return 0; - } - return a / b; -} - -void helper_debug(CPUMoxieState *env) -{ - CPUState *cs =3D env_cpu(env); - - cs->exception_index =3D EXCP_DEBUG; - cpu_loop_exit(cs); -} - -bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr) -{ - MoxieCPU *cpu =3D MOXIE_CPU(cs); - CPUMoxieState *env =3D &cpu->env; - MoxieMMUResult res; - int prot, miss; - - address &=3D TARGET_PAGE_MASK; - prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; - miss =3D moxie_mmu_translate(&res, env, address, access_type, mmu_idx); - if (likely(!miss)) { - tlb_set_page(cs, address, res.phy, prot, mmu_idx, TARGET_PAGE_SIZE= ); - return true; - } - if (probe) { - return false; - } - - cs->exception_index =3D MOXIE_EX_MMU_MISS; - cpu_loop_exit_restore(cs, retaddr); -} - -void moxie_cpu_do_interrupt(CPUState *cs) -{ - switch (cs->exception_index) { - case MOXIE_EX_BREAK: - break; - default: - break; - } -} - -hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) -{ - MoxieCPU *cpu =3D MOXIE_CPU(cs); - uint32_t phy =3D addr; - MoxieMMUResult res; - int miss; - - miss =3D moxie_mmu_translate(&res, &cpu->env, addr, 0, 0); - if (!miss) { - phy =3D res.phy; - } - return phy; -} diff --git a/target/moxie/helper.h b/target/moxie/helper.h deleted file mode 100644 index d94ef7a17e..0000000000 --- a/target/moxie/helper.h +++ /dev/null @@ -1,5 +0,0 @@ -DEF_HELPER_2(raise_exception, void, env, int) -DEF_HELPER_1(debug, void, env) - -DEF_HELPER_FLAGS_3(div, TCG_CALL_NO_WG, i32, env, i32, i32) -DEF_HELPER_FLAGS_3(udiv, TCG_CALL_NO_WG, i32, env, i32, i32) diff --git a/target/moxie/machine.c b/target/moxie/machine.c deleted file mode 100644 index d0f177048c..0000000000 --- a/target/moxie/machine.c +++ /dev/null @@ -1,19 +0,0 @@ -#include "qemu/osdep.h" -#include "cpu.h" -#include "machine.h" -#include "migration/cpu.h" - -const VMStateDescription vmstate_moxie_cpu =3D { - .name =3D "cpu", - .version_id =3D 1, - .minimum_version_id =3D 1, - .fields =3D (VMStateField[]) { - VMSTATE_UINT32(flags, CPUMoxieState), - VMSTATE_UINT32_ARRAY(gregs, CPUMoxieState, 16), - VMSTATE_UINT32_ARRAY(sregs, CPUMoxieState, 256), - VMSTATE_UINT32(pc, CPUMoxieState), - VMSTATE_UINT32(cc_a, CPUMoxieState), - VMSTATE_UINT32(cc_b, CPUMoxieState), - VMSTATE_END_OF_LIST() - } -}; diff --git a/target/moxie/machine.h b/target/moxie/machine.h deleted file mode 100644 index a1b72907ae..0000000000 --- a/target/moxie/machine.h +++ /dev/null @@ -1 +0,0 @@ -extern const VMStateDescription vmstate_moxie_cpu; diff --git a/target/moxie/meson.build b/target/moxie/meson.build deleted file mode 100644 index b4beb528cc..0000000000 --- a/target/moxie/meson.build +++ /dev/null @@ -1,14 +0,0 @@ -moxie_ss =3D ss.source_set() -moxie_ss.add(files( - 'cpu.c', - 'helper.c', - 'machine.c', - 'machine.c', - 'translate.c', -)) - -moxie_softmmu_ss =3D ss.source_set() -moxie_softmmu_ss.add(files('mmu.c')) - -target_arch +=3D {'moxie': moxie_ss} -target_softmmu_arch +=3D {'moxie': moxie_softmmu_ss} diff --git a/target/moxie/mmu.c b/target/moxie/mmu.c deleted file mode 100644 index 87783a36f8..0000000000 --- a/target/moxie/mmu.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Moxie mmu emulation. - * - * Copyright (c) 2008, 2013 Anthony Green - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -#include "qemu/osdep.h" - -#include "cpu.h" -#include "mmu.h" - -int moxie_mmu_translate(MoxieMMUResult *res, - CPUMoxieState *env, uint32_t vaddr, - int rw, int mmu_idx) -{ - /* Perform no translation yet. */ - res->phy =3D vaddr; - return 0; -} diff --git a/target/moxie/mmu.h b/target/moxie/mmu.h deleted file mode 100644 index d80690f4d2..0000000000 --- a/target/moxie/mmu.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef TARGET_MOXIE_MMU_H -#define TARGET_MOXIE_MMU_H - -#define MOXIE_MMU_ERR_EXEC 0 -#define MOXIE_MMU_ERR_READ 1 -#define MOXIE_MMU_ERR_WRITE 2 -#define MOXIE_MMU_ERR_FLUSH 3 - -typedef struct { - uint32_t phy; - uint32_t pfn; - int cause_op; -} MoxieMMUResult; - -int moxie_mmu_translate(MoxieMMUResult *res, - CPUMoxieState *env, uint32_t vaddr, - int rw, int mmu_idx); - -#endif diff --git a/target/moxie/translate.c b/target/moxie/translate.c deleted file mode 100644 index 24a742b25e..0000000000 --- a/target/moxie/translate.c +++ /dev/null @@ -1,892 +0,0 @@ -/* - * Moxie emulation for qemu: main translation routines. - * - * Copyright (c) 2009, 2013 Anthony Green - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public License - * as published by the Free Software Foundation; either version 2.1 of - * the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this program. If not, see . - */ - -/* For information on the Moxie architecture, see - * http://moxielogic.org/wiki - */ - -#include "qemu/osdep.h" - -#include "cpu.h" -#include "exec/exec-all.h" -#include "disas/disas.h" -#include "tcg/tcg-op.h" -#include "exec/cpu_ldst.h" -#include "qemu/qemu-print.h" - -#include "exec/helper-proto.h" -#include "exec/helper-gen.h" -#include "exec/log.h" - -/* This is the state at translation time. */ -typedef struct DisasContext { - TranslationBlock *tb; - target_ulong pc, saved_pc; - uint32_t opcode; - uint32_t fp_status; - /* Routine used to access memory */ - int memidx; - int bstate; - target_ulong btarget; - int singlestep_enabled; -} DisasContext; - -enum { - BS_NONE =3D 0, /* We go out of the TB without reaching a branch or= an - * exception condition */ - BS_STOP =3D 1, /* We want to stop translation for any reason */ - BS_BRANCH =3D 2, /* We reached a branch condition */ - BS_EXCP =3D 3, /* We reached an exception condition */ -}; - -static TCGv cpu_pc; -static TCGv cpu_gregs[16]; -static TCGv cc_a, cc_b; - -#include "exec/gen-icount.h" - -#define REG(x) (cpu_gregs[x]) - -/* Extract the signed 10-bit offset from a 16-bit branch - instruction. */ -static int extract_branch_offset(int opcode) -{ - return (((signed short)((opcode & ((1 << 10) - 1)) << 6)) >> 6) << 1; -} - -void moxie_cpu_dump_state(CPUState *cs, FILE *f, int flags) -{ - MoxieCPU *cpu =3D MOXIE_CPU(cs); - CPUMoxieState *env =3D &cpu->env; - int i; - qemu_fprintf(f, "pc=3D0x%08x\n", env->pc); - qemu_fprintf(f, "$fp=3D0x%08x $sp=3D0x%08x $r0=3D0x%08x $r1=3D0x%08x\n= ", - env->gregs[0], env->gregs[1], env->gregs[2], env->gregs[3= ]); - for (i =3D 4; i < 16; i +=3D 4) { - qemu_fprintf(f, "$r%d=3D0x%08x $r%d=3D0x%08x $r%d=3D0x%08x $r%d=3D= 0x%08x\n", - i - 2, env->gregs[i], i - 1, env->gregs[i + 1], - i, env->gregs[i + 2], i + 1, env->gregs[i + 3]); - } - for (i =3D 4; i < 16; i +=3D 4) { - qemu_fprintf(f, "sr%d=3D0x%08x sr%d=3D0x%08x sr%d=3D0x%08x sr%d=3D= 0x%08x\n", - i - 2, env->sregs[i], i - 1, env->sregs[i + 1], - i, env->sregs[i + 2], i + 1, env->sregs[i + 3]); - } -} - -void moxie_translate_init(void) -{ - int i; - static const char * const gregnames[16] =3D { - "$fp", "$sp", "$r0", "$r1", - "$r2", "$r3", "$r4", "$r5", - "$r6", "$r7", "$r8", "$r9", - "$r10", "$r11", "$r12", "$r13" - }; - - cpu_pc =3D tcg_global_mem_new_i32(cpu_env, - offsetof(CPUMoxieState, pc), "$pc"); - for (i =3D 0; i < 16; i++) - cpu_gregs[i] =3D tcg_global_mem_new_i32(cpu_env, - offsetof(CPUMoxieState, greg= s[i]), - gregnames[i]); - - cc_a =3D tcg_global_mem_new_i32(cpu_env, - offsetof(CPUMoxieState, cc_a), "cc_a"); - cc_b =3D tcg_global_mem_new_i32(cpu_env, - offsetof(CPUMoxieState, cc_b), "cc_b"); -} - -static inline bool use_goto_tb(DisasContext *ctx, target_ulong dest) -{ - if (unlikely(ctx->singlestep_enabled)) { - return false; - } - -#ifndef CONFIG_USER_ONLY - return (ctx->tb->pc & TARGET_PAGE_MASK) =3D=3D (dest & TARGET_PAGE_MAS= K); -#else - return true; -#endif -} - -static inline void gen_goto_tb(CPUMoxieState *env, DisasContext *ctx, - int n, target_ulong dest) -{ - if (use_goto_tb(ctx, dest)) { - tcg_gen_goto_tb(n); - tcg_gen_movi_i32(cpu_pc, dest); - tcg_gen_exit_tb(ctx->tb, n); - } else { - tcg_gen_movi_i32(cpu_pc, dest); - if (ctx->singlestep_enabled) { - gen_helper_debug(cpu_env); - } - tcg_gen_exit_tb(NULL, 0); - } -} - -static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) -{ - CPUMoxieState *env =3D &cpu->env; - - /* Local cache for the instruction opcode. */ - int opcode; - /* Set the default instruction length. */ - int length =3D 2; - - /* Examine the 16-bit opcode. */ - opcode =3D ctx->opcode; - - /* Decode instruction. */ - if (opcode & (1 << 15)) { - if (opcode & (1 << 14)) { - /* This is a Form 3 instruction. */ - int inst =3D (opcode >> 10 & 0xf); - -#define BRANCH(cond) = \ - do { = \ - TCGLabel *l1 =3D gen_new_label(); = \ - tcg_gen_brcond_i32(cond, cc_a, cc_b, l1); = \ - gen_goto_tb(env, ctx, 1, ctx->pc+2); = \ - gen_set_label(l1); = \ - gen_goto_tb(env, ctx, 0, extract_branch_offset(opcode) + ctx->pc+2= ); \ - ctx->bstate =3D BS_BRANCH; = \ - } while (0) - - switch (inst) { - case 0x00: /* beq */ - BRANCH(TCG_COND_EQ); - break; - case 0x01: /* bne */ - BRANCH(TCG_COND_NE); - break; - case 0x02: /* blt */ - BRANCH(TCG_COND_LT); - break; - case 0x03: /* bgt */ - BRANCH(TCG_COND_GT); - break; - case 0x04: /* bltu */ - BRANCH(TCG_COND_LTU); - break; - case 0x05: /* bgtu */ - BRANCH(TCG_COND_GTU); - break; - case 0x06: /* bge */ - BRANCH(TCG_COND_GE); - break; - case 0x07: /* ble */ - BRANCH(TCG_COND_LE); - break; - case 0x08: /* bgeu */ - BRANCH(TCG_COND_GEU); - break; - case 0x09: /* bleu */ - BRANCH(TCG_COND_LEU); - break; - default: - { - TCGv temp =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(cpu_pc, ctx->pc); - tcg_gen_movi_i32(temp, MOXIE_EX_BAD); - gen_helper_raise_exception(cpu_env, temp); - tcg_temp_free_i32(temp); - } - break; - } - } else { - /* This is a Form 2 instruction. */ - int inst =3D (opcode >> 12 & 0x3); - switch (inst) { - case 0x00: /* inc */ - { - int a =3D (opcode >> 8) & 0xf; - unsigned int v =3D (opcode & 0xff); - tcg_gen_addi_i32(REG(a), REG(a), v); - } - break; - case 0x01: /* dec */ - { - int a =3D (opcode >> 8) & 0xf; - unsigned int v =3D (opcode & 0xff); - tcg_gen_subi_i32(REG(a), REG(a), v); - } - break; - case 0x02: /* gsr */ - { - int a =3D (opcode >> 8) & 0xf; - unsigned v =3D (opcode & 0xff); - tcg_gen_ld_i32(REG(a), cpu_env, - offsetof(CPUMoxieState, sregs[v])); - } - break; - case 0x03: /* ssr */ - { - int a =3D (opcode >> 8) & 0xf; - unsigned v =3D (opcode & 0xff); - tcg_gen_st_i32(REG(a), cpu_env, - offsetof(CPUMoxieState, sregs[v])); - } - break; - default: - { - TCGv temp =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(cpu_pc, ctx->pc); - tcg_gen_movi_i32(temp, MOXIE_EX_BAD); - gen_helper_raise_exception(cpu_env, temp); - tcg_temp_free_i32(temp); - } - break; - } - } - } else { - /* This is a Form 1 instruction. */ - int inst =3D opcode >> 8; - switch (inst) { - case 0x00: /* nop */ - break; - case 0x01: /* ldi.l (immediate) */ - { - int reg =3D (opcode >> 4) & 0xf; - int val =3D cpu_ldl_code(env, ctx->pc+2); - tcg_gen_movi_i32(REG(reg), val); - length =3D 6; - } - break; - case 0x02: /* mov (register-to-register) */ - { - int dest =3D (opcode >> 4) & 0xf; - int src =3D opcode & 0xf; - tcg_gen_mov_i32(REG(dest), REG(src)); - } - break; - case 0x03: /* jsra */ - { - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - - tcg_gen_movi_i32(t1, ctx->pc + 6); - - /* Make space for the static chain and return address. */ - tcg_gen_subi_i32(t2, REG(1), 8); - tcg_gen_mov_i32(REG(1), t2); - tcg_gen_qemu_st32(t1, REG(1), ctx->memidx); - - /* Push the current frame pointer. */ - tcg_gen_subi_i32(t2, REG(1), 4); - tcg_gen_mov_i32(REG(1), t2); - tcg_gen_qemu_st32(REG(0), REG(1), ctx->memidx); - - /* Set the pc and $fp. */ - tcg_gen_mov_i32(REG(0), REG(1)); - - gen_goto_tb(env, ctx, 0, cpu_ldl_code(env, ctx->pc+2)); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - ctx->bstate =3D BS_BRANCH; - length =3D 6; - } - break; - case 0x04: /* ret */ - { - TCGv t1 =3D tcg_temp_new_i32(); - - /* The new $sp is the old $fp. */ - tcg_gen_mov_i32(REG(1), REG(0)); - - /* Pop the frame pointer. */ - tcg_gen_qemu_ld32u(REG(0), REG(1), ctx->memidx); - tcg_gen_addi_i32(t1, REG(1), 4); - tcg_gen_mov_i32(REG(1), t1); - - - /* Pop the return address and skip over the static chain - slot. */ - tcg_gen_qemu_ld32u(cpu_pc, REG(1), ctx->memidx); - tcg_gen_addi_i32(t1, REG(1), 8); - tcg_gen_mov_i32(REG(1), t1); - - tcg_temp_free_i32(t1); - - /* Jump... */ - tcg_gen_exit_tb(NULL, 0); - - ctx->bstate =3D BS_BRANCH; - } - break; - case 0x05: /* add.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_add_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x06: /* push */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - tcg_gen_subi_i32(t1, REG(a), 4); - tcg_gen_mov_i32(REG(a), t1); - tcg_gen_qemu_st32(REG(b), REG(a), ctx->memidx); - tcg_temp_free_i32(t1); - } - break; - case 0x07: /* pop */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - TCGv t1 =3D tcg_temp_new_i32(); - - tcg_gen_qemu_ld32u(REG(b), REG(a), ctx->memidx); - tcg_gen_addi_i32(t1, REG(a), 4); - tcg_gen_mov_i32(REG(a), t1); - tcg_temp_free_i32(t1); - } - break; - case 0x08: /* lda.l */ - { - int reg =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld32u(REG(reg), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x09: /* sta.l */ - { - int val =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st32(REG(val), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x0a: /* ld.l (register indirect) */ - { - int src =3D opcode & 0xf; - int dest =3D (opcode >> 4) & 0xf; - - tcg_gen_qemu_ld32u(REG(dest), REG(src), ctx->memidx); - } - break; - case 0x0b: /* st.l */ - { - int dest =3D (opcode >> 4) & 0xf; - int val =3D opcode & 0xf; - - tcg_gen_qemu_st32(REG(val), REG(dest), ctx->memidx); - } - break; - case 0x0c: /* ldo.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld32u(t2, t1, ctx->memidx); - tcg_gen_mov_i32(REG(a), t2); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - case 0x0d: /* sto.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st32(REG(b), t1, ctx->memidx); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - case 0x0e: /* cmp */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_mov_i32(cc_a, REG(a)); - tcg_gen_mov_i32(cc_b, REG(b)); - } - break; - case 0x19: /* jsr */ - { - int fnreg =3D (opcode >> 4) & 0xf; - - /* Load the stack pointer into T0. */ - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - - tcg_gen_movi_i32(t1, ctx->pc+2); - - /* Make space for the static chain and return address. */ - tcg_gen_subi_i32(t2, REG(1), 8); - tcg_gen_mov_i32(REG(1), t2); - tcg_gen_qemu_st32(t1, REG(1), ctx->memidx); - - /* Push the current frame pointer. */ - tcg_gen_subi_i32(t2, REG(1), 4); - tcg_gen_mov_i32(REG(1), t2); - tcg_gen_qemu_st32(REG(0), REG(1), ctx->memidx); - - /* Set the pc and $fp. */ - tcg_gen_mov_i32(REG(0), REG(1)); - tcg_gen_mov_i32(cpu_pc, REG(fnreg)); - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - tcg_gen_exit_tb(NULL, 0); - ctx->bstate =3D BS_BRANCH; - } - break; - case 0x1a: /* jmpa */ - { - tcg_gen_movi_i32(cpu_pc, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_exit_tb(NULL, 0); - ctx->bstate =3D BS_BRANCH; - length =3D 6; - } - break; - case 0x1b: /* ldi.b (immediate) */ - { - int reg =3D (opcode >> 4) & 0xf; - int val =3D cpu_ldl_code(env, ctx->pc+2); - tcg_gen_movi_i32(REG(reg), val); - length =3D 6; - } - break; - case 0x1c: /* ld.b (register indirect) */ - { - int src =3D opcode & 0xf; - int dest =3D (opcode >> 4) & 0xf; - - tcg_gen_qemu_ld8u(REG(dest), REG(src), ctx->memidx); - } - break; - case 0x1d: /* lda.b */ - { - int reg =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld8u(REG(reg), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x1e: /* st.b */ - { - int dest =3D (opcode >> 4) & 0xf; - int val =3D opcode & 0xf; - - tcg_gen_qemu_st8(REG(val), REG(dest), ctx->memidx); - } - break; - case 0x1f: /* sta.b */ - { - int val =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st8(REG(val), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x20: /* ldi.s (immediate) */ - { - int reg =3D (opcode >> 4) & 0xf; - int val =3D cpu_ldl_code(env, ctx->pc+2); - tcg_gen_movi_i32(REG(reg), val); - length =3D 6; - } - break; - case 0x21: /* ld.s (register indirect) */ - { - int src =3D opcode & 0xf; - int dest =3D (opcode >> 4) & 0xf; - - tcg_gen_qemu_ld16u(REG(dest), REG(src), ctx->memidx); - } - break; - case 0x22: /* lda.s */ - { - int reg =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld16u(REG(reg), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x23: /* st.s */ - { - int dest =3D (opcode >> 4) & 0xf; - int val =3D opcode & 0xf; - - tcg_gen_qemu_st16(REG(val), REG(dest), ctx->memidx); - } - break; - case 0x24: /* sta.s */ - { - int val =3D (opcode >> 4) & 0xf; - - TCGv ptr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(ptr, cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st16(REG(val), ptr, ctx->memidx); - tcg_temp_free_i32(ptr); - - length =3D 6; - } - break; - case 0x25: /* jmp */ - { - int reg =3D (opcode >> 4) & 0xf; - tcg_gen_mov_i32(cpu_pc, REG(reg)); - tcg_gen_exit_tb(NULL, 0); - ctx->bstate =3D BS_BRANCH; - } - break; - case 0x26: /* and */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_and_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x27: /* lshr */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv sv =3D tcg_temp_new_i32(); - tcg_gen_andi_i32(sv, REG(b), 0x1f); - tcg_gen_shr_i32(REG(a), REG(a), sv); - tcg_temp_free_i32(sv); - } - break; - case 0x28: /* ashl */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv sv =3D tcg_temp_new_i32(); - tcg_gen_andi_i32(sv, REG(b), 0x1f); - tcg_gen_shl_i32(REG(a), REG(a), sv); - tcg_temp_free_i32(sv); - } - break; - case 0x29: /* sub.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_sub_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x2a: /* neg */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_neg_i32(REG(a), REG(b)); - } - break; - case 0x2b: /* or */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_or_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x2c: /* not */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_not_i32(REG(a), REG(b)); - } - break; - case 0x2d: /* ashr */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv sv =3D tcg_temp_new_i32(); - tcg_gen_andi_i32(sv, REG(b), 0x1f); - tcg_gen_sar_i32(REG(a), REG(a), sv); - tcg_temp_free_i32(sv); - } - break; - case 0x2e: /* xor */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_xor_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x2f: /* mul.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - tcg_gen_mul_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x30: /* swi */ - { - int val =3D cpu_ldl_code(env, ctx->pc+2); - - TCGv temp =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(temp, val); - tcg_gen_st_i32(temp, cpu_env, - offsetof(CPUMoxieState, sregs[3])); - tcg_gen_movi_i32(cpu_pc, ctx->pc); - tcg_gen_movi_i32(temp, MOXIE_EX_SWI); - gen_helper_raise_exception(cpu_env, temp); - tcg_temp_free_i32(temp); - - length =3D 6; - } - break; - case 0x31: /* div.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - tcg_gen_movi_i32(cpu_pc, ctx->pc); - gen_helper_div(REG(a), cpu_env, REG(a), REG(b)); - } - break; - case 0x32: /* udiv.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - tcg_gen_movi_i32(cpu_pc, ctx->pc); - gen_helper_udiv(REG(a), cpu_env, REG(a), REG(b)); - } - break; - case 0x33: /* mod.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - tcg_gen_rem_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x34: /* umod.l */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - tcg_gen_remu_i32(REG(a), REG(a), REG(b)); - } - break; - case 0x35: /* brk */ - { - TCGv temp =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(cpu_pc, ctx->pc); - tcg_gen_movi_i32(temp, MOXIE_EX_BREAK); - gen_helper_raise_exception(cpu_env, temp); - tcg_temp_free_i32(temp); - } - break; - case 0x36: /* ldo.b */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld8u(t2, t1, ctx->memidx); - tcg_gen_mov_i32(REG(a), t2); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - case 0x37: /* sto.b */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st8(REG(b), t1, ctx->memidx); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - case 0x38: /* ldo.s */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(b), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_ld16u(t2, t1, ctx->memidx); - tcg_gen_mov_i32(REG(a), t2); - - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - case 0x39: /* sto.s */ - { - int a =3D (opcode >> 4) & 0xf; - int b =3D opcode & 0xf; - - TCGv t1 =3D tcg_temp_new_i32(); - TCGv t2 =3D tcg_temp_new_i32(); - tcg_gen_addi_i32(t1, REG(a), cpu_ldl_code(env, ctx->pc+2)); - tcg_gen_qemu_st16(REG(b), t1, ctx->memidx); - tcg_temp_free_i32(t1); - tcg_temp_free_i32(t2); - - length =3D 6; - } - break; - default: - { - TCGv temp =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(cpu_pc, ctx->pc); - tcg_gen_movi_i32(temp, MOXIE_EX_BAD); - gen_helper_raise_exception(cpu_env, temp); - tcg_temp_free_i32(temp); - } - break; - } - } - - return length; -} - -/* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_ins= ns) -{ - CPUMoxieState *env =3D cs->env_ptr; - MoxieCPU *cpu =3D env_archcpu(env); - DisasContext ctx; - target_ulong pc_start; - int num_insns; - - pc_start =3D tb->pc; - ctx.pc =3D pc_start; - ctx.saved_pc =3D -1; - ctx.tb =3D tb; - ctx.memidx =3D 0; - ctx.singlestep_enabled =3D 0; - ctx.bstate =3D BS_NONE; - num_insns =3D 0; - - gen_tb_start(tb); - do { - tcg_gen_insn_start(ctx.pc); - num_insns++; - - if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) { - tcg_gen_movi_i32(cpu_pc, ctx.pc); - gen_helper_debug(cpu_env); - ctx.bstate =3D BS_EXCP; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - ctx.pc +=3D 2; - goto done_generating; - } - - ctx.opcode =3D cpu_lduw_code(env, ctx.pc); - ctx.pc +=3D decode_opc(cpu, &ctx); - - if (num_insns >=3D max_insns) { - break; - } - if (cs->singlestep_enabled) { - break; - } - if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) =3D=3D 0) { - break; - } - } while (ctx.bstate =3D=3D BS_NONE && !tcg_op_buf_full()); - - if (cs->singlestep_enabled) { - tcg_gen_movi_tl(cpu_pc, ctx.pc); - gen_helper_debug(cpu_env); - } else { - switch (ctx.bstate) { - case BS_STOP: - case BS_NONE: - gen_goto_tb(env, &ctx, 0, ctx.pc); - break; - case BS_EXCP: - tcg_gen_exit_tb(NULL, 0); - break; - case BS_BRANCH: - default: - break; - } - } - done_generating: - gen_tb_end(tb, num_insns); - - tb->size =3D ctx.pc - pc_start; - tb->icount =3D num_insns; -} - -void restore_state_to_opc(CPUMoxieState *env, TranslationBlock *tb, - target_ulong *data) -{ - env->pc =3D data[0]; -} diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c index d74509b1c5..d40adddafa 100644 --- a/tests/qtest/boot-serial-test.c +++ b/tests/qtest/boot-serial-test.c @@ -61,13 +61,6 @@ static const uint8_t kernel_plml605[] =3D { 0xfc, 0xff, 0x00, 0xb8 /* bri -4 loop */ }; =20 -static const uint8_t bios_moxiesim[] =3D { - 0x20, 0x10, 0x00, 0x00, 0x03, 0xf8, /* ldi.s r1,0x3f8 */ - 0x1b, 0x20, 0x00, 0x00, 0x00, 0x54, /* ldi.b r2,'T' */ - 0x1e, 0x12, /* st.b r1,r2 */ - 0x1a, 0x00, 0x00, 0x00, 0x10, 0x00 /* jmpa 0x1000 */ -}; - static const uint8_t bios_raspi2[] =3D { 0x08, 0x30, 0x9f, 0xe5, /* ldr r3,[pc,#8] Get bas= e */ 0x54, 0x20, 0xa0, 0xe3, /* mov r2,#'T' */ @@ -145,7 +138,6 @@ static testdef_t tests[] =3D { sizeof(kernel_pls3adsp1800), kernel_pls3adsp1800 }, { "microblazeel", "petalogix-ml605", "", "TT", sizeof(kernel_plml605), kernel_plml605 }, - { "moxie", "moxiesim", "", "TT", sizeof(bios_moxiesim), 0, bios_moxies= im }, { "arm", "raspi2", "", "TT", sizeof(bios_raspi2), 0, bios_raspi2 }, /* For hppa, force bios to output to serial by disabling graphics. */ { "hppa", "hppa", "-vga none", "SeaBIOS wants SYSTEM HALT" }, diff --git a/tests/qtest/machine-none-test.c b/tests/qtest/machine-none-tes= t.c index aab06b9fc2..5feada15dc 100644 --- a/tests/qtest/machine-none-test.c +++ b/tests/qtest/machine-none-test.c @@ -40,7 +40,6 @@ static struct arch2cpu cpus_map[] =3D { { "mipsel", "I7200" }, { "mips64", "20Kc" }, { "mips64el", "I6500" }, - { "moxie", "MoxieLite" }, { "nios2", "FIXME" }, { "or1k", "or1200" }, { "ppc", "604" }, diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index 0c76738921..3abaab596a 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -126,8 +126,6 @@ qtests_mips64el =3D \ (config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] = : []) + \ (config_all_devices.has_key('CONFIG_VGA') ? ['display-vga-test'] : []) =20 -qtests_moxie =3D [ 'boot-serial-test' ] - qtests_ppc =3D \ (config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] = : []) + \ (config_all_devices.has_key('CONFIG_M48T59') ? ['m48t59-test'] : []) + = \ --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620038855; cv=none; d=zohomail.com; s=zohoarc; b=lGgGptBnKTbgKGFhbF6NJDyI7lu05NJ2U/6WtV0Or3qTo47znUAwD3K1Yu7LZhXBw3cbvaTpMk2uJvQTUE7CSkW7KdM2mT2NWQDMi9Ns2/1sFe58EerLTng9IUGVByXd5pfX/R4y9Tbaun+BPgrbVNT7xX/TCs09/swfXeJHTRI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620038855; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=50nK3eQJeYnjGF/obTurUMSfugLrcaikTvfgKjpL2yc=; b=cKpN9J1IiWgAv+sUdcKHDevsVL4vF3NtcqJ+W8K70c9CMn+kWky7s2ggE5bX8lhwIZsVGktUyV4DNbkYJveHm/zoarM/TuPd19+D9+KazNCuVLShO48Q4lwcfo627u2YzC7EEBdRU8vQuQg5AGHQJ3yEwoXtOJookp4gwnAh7oo= ARC-Authentication-Results: i=1; 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Mon, 03 May 2021 06:45:06 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-57-q0T6-_tKMf2ZNmD873TBug-1; Mon, 03 May 2021 06:45:02 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 85C0C512A; Mon, 3 May 2021 10:45:01 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id D593E5D9D5; Mon, 3 May 2021 10:45:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038704; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=50nK3eQJeYnjGF/obTurUMSfugLrcaikTvfgKjpL2yc=; b=RdYtabHAWNqwMqNkIyrRY/zGt5uYixXPorPW5wBcv4meAJvsUaSQMch+7VaQ6BNbIZbvrq b6/zGqMnQUrCTwRZBJBKwRnAkm7InRBV3Fmp35/zxpXklMDL9VPrpR9i5VSNfNWyn0UQzB UdULwpDQ/F0ehxR8cNAq0TePXXp3Pag= X-MC-Unique: q0T6-_tKMf2ZNmD873TBug-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 02/10] tests/docker/dockerfiles: Add ccache to containers where it was missing Date: Mon, 3 May 2021 12:44:48 +0200 Message-Id: <20210503104456.1036472-3-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Make sure that ccache is available in all containers. Message-Id: <20210414081907.871437-2-thuth@redhat.com> Signed-off-by: Thomas Huth --- tests/docker/dockerfiles/alpine.docker | 1 + tests/docker/dockerfiles/fedora-i386-cross.docker | 1 + tests/docker/dockerfiles/fedora-win32-cross.docker | 1 + tests/docker/dockerfiles/fedora-win64-cross.docker | 1 + tests/docker/dockerfiles/opensuse-leap.docker | 1 + 5 files changed, 5 insertions(+) diff --git a/tests/docker/dockerfiles/alpine.docker b/tests/docker/dockerfi= les/alpine.docker index d63a269aef..a1ef408a6a 100644 --- a/tests/docker/dockerfiles/alpine.docker +++ b/tests/docker/dockerfiles/alpine.docker @@ -9,6 +9,7 @@ ENV PACKAGES \ alsa-lib-dev \ bash \ binutils \ + ccache \ coreutils \ curl-dev \ g++ \ diff --git a/tests/docker/dockerfiles/fedora-i386-cross.docker b/tests/dock= er/dockerfiles/fedora-i386-cross.docker index 966072c08e..66cdb06c19 100644 --- a/tests/docker/dockerfiles/fedora-i386-cross.docker +++ b/tests/docker/dockerfiles/fedora-i386-cross.docker @@ -1,6 +1,7 @@ FROM fedora:33 ENV PACKAGES \ bzip2 \ + ccache \ diffutils \ findutils \ gcc \ diff --git a/tests/docker/dockerfiles/fedora-win32-cross.docker b/tests/doc= ker/dockerfiles/fedora-win32-cross.docker index 81b5659e9c..3733df63e9 100644 --- a/tests/docker/dockerfiles/fedora-win32-cross.docker +++ b/tests/docker/dockerfiles/fedora-win32-cross.docker @@ -4,6 +4,7 @@ FROM fedora:33 ENV PACKAGES \ bc \ bzip2 \ + ccache \ diffutils \ findutils \ gcc \ diff --git a/tests/docker/dockerfiles/fedora-win64-cross.docker b/tests/doc= ker/dockerfiles/fedora-win64-cross.docker index bcb428e724..2564ce4979 100644 --- a/tests/docker/dockerfiles/fedora-win64-cross.docker +++ b/tests/docker/dockerfiles/fedora-win64-cross.docker @@ -4,6 +4,7 @@ FROM fedora:33 ENV PACKAGES \ bc \ bzip2 \ + ccache \ diffutils \ findutils \ gcc \ diff --git a/tests/docker/dockerfiles/opensuse-leap.docker b/tests/docker/d= ockerfiles/opensuse-leap.docker index 0e64893e4a..f7e1cbfbe6 100644 --- a/tests/docker/dockerfiles/opensuse-leap.docker +++ b/tests/docker/dockerfiles/opensuse-leap.docker @@ -5,6 +5,7 @@ ENV PACKAGES \ bc \ brlapi-devel \ bzip2 \ + ccache \ cyrus-sasl-devel \ gcc \ gcc-c++ \ --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Mon, 03 May 2021 06:45:08 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-48-nWo_K0-6PoSmAU9u42zxEQ-1; Mon, 03 May 2021 06:45:03 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 83D481020C20; Mon, 3 May 2021 10:45:02 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id D2F105D9DD; Mon, 3 May 2021 10:45:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038705; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hTgrmVJ7TdO8X5uWM/1Wiki4sUr+Mf9nmk/lku0ePeM=; b=d48j+8WJS2WXOyUUjhZHsJZOaMdtgUTBF+3mGJ6x9O0wdYxxRmZ/VLYU/lkoMOt/gsItKw N/CVNFl7qTrW7y/f/vFQP0F8KnUl5XqdzizQKPCYmYlDcDDem7xVOLx3cEwE+Z5CLfb+xp wLi50RQmgKlazzl+19ZL+BUeuwX/ROk= X-MC-Unique: nWo_K0-6PoSmAU9u42zxEQ-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 03/10] include/sysemu: Poison all accelerator CONFIG switches in common code Date: Mon, 3 May 2021 12:44:49 +0200 Message-Id: <20210503104456.1036472-4-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" We are already poisoning CONFIG_KVM since this switch is not working in common code. Do the same with the other accelerator switches, too (except for CONFIG_TCG, which is special, since it is also defined in config-host.h). Message-Id: <20210414112004.943383-2-thuth@redhat.com> Signed-off-by: Thomas Huth --- include/exec/poison.h | 4 ++++ include/sysemu/hax.h | 4 ++++ include/sysemu/hvf.h | 4 ++++ include/sysemu/whpx.h | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/include/exec/poison.h b/include/exec/poison.h index de972bfd8e..f769dcc781 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -86,8 +86,12 @@ #pragma GCC poison CONFIG_SPARC_DIS #pragma GCC poison CONFIG_XTENSA_DIS =20 +#pragma GCC poison CONFIG_HAX +#pragma GCC poison CONFIG_HVF #pragma GCC poison CONFIG_LINUX_USER #pragma GCC poison CONFIG_KVM #pragma GCC poison CONFIG_SOFTMMU +#pragma GCC poison CONFIG_WHPX +#pragma GCC poison CONFIG_XEN =20 #endif diff --git a/include/sysemu/hax.h b/include/sysemu/hax.h index 12fb54f990..247f0661d1 100644 --- a/include/sysemu/hax.h +++ b/include/sysemu/hax.h @@ -24,6 +24,8 @@ =20 int hax_sync_vcpus(void); =20 +#ifdef NEED_CPU_H + #ifdef CONFIG_HAX =20 int hax_enabled(void); @@ -34,4 +36,6 @@ int hax_enabled(void); =20 #endif /* CONFIG_HAX */ =20 +#endif /* NEED_CPU_H */ + #endif /* QEMU_HAX_H */ diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h index c98636bc81..bb70082e45 100644 --- a/include/sysemu/hvf.h +++ b/include/sysemu/hvf.h @@ -16,6 +16,8 @@ #include "qemu/accel.h" #include "qom/object.h" =20 +#ifdef NEED_CPU_H + #ifdef CONFIG_HVF uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg); @@ -26,6 +28,8 @@ extern bool hvf_allowed; #define hvf_get_supported_cpuid(func, idx, reg) 0 #endif /* !CONFIG_HVF */ =20 +#endif /* NEED_CPU_H */ + #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf") =20 typedef struct HVFState HVFState; diff --git a/include/sysemu/whpx.h b/include/sysemu/whpx.h index 8ca1c1c4ac..2889fa2278 100644 --- a/include/sysemu/whpx.h +++ b/include/sysemu/whpx.h @@ -13,6 +13,8 @@ #ifndef QEMU_WHPX_H #define QEMU_WHPX_H =20 +#ifdef NEED_CPU_H + #ifdef CONFIG_WHPX =20 int whpx_enabled(void); @@ -25,4 +27,6 @@ bool whpx_apic_in_platform(void); =20 #endif /* CONFIG_WHPX */ =20 +#endif /* NEED_CPU_H */ + #endif /* QEMU_WHPX_H */ --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=0u+HFQE9R543mvapNT6gTSZfmmSTP9eHoQgd9lft0fU=; b=OIUtz9wdSyyY6UNqf3eSEu00JjN2Xf6u8qUKxQkB+1UAZ83cSNBdRaXDM6kH+Rf9hhwa2A umktvsdpEDIDV0i4oIVh/rA2fZTaIWaIXBZ4EpiVdFTcEfbMKvxfZ6R7d2130Tj6+Vaxp9 IUssAgE29b+sVBFuI0Utxw760H0YTv8= X-MC-Unique: 0H0oVdObPnGVr1UnY-67IA-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 04/10] gitlab-ci: Replace YAML anchors by extends (container_job) Date: Mon, 3 May 2021 12:44:50 +0200 Message-Id: <20210503104456.1036472-5-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) From: Philippe Mathieu-Daud=C3=A9 'extends' is an alternative to using YAML anchors and is a little more flexible and readable. See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210418233448.1267991-2-f4bug@amsat.org> Signed-off-by: Thomas Huth --- .gitlab-ci.d/containers.yml | 76 ++++++++++++++++++------------------- 1 file changed, 38 insertions(+), 38 deletions(-) diff --git a/.gitlab-ci.d/containers.yml b/.gitlab-ci.d/containers.yml index 33e4046e23..4ef76d1f54 100644 --- a/.gitlab-ci.d/containers.yml +++ b/.gitlab-ci.d/containers.yml @@ -1,4 +1,4 @@ -.container_job_template: &container_job_definition +.container_job_template: image: docker:stable stage: containers services: @@ -22,230 +22,230 @@ - docker logout =20 amd64-alpine-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: alpine =20 amd64-centos7-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: centos7 =20 amd64-centos8-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: centos8 =20 amd64-debian10-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: debian10 =20 amd64-debian11-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: debian11 =20 alpha-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-alpha-cross =20 amd64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-amd64-cross =20 amd64-debian-user-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-all-test-cross =20 amd64-debian-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-amd64 =20 arm64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-arm64-cross =20 arm64-test-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian11-container'] variables: NAME: debian-arm64-test-cross =20 armel-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-armel-cross =20 armhf-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-armhf-cross =20 hppa-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-hppa-cross =20 m68k-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-m68k-cross =20 mips64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-mips64-cross =20 mips64el-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-mips64el-cross =20 mips-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-mips-cross =20 mipsel-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-mipsel-cross =20 powerpc-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-powerpc-cross =20 ppc64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-ppc64-cross =20 ppc64el-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-ppc64el-cross =20 riscv64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-riscv64-cross =20 s390x-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-s390x-cross =20 sh4-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-sh4-cross =20 sparc64-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-sparc64-cross =20 tricore-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template stage: containers-layer2 needs: ['amd64-debian10-container'] variables: NAME: debian-tricore-cross =20 xtensa-debian-cross-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: debian-xtensa-cross =20 cris-fedora-cross-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: fedora-cris-cross =20 amd64-fedora-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: fedora =20 i386-fedora-cross-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: fedora-i386-cross =20 win32-fedora-cross-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: fedora-win32-cross =20 win64-fedora-cross-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: fedora-win64-cross =20 amd64-ubuntu1804-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: ubuntu1804 =20 amd64-ubuntu2004-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: ubuntu2004 =20 amd64-ubuntu-container: - <<: *container_job_definition + extends: .container_job_template variables: NAME: ubuntu =20 amd64-opensuse-leap-container: - <<: *container_job_definition + extends: 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X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) From: Philippe Mathieu-Daud=C3=A9 'extends' is an alternative to using YAML anchors and is a little more flexible and readable. See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210418233448.1267991-3-f4bug@amsat.org> Signed-off-by: Thomas Huth --- .gitlab-ci.yml | 64 +++++++++++++++++++++++++------------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 9970d91809..442e78a0a7 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -13,7 +13,7 @@ include: - local: '/.gitlab-ci.d/containers.yml' - local: '/.gitlab-ci.d/crossbuilds.yml' =20 -.native_build_job_template: &native_build_job_definition +.native_build_job_template: stage: build image: $CI_REGISTRY_IMAGE/qemu/$IMAGE:latest before_script: @@ -79,7 +79,7 @@ include: - du -chs ${CI_PROJECT_DIR}/avocado-cache =20 build-system-alpine: - <<: *native_build_job_definition + extends: .native_build_job_template needs: - job: amd64-alpine-container variables: @@ -114,7 +114,7 @@ acceptance-system-alpine: <<: *acceptance_definition =20 build-system-ubuntu: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-ubuntu2004-container variables: @@ -148,7 +148,7 @@ acceptance-system-ubuntu: <<: *acceptance_definition =20 build-system-debian: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-container variables: @@ -182,7 +182,7 @@ acceptance-system-debian: <<: *acceptance_definition =20 build-system-fedora: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-fedora-container variables: @@ -217,7 +217,7 @@ acceptance-system-fedora: <<: *acceptance_definition =20 build-system-centos: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos8-container variables: @@ -252,7 +252,7 @@ acceptance-system-centos: <<: *acceptance_definition =20 build-system-opensuse: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-opensuse-leap-container variables: @@ -286,7 +286,7 @@ acceptance-system-opensuse: =20 =20 build-disabled: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-fedora-container variables: @@ -373,7 +373,7 @@ build-disabled: # Also use a different coroutine implementation (which is only really of # interest to KVM users, i.e. with TCG disabled) build-tcg-disabled: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos8-container variables: @@ -396,7 +396,7 @@ build-tcg-disabled: 260 261 262 263 264 270 272 273 277 279 =20 build-user: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -405,7 +405,7 @@ build-user: MAKE_CHECK_ARGS: check-tcg =20 build-user-static: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -415,7 +415,7 @@ build-user-static: =20 # Only build the softmmu targets we have check-tcg tests for build-some-softmmu: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -428,7 +428,7 @@ build-some-softmmu: # we skip sparc64-linux-user until it has been fixed somewhat # we skip cris-linux-user as it doesn't use the common run loop build-user-plugins: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -438,7 +438,7 @@ build-user-plugins: timeout: 1h 30m =20 build-user-centos7: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos7-container variables: @@ -447,7 +447,7 @@ build-user-centos7: MAKE_CHECK_ARGS: check-tcg =20 build-some-softmmu-plugins: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -457,7 +457,7 @@ build-some-softmmu-plugins: MAKE_CHECK_ARGS: check-tcg =20 clang-system: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-fedora-container variables: @@ -469,7 +469,7 @@ clang-system: MAKE_CHECK_ARGS: check-qtest check-tcg =20 clang-user: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -491,7 +491,7 @@ clang-user: # Split in three sets of build/check/acceptance to limit the execution tim= e of each # job build-cfi-aarch64: - <<: *native_build_job_definition + extends: .native_build_job_template needs: - job: amd64-fedora-container variables: @@ -528,7 +528,7 @@ acceptance-cfi-aarch64: <<: *acceptance_definition =20 build-cfi-ppc64-s390x: - <<: *native_build_job_definition + extends: .native_build_job_template needs: - job: amd64-fedora-container variables: @@ -565,7 +565,7 @@ acceptance-cfi-ppc64-s390x: <<: *acceptance_definition =20 build-cfi-x86_64: - <<: *native_build_job_definition + extends: .native_build_job_template needs: - job: amd64-fedora-container variables: @@ -602,7 +602,7 @@ acceptance-cfi-x86_64: <<: *acceptance_definition =20 tsan-build: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-ubuntu2004-container variables: @@ -614,7 +614,7 @@ tsan-build: =20 # These targets are on the way out build-deprecated: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -641,7 +641,7 @@ check-deprecated: =20 # gprof/gcov are GCC features gprof-gcov: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-ubuntu2004-container variables: @@ -654,7 +654,7 @@ gprof-gcov: - ${CI_PROJECT_DIR}/scripts/ci/coverage-summary.sh =20 build-oss-fuzz: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-fedora-container variables: @@ -674,7 +674,7 @@ build-oss-fuzz: - cd build-oss-fuzz && make check-qtest-i386 check-unit =20 build-tci: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-user-cross-container variables: @@ -699,7 +699,7 @@ build-tci: # Alternate coroutines implementations are only really of interest to KVM = users # However we can't test against KVM on Gitlab-CI so we can only run unit t= ests build-coroutine-sigaltstack: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-ubuntu2004-container variables: @@ -713,7 +713,7 @@ build-coroutine-sigaltstack: # These jobs test old gcrypt and nettle from RHEL7 # which had some API differences. crypto-old-nettle: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos7-container variables: @@ -723,7 +723,7 @@ crypto-old-nettle: MAKE_CHECK_ARGS: check =20 crypto-old-gcrypt: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos7-container variables: @@ -733,7 +733,7 @@ crypto-old-gcrypt: MAKE_CHECK_ARGS: check =20 crypto-only-gnutls: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos7-container variables: @@ -745,7 +745,7 @@ crypto-only-gnutls: =20 # Check our reduced build configurations build-without-default-devices: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-centos8-container variables: @@ -753,7 +753,7 @@ build-without-default-devices: CONFIGURE_ARGS: --without-default-devices --disable-user =20 build-without-default-features: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-container variables: @@ -803,7 +803,7 @@ build-libvhost-user: # No targets are built here, just tools, docs, and unit tests. This # also feeds into the eventual documentation deployment steps later build-tools-and-docs-debian: - <<: *native_build_job_definition + extends: .native_build_job_template needs: job: amd64-debian-container variables: --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620038997; cv=none; d=zohomail.com; s=zohoarc; b=NBk2Q+DYcfA/1/KGOUdkRsaa0RmLZOGylx6lMFmNZEJcCGhNXux2ecW1LPQ4agf4KTNsFM+uVAFNwfLy9zVN6WbSua9dZps4yRtOHttqWmDG0CrlQRcVMJPdt7xHmmOrR7op/jU52/wbgH2Q1PUEjUcmmApk/VhYyrrUW5sEtro= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620038997; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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d=redhat.com; s=mimecast20190719; t=1620038716; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yV7JXyljJqqL4uQC7gBZIedJt1wWaNNxCcwEZecXOMc=; b=RCgKYzbXVtbrossmOwLrbZY+NTBDChqpClAMw4p7yJX6tw7MUp0N2PLzSViOu09pPdH4MS 4Pzok08blZLwOizUR7XK7dEsZkO/q80GWEn+3UX3Ho0j2QpSh5oguBYrQ4hzuG6a2SiXBI u9V9MmCrAwonIbLdZ3xWIXn4rdhDGlo= X-MC-Unique: _qGs7KluMrOHpxMPjABCyQ-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 06/10] gitlab-ci: Replace YAML anchors by extends (native_test_job) Date: Mon, 3 May 2021 12:44:52 +0200 Message-Id: <20210503104456.1036472-7-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; 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See: https://docs.gitlab.com/ee/ci/yaml/#extends Reviewed-by: Wainer dos Santos Moschetta Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210418233448.1267991-4-f4bug@amsat.org> Signed-off-by: Thomas Huth --- .gitlab-ci.yml | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 442e78a0a7..f01a1dbd7c 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -37,7 +37,7 @@ include: make -j"$JOBS" $MAKE_CHECK_ARGS ; fi =20 -.native_test_job_template: &native_test_job_definition +.native_test_job_template: stage: test image: $CI_REGISTRY_IMAGE/qemu/$IMAGE:latest script: @@ -95,7 +95,7 @@ build-system-alpine: - build =20 check-system-alpine: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-alpine artifacts: true @@ -104,7 +104,7 @@ check-system-alpine: MAKE_CHECK_ARGS: check =20 acceptance-system-alpine: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-alpine artifacts: true @@ -129,7 +129,7 @@ build-system-ubuntu: - build =20 check-system-ubuntu: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-ubuntu artifacts: true @@ -138,7 +138,7 @@ check-system-ubuntu: MAKE_CHECK_ARGS: check =20 acceptance-system-ubuntu: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-ubuntu artifacts: true @@ -163,7 +163,7 @@ build-system-debian: - build =20 check-system-debian: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-debian artifacts: true @@ -172,7 +172,7 @@ check-system-debian: MAKE_CHECK_ARGS: check =20 acceptance-system-debian: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-debian artifacts: true @@ -198,7 +198,7 @@ build-system-fedora: - build =20 check-system-fedora: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-fedora artifacts: true @@ -207,7 +207,7 @@ check-system-fedora: MAKE_CHECK_ARGS: check =20 acceptance-system-fedora: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-fedora artifacts: true @@ -233,7 +233,7 @@ build-system-centos: - build =20 check-system-centos: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-centos artifacts: true @@ -242,7 +242,7 @@ check-system-centos: MAKE_CHECK_ARGS: check =20 acceptance-system-centos: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-centos artifacts: true @@ -266,7 +266,7 @@ build-system-opensuse: - build =20 check-system-opensuse: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-opensuse artifacts: true @@ -275,7 +275,7 @@ check-system-opensuse: MAKE_CHECK_ARGS: check =20 acceptance-system-opensuse: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-system-opensuse artifacts: true @@ -509,7 +509,7 @@ build-cfi-aarch64: - build =20 check-cfi-aarch64: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-aarch64 artifacts: true @@ -518,7 +518,7 @@ check-cfi-aarch64: MAKE_CHECK_ARGS: check =20 acceptance-cfi-aarch64: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-aarch64 artifacts: true @@ -546,7 +546,7 @@ build-cfi-ppc64-s390x: - build =20 check-cfi-ppc64-s390x: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-ppc64-s390x artifacts: true @@ -555,7 +555,7 @@ check-cfi-ppc64-s390x: MAKE_CHECK_ARGS: check =20 acceptance-cfi-ppc64-s390x: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-ppc64-s390x artifacts: true @@ -583,7 +583,7 @@ build-cfi-x86_64: - build =20 check-cfi-x86_64: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-x86_64 artifacts: true @@ -592,7 +592,7 @@ check-cfi-x86_64: MAKE_CHECK_ARGS: check =20 acceptance-cfi-x86_64: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-cfi-x86_64 artifacts: true @@ -630,7 +630,7 @@ build-deprecated: # We split the check-tcg step as test failures are expected but we still # want to catch the build breaking. check-deprecated: - <<: *native_test_job_definition + extends: .native_test_job_template needs: - job: build-deprecated artifacts: true --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=TKtujeFXWFw+zQUWOny8yk3rXadYk30pZWtmaAkK9Ss=; b=TVfYVz0nSVZZ5CjUXJvknWXaPwuGyu/o2IdN+U1W7WkntgQfRTjq2G4n0ONcS3zbBBltrS Ya2blgepYzwOOKXpv3VQrLQye22ARb0R9FEEYI0qeRyIzSBjOrpm/1feUyZP9ZlCXalDxM 428/kV9VnsuG5f6jjv8sRvBtgSQRQBo= X-MC-Unique: BSuhAoRSMJqDAYe3K7rlrg-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 07/10] libqos/qgraph: fix "UNAVAILBLE" typo Date: Mon, 3 May 2021 12:44:53 +0200 Message-Id: <20210503104456.1036472-8-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi Message-Id: <20210412143437.727560-2-stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Paolo Bonzini Signed-off-by: Thomas Huth --- tests/qtest/libqos/qgraph.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qtest/libqos/qgraph.c b/tests/qtest/libqos/qgraph.c index b3b1a31f81..d1dc491930 100644 --- a/tests/qtest/libqos/qgraph.c +++ b/tests/qtest/libqos/qgraph.c @@ -844,7 +844,7 @@ void qos_dump_graph(void) } qos_printf_literal("type=3D%d cmd_line=3D'%s' [%s]\n", node->type, node->command_line, - node->available ? "available" : "UNAVAILBLE" + node->available ? "available" : "UNAVAILABLE" ); } g_list_free(keys); --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620039177; cv=none; d=zohomail.com; s=zohoarc; b=O2D5jsmcYJ9RLvp+qEt0B62nZ8L5TxRJksyKNVXTf83dKHIqc1QmuQhQ5u6lv1UYoOulvwBG2uafKrqmDMNbkh40Y5z6zWIZiCWveNqVSf6HQiTTy2CHl4qpg37/yHPpmQajVKW3EmwLvVAoPs66Y61Mm/Uu757iTvni5GRtu3Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620039177; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=DgLI4Q7kdh4qye6yVEIAMtdffAeuik4GUlzf2Qqvfdw=; b=JIqoPlmata67pQ+snPkYXpQILZMV6cV/bLiKYNBVeXz68IVtqeUtq3R/0gERf77cssbxjwcDgd0RI4Hnhd5RC8qIHF9rgFNyVMX4T4AYWEDjg3G2Cs70h5/k9rSXawLTadskRI+2qA7yIB6ntGoG9LU6nbkpTzCLFZrGb/TPJH8= ARC-Authentication-Results: i=1; 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Mon, 03 May 2021 06:45:24 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-582-g3Xj773cMkW_LqwdQZ5ScQ-1; Mon, 03 May 2021 06:45:20 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 742EE801817; Mon, 3 May 2021 10:45:19 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id 40A795D9D0; Mon, 3 May 2021 10:45:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038721; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DgLI4Q7kdh4qye6yVEIAMtdffAeuik4GUlzf2Qqvfdw=; b=IFT18nNtpbnWBsRMnPxzDdqE4t9TLHhMnYwYpw2mM3vQ5DTppLUjZcmbOqZLb5jb5Mrn84 h1JjJjdwyO7h6ZrmQjL9guK0/kVBGPWTsbRT/elqbl3jeSA9ybveRBjgq2spWGFpm/3N5V 4X84D19fR6lp1uwphEKuwmmRXa3Vpj8= X-MC-Unique: g3Xj773cMkW_LqwdQZ5ScQ-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 08/10] docs/devel/qgraph: add troubleshooting information Date: Mon, 3 May 2021 12:44:54 +0200 Message-Id: <20210503104456.1036472-9-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, WEIRD_QUOTING=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Stefan Hajnoczi It can be tricky to troubleshoot qos-test when a test won't execute. Add an explanation of how to trace qgraph node connectivity and find which node has the problem. Signed-off-by: Stefan Hajnoczi Message-Id: <20210412143437.727560-3-stefanha@redhat.com> Acked-by: Paolo Bonzini Signed-off-by: Thomas Huth --- docs/devel/qgraph.rst | 58 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/docs/devel/qgraph.rst b/docs/devel/qgraph.rst index a9aff167ad..318534d4b0 100644 --- a/docs/devel/qgraph.rst +++ b/docs/devel/qgraph.rst @@ -92,6 +92,64 @@ The basic framework steps are the following: Depending on the QEMU binary used, only some drivers/machines will be available and only test that are reached by them will be executed. =20 +Troubleshooting unavailable tests +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +If there is no path from an available machine to a test then that test wil= l be +unavailable and won't execute. This can happen if a test or driver did not= set +up its qgraph node correctly. It can also happen if the necessary machine = type +or device is missing from the QEMU binary because it was compiled out or +otherwise. + +It is possible to troubleshoot unavailable tests by running:: + + $ QTEST_QEMU_BINARY=3Dbuild/qemu-system-x86_64 build/tests/qtest/qos-tes= t --verbose + # ALL QGRAPH EDGES: { + # src=3D'virtio-net' + # |-> dest=3D'virtio-net-tests/vhost-user/multiqueue' type=3D2 (nod= e=3D0x559142109e30) + # |-> dest=3D'virtio-net-tests/vhost-user/migrate' type=3D2 (node= =3D0x559142109d00) + # src=3D'virtio-net-pci' + # |-> dest=3D'virtio-net' type=3D1 (node=3D0x55914210d740) + # src=3D'pci-bus' + # |-> dest=3D'virtio-net-pci' type=3D2 (node=3D0x55914210d880) + # src=3D'pci-bus-pc' + # |-> dest=3D'pci-bus' type=3D1 (node=3D0x559142103f40) + # src=3D'i440FX-pcihost' + # |-> dest=3D'pci-bus-pc' type=3D0 (node=3D0x55914210ac70) + # src=3D'x86_64/pc' + # |-> dest=3D'i440FX-pcihost' type=3D0 (node=3D0x5591421117f0) + # src=3D'' + # |-> dest=3D'x86_64/pc' type=3D0 (node=3D0x559142111600) + # |-> dest=3D'arm/raspi2' type=3D0 (node=3D0x559142110740) + ... + # } + # ALL QGRAPH NODES: { + # name=3D'virtio-net-tests/announce-self' type=3D3 cmd_line=3D'(null)'= [available] + # name=3D'arm/raspi2' type=3D0 cmd_line=3D'-M raspi2 ' [UNAVAILABLE] + ... + # } + +The ``virtio-net-tests/announce-self`` test is listed as "available" in the +"ALL QGRAPH NODES" output. This means the test will execute. We can follow= the +qgraph path in the "ALL QGRAPH EDGES" output as follows: '' -> 'x86_64/pc'= -> +'i440FX-pcihost' -> 'pci-bus-pc' -> 'pci-bus' -> 'virtio-net-pci' -> +'virtio-net'. The root of the qgraph is '' and the depth first search begi= ns +there. + +The ``arm/raspi`` machine node is listed as "UNAVAILABLE". Although it is +reachable from the root via '' -> 'arm/raspi2' the node is unavailable bec= ause +the QEMU binary did not list it when queried by the framework. This is exp= ected +because we used the ``qemu-system-x86_64`` binary which does not support A= RM +machine types. + +If a test is unexpectedly listed as "UNAVAILABLE", first check that the "A= LL +QGRAPH EDGES" output reports edge connectivity from the root ('') to the t= est. +If there is no connectivity then the qgraph nodes were not set up correctl= y and +the driver or test code is incorrect. If there is connectivity, check the +availability of each node in the path in the "ALL QGRAPH NODES" output. The +first unavailable node in the path is the reason why the test is unavailab= le. +Typically this is because the QEMU binary lacks support for the necessary +machine type or device. + Creating a new driver and its interface """"""""""""""""""""""""""""""""""""""""" =20 --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620039305; cv=none; d=zohomail.com; s=zohoarc; b=X0mfl2r7MKn36jmy7U9zNcopAYdHVg8zJVsWHy5kHWwFfrbDgbETiQdlgIa4QGx6xAxDBMDVjigperEtPq6B20UeE9PRE4vWowq+tXcMRrTlXBvwv3LR5BCIdZwFGAeeOUXsUFe3B/EfTO6e5fW+Qj9dP0kJdgZEh4/qcrqPHBo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620039305; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Mon, 03 May 2021 06:45:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:30620) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldW4r-0003d2-Gs for qemu-devel@nongnu.org; Mon, 03 May 2021 06:45:26 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-153-NZXdPhsDPDK_dfes00E2Jg-1; Mon, 03 May 2021 06:45:23 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 8869E800D62; Mon, 3 May 2021 10:45:21 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id A47E15D9D0; Mon, 3 May 2021 10:45:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038725; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tZU6RUrWrKBMiQej9SF7Mt71rREj59rM//14ac3a1uY=; b=M+Z9c5Nk8IIcLjWHwpeWeZeDQ1fD5pgpSlGcleoChZfxcGHebDKSsuOSCVAVfOJ84CKmKy Dwr9PxSM+zfwoSQUXTwRVNUnEn9fHK8WcjEVdkrkGBeuYs2VLC49N0v2QRnhnJJHd1rina bX51OEY0XicNjHQUmUqKjytQVbla62E= X-MC-Unique: NZXdPhsDPDK_dfes00E2Jg-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 09/10] libqtest: refuse QTEST_QEMU_BINARY=qemu-kvm Date: Mon, 3 May 2021 12:44:55 +0200 Message-Id: <20210503104456.1036472-10-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=216.205.24.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Emanuele Giuseppe Esposito , Qin Wang , Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Stefan Hajnoczi Some downstreams rename the QEMU binary to "qemu-kvm". This breaks qtest_get_arch(), which attempts to parse the target architecture from the QTEST_QEMU_BINARY environment variable. Print an error instead of returning the architecture "kvm". Things fail in weird ways when the architecture string is bogus. Arguably qtests should always be run in a build directory instead of against an installed QEMU. In any case, printing a clear error when this happens is helpful. Since this is an error that is triggered by the user and not a test failure, use exit(1) instead of abort(). Change the existing abort() call in qtest_get_arch() to exit(1) too for the same reason and to be consistent. Reported-by: Qin Wang Signed-off-by: Stefan Hajnoczi Reviewed-by: Emanuele Giuseppe Esposito Reviewed-by: Thomas Huth Cc: Emanuele Giuseppe Esposito Message-Id: <20210412143050.725918-1-stefanha@redhat.com> Signed-off-by: Thomas Huth --- tests/qtest/libqtest.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index 71e359efcd..825b13a44c 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c @@ -907,7 +907,14 @@ const char *qtest_get_arch(void) =20 if (!end) { fprintf(stderr, "Can't determine architecture from binary name.\n"= ); - abort(); + exit(1); + } + + if (!strstr(qemu, "-system-")) { + fprintf(stderr, "QTEST_QEMU_BINARY must end with *-system- " + "where 'arch' is the target\narchitecture (x86_64, aarch64= , " + "etc).\n"); + exit(1); } =20 return end + 1; --=20 2.27.0 From nobody Fri Apr 19 13:31:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1620038923; cv=none; d=zohomail.com; s=zohoarc; b=LAwM1R7pK1gm5TSY3Da1JL9Q2m5/2EC/xDSit1oyPJFeXI7y4OF0zPgMGs8Mty0AsliTuilYFYRbTA4Pk8B5Nw2IaZapz7KhE4QqYkjhEtMGPj5umq90NiZDHU38oHj4+QCKbOFhQqkEVE57B0Eij3m8CVvhnZoJke7/zWN5y70= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620038923; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=WJZv7SxlH6CHVsVI4RrkhfkE0xypB+VndKOPWbT/v5Q=; b=mv1kulbhUN7E1Th8XLQspg3bupBhTnQ2Hlx8yksBwebyedJ5AyzrsbTstIHoOKvYUY2/paIWN5PZQ9/e3J6TiiVoTZovkG/SaD/XSLNIJj19u9r3EQzFDzYG1sGpwry2AWcDONiSF2eQvL/6lkFOn2+MIEtZj8YAT72n7ZB77Fc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1620038923256135.02000009706637; Mon, 3 May 2021 03:48:43 -0700 (PDT) Received: from localhost ([::1]:34940 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldW82-0006uc-65 for importer@patchew.org; Mon, 03 May 2021 06:48:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58988) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldW4u-0003vx-78 for qemu-devel@nongnu.org; Mon, 03 May 2021 06:45:28 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:48320) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldW4r-0003dA-VB for qemu-devel@nongnu.org; Mon, 03 May 2021 06:45:28 -0400 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-28-knalIH3iOnOrKyNcgsj3Og-1; Mon, 03 May 2021 06:45:23 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id ACAE68049C5; Mon, 3 May 2021 10:45:22 +0000 (UTC) Received: from thuth.com (ovpn-112-122.ams2.redhat.com [10.36.112.122]) by smtp.corp.redhat.com (Postfix) with ESMTP id D534A5D9D5; Mon, 3 May 2021 10:45:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1620038725; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WJZv7SxlH6CHVsVI4RrkhfkE0xypB+VndKOPWbT/v5Q=; b=WYdOCFzAa9wYQv8H808z9R70X3AaGTau9/zUTY1rAYbw574+yrHXziVAK4b25L9OeEmZcs vxLHS7KjLRA2ex9/rW4V5+p2O1cP1oLRBT6iZB9fNrLB3iyLu0SlZG+fT38D8vLl7x8iv9 fquGrRm+OjhG0r06gLIvhUsccEh8leg= X-MC-Unique: knalIH3iOnOrKyNcgsj3Og-1 From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell Subject: [PULL 10/10] util/compatfd.c: Replaced a malloc call with g_malloc. Date: Mon, 3 May 2021 12:44:56 +0200 Message-Id: <20210503104456.1036472-11-thuth@redhat.com> In-Reply-To: <20210503104456.1036472-1-thuth@redhat.com> References: <20210503104456.1036472-1-thuth@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=thuth@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.697, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mahmoud Mandour Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" From: Mahmoud Mandour Replaced a call to malloc() and its respective call to free() with g_malloc() and g_free(). g_malloc() is preferred more than g_try_* functions, which return NULL on error, when the size of the requested allocation is small. This is because allocating few bytes should not be a problem in a healthy system. Otherwise, the system is already in a critical state. Subsequently, removed NULL-checking after g_malloc(). Signed-off-by: Mahmoud Mandour Message-Id: <20210315105814.5188-3-ma.mandourr@gmail.com> Signed-off-by: Thomas Huth --- util/compatfd.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/util/compatfd.c b/util/compatfd.c index 174f394533..a8ec525c6c 100644 --- a/util/compatfd.c +++ b/util/compatfd.c @@ -72,14 +72,10 @@ static int qemu_signalfd_compat(const sigset_t *mask) QemuThread thread; int fds[2]; =20 - info =3D malloc(sizeof(*info)); - if (info =3D=3D NULL) { - errno =3D ENOMEM; - return -1; - } + info =3D g_malloc(sizeof(*info)); =20 if (pipe(fds) =3D=3D -1) { - free(info); + g_free(info); return -1; } =20 --=20 2.27.0