From nobody Tue Feb 10 10:20:14 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1619817960; cv=none; d=zohomail.com; s=zohoarc; b=Zg8UL4jENUKumPU+05/TwEbORFHJWC/vGup29g6lNiAqLp2HFU5K27gHgQG+ViUZIUgtZ5vYlShxi9epKYokUO5bNkL0gdmpu4ViVzwdXPfMCgUDdoPqWt76/L38wnuPsl5GSAUvlcmFArFvvaeQUEvWoj8fxi6SY4La7j5RFgw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1619817960; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZZIhiZEVQ2AxfjzmXXYKf6LRw34rLcHgzjMNXP5Mdl4=; b=b2JL438v9pegTiVpDGksh3W/PdCP0pew9+kt9QkM9aWb4Xi1lSzzqwfXAZ0LkYzHdlnDusl0nY2wRg6FCyILX3yo4BTqIKT3RNLMuTkNX2pjJP6bxXN6YsthuUV83cNya2yUZ8OkrTgqzYeRxgenWVuTsr6jGO7kNGhYiLQOGPU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1619817960073750.410084057597; Fri, 30 Apr 2021 14:26:00 -0700 (PDT) Received: from localhost ([::1]:54662 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lcae2-0003rl-NY for importer@patchew.org; Fri, 30 Apr 2021 17:25:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53678) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lcZmg-0004yt-9P for qemu-devel@nongnu.org; Fri, 30 Apr 2021 16:30:46 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]:42751) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lcZlw-0007mo-NP for qemu-devel@nongnu.org; Fri, 30 Apr 2021 16:30:45 -0400 Received: by mail-pf1-x434.google.com with SMTP id b27so905658pfp.9 for ; Fri, 30 Apr 2021 13:29:51 -0700 (PDT) Received: from localhost.localdomain ([71.212.144.24]) by smtp.gmail.com with ESMTPSA id q23sm3788781pgt.42.2021.04.30.13.29.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Apr 2021 13:29:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZZIhiZEVQ2AxfjzmXXYKf6LRw34rLcHgzjMNXP5Mdl4=; b=lNsU4iIY2mWlrpwlei/lP3DCaLEg/i3TnvWIQK840Dsx2L0tI+oum6QzQi2MgLTDEx 1G1fiFFsO+LnV3SLZGem9UXehPdSNIqFrSBHROvtlKkfXv9Zz5FpKNAG+3Irhorxlzqa O5DK8rFsMQcAbFlJk/xUaMjwBSmOjuQPTyKlM73xFOtOaLChYntCpW1dTtKXDfZ8xXQT whP814DDbIosDjEKmeph3DblajCsXy4v2Htz6TCuK0dPjvXotDWUyqDUP80IaDC8y7Xz /tzGgt3YJt8gt3tDeMJndI2GmBxJ9tFrZah1G1MCtCBXIpu20HGJkpye4h7sGgaBPfda vgHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZZIhiZEVQ2AxfjzmXXYKf6LRw34rLcHgzjMNXP5Mdl4=; b=bPoTNjGLif1V4yvL6OfzeEsZaxsp6azfhTMvtFbLotWx8Vf7eW8fcsbe2VQp91UHTx HTmqSsRwI7dgkP+ttk8IbQTsEpkwn2xp51A2x+fvu5pPs0Lk8boaXlIwL0EKWRSiM5MW BNSWiPH2ZVBw9Ov4BhKli9/guRgDFRviWG8E6rsoTHLX0Bgn6nHhqGJJPFgtkfLvSgV+ eoXxAoMqQJ2anlMprYQUhxcfUGBWEzNMOWrYeGMTGB6g42KYafiOPhsYIPE+YR2LCE8D GvbnyL70YR/UznxQPvnPummnaMZs17i8kIbeES4GXoV7Eo1u38xHULwy7otqNLeqyozy pLyA== X-Gm-Message-State: AOAM533QKNuHGPgGxO4fwhBHNnJoeAx1iwFdWmy4Ry7USO72f0xYjXeE 6z8lyAUhLzWgIl01rtUVGl4fMI0yWg7QtQ== X-Google-Smtp-Source: ABdhPJydQiaPObHsk7CEla5aCAAkFn1Ukzo5licKgPEt9JsFjihf5O8PpvppeHD1RvPSs80+MFlhvQ== X-Received: by 2002:a63:1624:: with SMTP id w36mr6094220pgl.240.1619814591093; Fri, 30 Apr 2021 13:29:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v6 64/82] target/arm: Implement SVE2 TBL, TBX Date: Fri, 30 Apr 2021 13:25:52 -0700 Message-Id: <20210430202610.1136687-65-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210430202610.1136687-1-richard.henderson@linaro.org> References: <20210430202610.1136687-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, Stephen Long Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Stephen Long Signed-off-by: Stephen Long Message-Id: <20200428144352.9275-1-steplong@quicinc.com> [rth: rearrange the macros a little and rebase] Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/helper-sve.h | 10 +++++ target/arm/sve.decode | 5 +++ target/arm/sve_helper.c | 90 ++++++++++++++++++++++++++++++-------- target/arm/translate-sve.c | 33 ++++++++++++++ 4 files changed, 119 insertions(+), 19 deletions(-) diff --git a/target/arm/helper-sve.h b/target/arm/helper-sve.h index 0be0d90bee..41c08a963b 100644 --- a/target/arm/helper-sve.h +++ b/target/arm/helper-sve.h @@ -661,6 +661,16 @@ DEF_HELPER_FLAGS_4(sve_tbl_h, TCG_CALL_NO_RWG, void, p= tr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(sve_tbl_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(sve_tbl_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) =20 +DEF_HELPER_FLAGS_5(sve2_tbl_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, = i32) +DEF_HELPER_FLAGS_5(sve2_tbl_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, = i32) +DEF_HELPER_FLAGS_5(sve2_tbl_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, = i32) +DEF_HELPER_FLAGS_5(sve2_tbl_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, = i32) + +DEF_HELPER_FLAGS_4(sve2_tbx_b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve2_tbx_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve2_tbx_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(sve2_tbx_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) + DEF_HELPER_FLAGS_3(sve_sunpk_h, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(sve_sunpk_s, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(sve_sunpk_d, TCG_CALL_NO_RWG, void, ptr, ptr, i32) diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 7a2770cb0c..38aaf1b37e 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -558,6 +558,11 @@ TBL 00000101 .. 1 ..... 001100 ..... .....= @rd_rn_rm # SVE unpack vector elements UNPK 00000101 esz:2 1100 u:1 h:1 001110 rn:5 rd:5 =20 +# SVE2 Table Lookup (three sources) + +TBL_sve2 00000101 .. 1 ..... 001010 ..... ..... @rd_rn_rm +TBX 00000101 .. 1 ..... 001011 ..... ..... @rd_rn_rm + ### SVE Permute - Predicates Group =20 # SVE permute predicate elements diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index e8a8425522..8dc04441aa 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -2915,28 +2915,80 @@ void HELPER(sve_rev_d)(void *vd, void *vn, uint32_t= desc) } } =20 -#define DO_TBL(NAME, TYPE, H) \ -void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc) \ -{ \ - intptr_t i, opr_sz =3D simd_oprsz(desc); \ - uintptr_t elem =3D opr_sz / sizeof(TYPE); \ - TYPE *d =3D vd, *n =3D vn, *m =3D vm; \ - ARMVectorReg tmp; \ - if (unlikely(vd =3D=3D vn)) { \ - n =3D memcpy(&tmp, vn, opr_sz); \ - } \ - for (i =3D 0; i < elem; i++) { \ - TYPE j =3D m[H(i)]; \ - d[H(i)] =3D j < elem ? n[H(j)] : 0; \ - } \ +typedef void tb_impl_fn(void *, void *, void *, void *, uintptr_t, bool); + +static inline void do_tbl1(void *vd, void *vn, void *vm, uint32_t desc, + bool is_tbx, tb_impl_fn *fn) +{ + ARMVectorReg scratch; + uintptr_t oprsz =3D simd_oprsz(desc); + + if (unlikely(vd =3D=3D vn)) { + vn =3D memcpy(&scratch, vn, oprsz); + } + + fn(vd, vn, NULL, vm, oprsz, is_tbx); } =20 -DO_TBL(sve_tbl_b, uint8_t, H1) -DO_TBL(sve_tbl_h, uint16_t, H2) -DO_TBL(sve_tbl_s, uint32_t, H4) -DO_TBL(sve_tbl_d, uint64_t, ) +static inline void do_tbl2(void *vd, void *vn0, void *vn1, void *vm, + uint32_t desc, bool is_tbx, tb_impl_fn *fn) +{ + ARMVectorReg scratch; + uintptr_t oprsz =3D simd_oprsz(desc); =20 -#undef TBL + if (unlikely(vd =3D=3D vn0)) { + vn0 =3D memcpy(&scratch, vn0, oprsz); + if (vd =3D=3D vn1) { + vn1 =3D vn0; + } + } else if (unlikely(vd =3D=3D vn1)) { + vn1 =3D memcpy(&scratch, vn1, oprsz); + } + + fn(vd, vn0, vn1, vm, oprsz, is_tbx); +} + +#define DO_TB(SUFF, TYPE, H) \ +static inline void do_tb_##SUFF(void *vd, void *vt0, void *vt1, \ + void *vm, uintptr_t oprsz, bool is_tbx) \ +{ \ + TYPE *d =3D vd, *tbl0 =3D vt0, *tbl1 =3D vt1, *indexes =3D vm; = \ + uintptr_t i, nelem =3D oprsz / sizeof(TYPE); \ + for (i =3D 0; i < nelem; ++i) { \ + TYPE index =3D indexes[H1(i)], val =3D 0; = \ + if (index < nelem) { \ + val =3D tbl0[H(index)]; \ + } else { \ + index -=3D nelem; \ + if (tbl1 && index < nelem) { \ + val =3D tbl1[H(index)]; \ + } else if (is_tbx) { \ + continue; \ + } \ + } \ + d[H(i)] =3D val; \ + } \ +} \ +void HELPER(sve_tbl_##SUFF)(void *vd, void *vn, void *vm, uint32_t desc) \ +{ \ + do_tbl1(vd, vn, vm, desc, false, do_tb_##SUFF); \ +} \ +void HELPER(sve2_tbl_##SUFF)(void *vd, void *vn0, void *vn1, \ + void *vm, uint32_t desc) \ +{ \ + do_tbl2(vd, vn0, vn1, vm, desc, false, do_tb_##SUFF); \ +} \ +void HELPER(sve2_tbx_##SUFF)(void *vd, void *vn, void *vm, uint32_t desc) \ +{ \ + do_tbl1(vd, vn, vm, desc, true, do_tb_##SUFF); \ +} + +DO_TB(b, uint8_t, H1) +DO_TB(h, uint16_t, H2) +DO_TB(s, uint32_t, H4) +DO_TB(d, uint64_t, ) + +#undef DO_TB =20 #define DO_UNPK(NAME, TYPED, TYPES, HD, HS) \ void HELPER(NAME)(void *vd, void *vn, uint32_t desc) \ diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 5f2a2b1eb2..7bf8326fab 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -2417,6 +2417,39 @@ static bool trans_TBL(DisasContext *s, arg_rrr_esz *= a) return true; } =20 +static bool trans_TBL_sve2(DisasContext *s, arg_rrr_esz *a) +{ + static gen_helper_gvec_4 * const fns[4] =3D { + gen_helper_sve2_tbl_b, gen_helper_sve2_tbl_h, + gen_helper_sve2_tbl_s, gen_helper_sve2_tbl_d + }; + + if (!dc_isar_feature(aa64_sve2, s)) { + return false; + } + if (sve_access_check(s)) { + gen_gvec_ool_zzzz(s, fns[a->esz], a->rd, a->rn, + (a->rn + 1) % 32, a->rm, 0); + } + return true; +} + +static bool trans_TBX(DisasContext *s, arg_rrr_esz *a) +{ + static gen_helper_gvec_3 * const fns[4] =3D { + gen_helper_sve2_tbx_b, gen_helper_sve2_tbx_h, + gen_helper_sve2_tbx_s, gen_helper_sve2_tbx_d + }; + + if (!dc_isar_feature(aa64_sve2, s)) { + return false; + } + if (sve_access_check(s)) { + gen_gvec_ool_zzz(s, fns[a->esz], a->rd, a->rn, a->rm, 0); + } + return true; +} + static bool trans_UNPK(DisasContext *s, arg_UNPK *a) { static gen_helper_gvec_2 * const fns[4][2] =3D { --=20 2.25.1