From nobody Tue Feb 10 07:23:00 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1619715374; cv=none; d=zohomail.com; s=zohoarc; b=gKCutsUHJyjP/vv/T1YWuaFadsSpyEOClqBgiDKA4+4rbjKvPKgo+Ujl6xaoTisNi/JxCjMOz7aoxvtvWrmVqRU6QiVB1eDAvW8DqFzetTbYTVl0fLfLdDyMx0YYb7aOQX64OpCTq8J0eUX5dtV2hF/K9VWs9fXiDGPbjGI57cE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1619715374; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=XJ3bl3+ByO1QoQHVZlZpqMrfT4ucNDU5SmO2lykYE6w=; b=WbpX/TqHNuH4k3qmKJKT+3WoOR3F66m2Zw+YJZHfFU1bN4eAp0NIyYeC30TUvA6rLe3E7f6wnlJ027RiR4duZbNenfporDybypkFW7QlCuFRp4Q0n3S6t9/C2E3FFwId/14EIzxdPat2l8uC+V79xEPIH9MGpWw12VBCp/v0XWI= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161971537398536.109820049579184; Thu, 29 Apr 2021 09:56:13 -0700 (PDT) Received: from localhost ([::1]:53744 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lc9xU-0001Ps-3Y for importer@patchew.org; Thu, 29 Apr 2021 12:56:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47050) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lc9RX-0004gQ-Sa; Thu, 29 Apr 2021 12:23:11 -0400 Received: from [201.28.113.2] (port=34399 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lc9RW-0004Gz-9F; Thu, 29 Apr 2021 12:23:11 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 29 Apr 2021 13:21:39 -0300 Received: from eldorado.org.br (unknown [10.10.71.235]) by power9a (Postfix) with ESMTP id 177CB80134B; Thu, 29 Apr 2021 13:21:39 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v2 5/7] target/ppc: removed VSCR from SPR registration Date: Thu, 29 Apr 2021 13:21:28 -0300 Message-Id: <20210429162130.2412-6-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210429162130.2412-1-bruno.larsen@eldorado.org.br> References: <20210429162130.2412-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 29 Apr 2021 16:21:39.0243 (UTC) FILETIME=[BBA33FB0:01D73D13] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Since vscr is not an spr, its initialization was removed from the spr registration functions, and moved to the relevant init_procs. We may look into adding vscr to the reset path instead of the init path (as suggested by David Gibson), but this looked like a good enough solution for now. Signed-off-by: Bruno Larsen (billionai) --- target/ppc/translate_init.c.inc | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.= inc index f809941c5e..f470a8533e 100644 --- a/target/ppc/translate_init.c.inc +++ b/target/ppc/translate_init.c.inc @@ -938,8 +938,6 @@ static void gen_spr_74xx(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, spr_access_nop, 0x00000000); - /* Not strictly an SPR */ - vscr_init(env, 0x00010000); } =20 static void gen_l3_ctrl(CPUPPCState *env) @@ -5787,6 +5785,7 @@ static void init_proc_7400(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* XXX : not implemented */ spr_register(env, SPR_UBAMR, "UBAMR", &spr_read_ureg, SPR_NOACCESS, @@ -5866,6 +5865,7 @@ static void init_proc_7410(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* XXX : not implemented */ spr_register(env, SPR_UBAMR, "UBAMR", &spr_read_ureg, SPR_NOACCESS, @@ -5951,6 +5951,7 @@ static void init_proc_7440(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* XXX : not implemented */ spr_register(env, SPR_UBAMR, "UBAMR", &spr_read_ureg, SPR_NOACCESS, @@ -6059,6 +6060,7 @@ static void init_proc_7450(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* Level 3 cache control */ gen_l3_ctrl(env); /* L3ITCR1 */ @@ -6193,6 +6195,7 @@ static void init_proc_7445(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* LDSTCR */ /* XXX : not implemented */ spr_register(env, SPR_LDSTCR, "LDSTCR", @@ -6330,6 +6333,7 @@ static void init_proc_7455(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* Level 3 cache control */ gen_l3_ctrl(env); /* LDSTCR */ @@ -6469,6 +6473,7 @@ static void init_proc_7457(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* Level 3 cache control */ gen_l3_ctrl(env); /* L3ITCR1 */ @@ -6632,6 +6637,7 @@ static void init_proc_e600(CPUPPCState *env) gen_tbl(env); /* 74xx specific SPR */ gen_spr_74xx(env); + vscr_init(env, 0x00010000); /* XXX : not implemented */ spr_register(env, SPR_UBAMR, "UBAMR", &spr_read_ureg, SPR_NOACCESS, @@ -6830,11 +6836,6 @@ static void gen_spr_book3s_altivec(CPUPPCState *env) &spr_read_generic, &spr_write_generic, KVM_REG_PPC_VRSAVE, 0x00000000); =20 - /* - * Can't find information on what this should be on reset. This - * value is the one used by 74xx processors. - */ - vscr_init(env, 0x00010000); } =20 static void gen_spr_book3s_dbg(CPUPPCState *env) @@ -7454,6 +7455,11 @@ static void init_proc_book3s_common(CPUPPCState *env) gen_spr_book3s_pmu_sup(env); gen_spr_book3s_pmu_user(env); gen_spr_book3s_ctrl(env); + /* + * Can't find information on what this should be on reset. This + * value is the one used by 74xx processors. + */ + vscr_init(env, 0x00010000); } =20 static void init_proc_970(CPUPPCState *env) --=20 2.17.1