From nobody Tue Feb 10 09:57:45 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.48 as permitted sender) client-ip=209.85.221.48; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f48.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail(p=none dis=none) header.from=amsat.org ARC-Seal: i=1; a=rsa-sha256; t=1619619429; cv=none; d=zohomail.com; s=zohoarc; b=NePUkf6Z8O5z7GwKgIWZfmqVO54/5i7wdwZLpMJaepP4ula4N/7iSeBCh+yC7rUS7ryig/CNkIbE5bSdn9+F17jy0jg+q8kTdgmBzBbk0+nl+fFLcYRUCycNc7PlK4WI1GWhNjQblHUAl0adbd/MZTv7XfnHJbfL++FQT7uAOjQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1619619429; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=VXwJMgfTCzcmDZmdzUQlG/w+wYVj2e6Bgl1h2XHKQyk=; b=g0y6Lo7ECimb+o5r5efoTmWAuUh27jkv6HfpKTxUHhdm/IxKW+rsUq41X60/WThjqAg7LoCQTV6OSnFKlrP+1LuhdksQyNn6rLlcTqrY/wCNFztop8Q4IqLMUBGn5FPe/MeoIkEx5xux0JIC11AaBftMk9GyQp/Z3MlkD3GqD6U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) by mx.zohomail.com with SMTPS id 1619619429905791.9964464593846; Wed, 28 Apr 2021 07:17:09 -0700 (PDT) Received: by mail-wr1-f48.google.com with SMTP id e5so34600775wrg.7 for ; Wed, 28 Apr 2021 07:17:08 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (39.red-81-40-121.staticip.rima-tde.net. [81.40.121.39]) by smtp.gmail.com with ESMTPSA id b15sm111735wrt.57.2021.04.28.07.17.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Apr 2021 07:17:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VXwJMgfTCzcmDZmdzUQlG/w+wYVj2e6Bgl1h2XHKQyk=; b=gWJd0NojUE6Ff/prtcHoxbqdHF6AMpDDPs+pZp2yHmuGrgRAZOhYOrBP0toC+FOzlQ KE5VSP5N9yOawhXBipyitM3vd3qTUCVJnKbYX3ZaWosA+KpZuifPiEyhvAbDQMFibfin n4L2shCRDK13xn+dXMvZL1e/wrRjGhv8LqBe+SQuajRsQyAs7V/P6Qn6bfx9RI+EI9Mj ZUTGmNZkUK91HyYpH3VP5zfO2OVIuUAsW0PK4upcJeKtL8xqkbncmBeqbPejYnh8Hbjo FJRxaPmFrgyMdtw9Ubf6xDzB9hGkllo6ZKr904Mn64/GPpEU67Otr1MU9b2BwoQOVxQ/ uEIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=VXwJMgfTCzcmDZmdzUQlG/w+wYVj2e6Bgl1h2XHKQyk=; b=cMaBsfPN3Ug6cLkBUUhFqlIJKCCzQNiIEbmu8SmlXD+Gj7Me8HTBvg+6WHmzRVlZLv g7VxL+9BAU91qcV1/Xe7p5/gyUPyLqz5Ijkh4QEby9dB5qTWiL3jclWyIsF0VT8doWex IzBXzAeH2ClczCXCeLzZxZKL4gK6n89YN0+GvwmvaBrIecDtat3MkfK/LA6Hc3UEu6ca SlBy+/yMbdH3zRGtSCYXF345mpXsk4g07nyrr9beNglnSgRFQvuPiLcm2QaLTb3OgR/i +n7qSQ4pLMohnmlpfI4pYvwPAXWv5SQb++BaYVZGhmQDafbPkPIrXMbaZZMiruktezQr H7GQ== X-Gm-Message-State: AOAM532oRCAVWCSeMSe/A5z6t4nN4tsvCmpQCa7aUk9+pMV6o3l6vme1 2DPV1igbzvDeHAj1LZmsUBI= X-Google-Smtp-Source: ABdhPJyYla6o1vno5mXOdK79LrCSlzpfU+4DIsTEnz8X4OVWrD601kjIZXjd4vWOSZTT1mBQCxZqHg== X-Received: by 2002:adf:f6c5:: with SMTP id y5mr37210090wrp.121.1619619427511; Wed, 28 Apr 2021 07:17:07 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: KONRAD Frederic , Mark Cave-Ayland , Richard Henderson , Fabien Chouteau , Thomas Huth , Artyom Tarasenko , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/4] hw/sparc: Allow building without the leon3 machine Date: Wed, 28 Apr 2021 16:16:51 +0200 Message-Id: <20210428141655.387430-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210428141655.387430-1-f4bug@amsat.org> References: <20210428141655.387430-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) When building without the leon3 machine, we get this link failure: /usr/bin/ld: target_sparc_int32_helper.c.o: in function `leon3_irq_manage= r': target/sparc/int32_helper.c:172: undefined reference to `leon3_irq_ack' This is because the leon3_irq_ack() is declared in hw/sparc/leon3.c, which is only build when CONFIG_LEON3 is selected. Fix by moving the leon3_cache_control_int() / leon3_irq_manager() (which are specific to the leon3 machine) to hw/sparc/leon3.c. Move the trace events along (but don't rename them). leon3_irq_ack() is now locally used, declare it static to reduce its scope. Reviewed-by: Richard Henderson Reviewed-by: KONRAD Frederic Tested-by: KONRAD Frederic Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/sparc/cpu.h | 6 ------ hw/sparc/leon3.c | 37 ++++++++++++++++++++++++++++++++++++- target/sparc/int32_helper.c | 37 ------------------------------------- hw/sparc/trace-events | 2 ++ target/sparc/trace-events | 4 ---- 5 files changed, 38 insertions(+), 48 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 4b2290650be..ff8ae73002a 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -615,15 +615,9 @@ int cpu_cwp_inc(CPUSPARCState *env1, int cwp); int cpu_cwp_dec(CPUSPARCState *env1, int cwp); void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); =20 -/* int_helper.c */ -void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno); - /* sun4m.c, sun4u.c */ void cpu_check_irqs(CPUSPARCState *env); =20 -/* leon3.c */ -void leon3_irq_ack(void *irq_manager, int intno); - #if defined (TARGET_SPARC64) =20 static inline int compare_masked(uint64_t x, uint64_t y, uint64_t mask) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 7e16eea9e67..98e3789cf84 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -137,7 +137,36 @@ static void main_cpu_reset(void *opaque) env->regbase[6] =3D s->sp; } =20 -void leon3_irq_ack(void *irq_manager, int intno) +static void leon3_cache_control_int(CPUSPARCState *env) +{ + uint32_t state =3D 0; + + if (env->cache_control & CACHE_CTRL_IF) { + /* Instruction cache state */ + state =3D env->cache_control & CACHE_STATE_MASK; + if (state =3D=3D CACHE_ENABLED) { + state =3D CACHE_FROZEN; + trace_int_helper_icache_freeze(); + } + + env->cache_control &=3D ~CACHE_STATE_MASK; + env->cache_control |=3D state; + } + + if (env->cache_control & CACHE_CTRL_DF) { + /* Data cache state */ + state =3D (env->cache_control >> 2) & CACHE_STATE_MASK; + if (state =3D=3D CACHE_ENABLED) { + state =3D CACHE_FROZEN; + trace_int_helper_dcache_freeze(); + } + + env->cache_control &=3D ~(CACHE_STATE_MASK << 2); + env->cache_control |=3D (state << 2); + } +} + +static void leon3_irq_ack(void *irq_manager, int intno) { grlib_irqmp_ack((DeviceState *)irq_manager, intno); } @@ -181,6 +210,12 @@ static void leon3_set_pil_in(void *opaque, int n, int = level) } } =20 +static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int i= ntno) +{ + leon3_irq_ack(irq_manager, intno); + leon3_cache_control_int(env); +} + static void leon3_generic_hw_init(MachineState *machine) { ram_addr_t ram_size =3D machine->ram_size; diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index 817a463a179..d008dbdb65c 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -136,40 +136,3 @@ void sparc_cpu_do_interrupt(CPUState *cs) } #endif } - -#if !defined(CONFIG_USER_ONLY) -static void leon3_cache_control_int(CPUSPARCState *env) -{ - uint32_t state =3D 0; - - if (env->cache_control & CACHE_CTRL_IF) { - /* Instruction cache state */ - state =3D env->cache_control & CACHE_STATE_MASK; - if (state =3D=3D CACHE_ENABLED) { - state =3D CACHE_FROZEN; - trace_int_helper_icache_freeze(); - } - - env->cache_control &=3D ~CACHE_STATE_MASK; - env->cache_control |=3D state; - } - - if (env->cache_control & CACHE_CTRL_DF) { - /* Data cache state */ - state =3D (env->cache_control >> 2) & CACHE_STATE_MASK; - if (state =3D=3D CACHE_ENABLED) { - state =3D CACHE_FROZEN; - trace_int_helper_dcache_freeze(); - } - - env->cache_control &=3D ~(CACHE_STATE_MASK << 2); - env->cache_control |=3D (state << 2); - } -} - -void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) -{ - leon3_irq_ack(irq_manager, intno); - leon3_cache_control_int(env); -} -#endif diff --git a/hw/sparc/trace-events b/hw/sparc/trace-events index 355b07ae057..dfb53dc1a24 100644 --- a/hw/sparc/trace-events +++ b/hw/sparc/trace-events @@ -19,3 +19,5 @@ sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 # leon3.c leon3_set_irq(int intno) "Set CPU IRQ %d" leon3_reset_irq(int intno) "Reset CPU IRQ %d" +int_helper_icache_freeze(void) "Instruction cache: freeze" +int_helper_dcache_freeze(void) "Data cache: freeze" diff --git a/target/sparc/trace-events b/target/sparc/trace-events index 6a064e23275..e925ddd1cc0 100644 --- a/target/sparc/trace-events +++ b/target/sparc/trace-events @@ -15,10 +15,6 @@ int_helper_set_softint(uint32_t softint) "new 0x%08x" int_helper_clear_softint(uint32_t softint) "new 0x%08x" int_helper_write_softint(uint32_t softint) "new 0x%08x" =20 -# int32_helper.c -int_helper_icache_freeze(void) "Instruction cache: freeze" -int_helper_dcache_freeze(void) "Data cache: freeze" - # win_helper.c win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active ps= tate bits=3D0x%x" win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "= change_pstate: switching regs old=3D0x%x new=3D0x%x" --=20 2.26.3