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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id 6sm4623270wmg.9.2021.04.27.12.27.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Apr 2021 12:27:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AeVh7vHBr9M4J89rTy7icLCpfwOC8AVr50lKe1Nh3oU=; b=LFQqUHW5dTzP1haZPcCWcaP+0lTeSU/PXTInst/h/sW5hVptnmVTYDuGPamO82dgNj /JbRf8S/vqIrz4n0ImwD1qrHdbGeu+buoqItDCd6TXt8LNn0KUwRnRGcoZvJ/nW2stjF 1+PccntJNmYAVUrN1seJ9QmG0LAUxqfeKrhCUNzAgUCbjijsUufDDY6u1aqHCSVLpOHw nQtp7oUqlIz5c3eKApi0avsS51bEzqx9QDxc3XK8XBAOJVW6XMSpPNAdMyU5VL9pn066 6/hHKHZq0i8mAFxSxcy9u4ygkPPhciZoH2cKXY7vfoygyegfizVwZiSAVMQasRXx/aCX QTdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=AeVh7vHBr9M4J89rTy7icLCpfwOC8AVr50lKe1Nh3oU=; b=mNMeeSibw/0ka+zq77enOg4cnYeeiIBvMMhpNYBEPEgslw+2x5xwBk4xRuDeYEWV0r JwH/x6gmBlTanq3+eE+36qWsGjSbYwBvJ3FdZIjacLQsc8H28T/rfAiI87nmlk3xvvhV 4IW+3AfZCNsyPHA9068QSiOylcauG8/F1ZSjzwir3y6htjvcs2mFBkf+4hvLYAT8nh4z hu6lJMZZ9ab3gemT8DHUvTYhqfbqTpEXuk8I509ETrCBGFDWksdFcCdMjKtJRzEy6k/m JnIVs8O4/pMLAkve91BCkmwsKvDT94kf5xWo6JmplMAUunls/a3hL++m+JVtSl7RnpW6 kZLA== X-Gm-Message-State: AOAM532vACIS15AZ6GfIe8XQAqpxNeNGF7c+icmuHiUnJ8ls7nJa0LjZ Yqco54y928S5aZ7m1vjFWmM= X-Google-Smtp-Source: ABdhPJxppGJRk4tsbUrj1A7fP7lFSG0f6FZuU/C1lGyxOALjEEGRL9pUvNBnuVO4mzD0Dh7EmjMJBQ== X-Received: by 2002:a05:600c:19d1:: with SMTP id u17mr25756666wmq.111.1619551625947; Tue, 27 Apr 2021 12:27:05 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Richard Henderson , Thomas Huth , KONRAD Frederic , Artyom Tarasenko , Fabien Chouteau , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 1/2] hw/sparc: Allow building the leon3 machine stand-alone Date: Tue, 27 Apr 2021 21:26:57 +0200 Message-Id: <20210427192658.266933-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210427192658.266933-1-f4bug@amsat.org> References: <20210427192658.266933-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) When building only the leon3 machine, we get this link failure: /usr/bin/ld: target_sparc_win_helper.c.o: in function `cpu_put_psr': target/sparc/win_helper.c:91: undefined reference to `cpu_check_irqs' This is because cpu_check_irqs() is defined in hw/sparc/sun4m.c, which is only built if the base sun4m machines are built (with the CONFIG_SUN4M selector). Fix by moving cpu_check_irqs() out of hw/sparc/sun4m.c and build it unconditionally. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/sparc/irq.c | 61 ++++++++++++++++++++++++++++++++++++++++++++ hw/sparc/sun4m.c | 32 ----------------------- hw/sparc/meson.build | 1 + 3 files changed, 62 insertions(+), 32 deletions(-) create mode 100644 hw/sparc/irq.c diff --git a/hw/sparc/irq.c b/hw/sparc/irq.c new file mode 100644 index 00000000000..e34639f266e --- /dev/null +++ b/hw/sparc/irq.c @@ -0,0 +1,61 @@ +/* + * QEMU Sun4m & Sun4d & Sun4c IRQ handling + * + * Copyright (c) 2003-2005 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "qemu/main-loop.h" +#include "hw/irq.h" +#include "cpu.h" +#include "trace.h" + +void cpu_check_irqs(CPUSPARCState *env) +{ + CPUState *cs; + + /* We should be holding the BQL before we mess with IRQs */ + g_assert(qemu_mutex_iothread_locked()); + + if (env->pil_in && (env->interrupt_index =3D=3D 0 || + (env->interrupt_index & ~15) =3D=3D TT_EXTINT)) { + unsigned int i; + + for (i =3D 15; i > 0; i--) { + if (env->pil_in & (1 << i)) { + int old_interrupt =3D env->interrupt_index; + + env->interrupt_index =3D TT_EXTINT | i; + if (old_interrupt !=3D env->interrupt_index) { + cs =3D env_cpu(env); + trace_sun4m_cpu_interrupt(i); + cpu_interrupt(cs, CPU_INTERRUPT_HARD); + } + break; + } + } + } else if (!env->pil_in && (env->interrupt_index & ~15) =3D=3D TT_EXTI= NT) { + cs =3D env_cpu(env); + trace_sun4m_cpu_reset_interrupt(env->interrupt_index & 15); + env->interrupt_index =3D 0; + cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); + } +} diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 1a00816d9a8..2edf913d945 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -159,38 +159,6 @@ static void nvram_init(Nvram *nvram, uint8_t *macaddr, } } =20 -void cpu_check_irqs(CPUSPARCState *env) -{ - CPUState *cs; - - /* We should be holding the BQL before we mess with IRQs */ - g_assert(qemu_mutex_iothread_locked()); - - if (env->pil_in && (env->interrupt_index =3D=3D 0 || - (env->interrupt_index & ~15) =3D=3D TT_EXTINT)) { - unsigned int i; - - for (i =3D 15; i > 0; i--) { - if (env->pil_in & (1 << i)) { - int old_interrupt =3D env->interrupt_index; - - env->interrupt_index =3D TT_EXTINT | i; - if (old_interrupt !=3D env->interrupt_index) { - cs =3D env_cpu(env); - trace_sun4m_cpu_interrupt(i); - cpu_interrupt(cs, CPU_INTERRUPT_HARD); - } - break; - } - } - } else if (!env->pil_in && (env->interrupt_index & ~15) =3D=3D TT_EXTI= NT) { - cs =3D env_cpu(env); - trace_sun4m_cpu_reset_interrupt(env->interrupt_index & 15); - env->interrupt_index =3D 0; - cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); - } -} - static void cpu_kick_irq(SPARCCPU *cpu) { CPUSPARCState *env =3D &cpu->env; diff --git a/hw/sparc/meson.build b/hw/sparc/meson.build index 19c442c90d9..470159ff659 100644 --- a/hw/sparc/meson.build +++ b/hw/sparc/meson.build @@ -1,4 +1,5 @@ sparc_ss =3D ss.source_set() +sparc_ss.add(files('irq.c')) sparc_ss.add(when: 'CONFIG_LEON3', if_true: files('leon3.c')) sparc_ss.add(when: 'CONFIG_SUN4M', if_true: files('sun4m.c')) sparc_ss.add(when: 'CONFIG_SUN4M', if_true: files('sun4m_iommu.c')) --=20 2.26.3