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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id y11sm1762066wmi.41.2021.04.27.06.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Apr 2021 06:33:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=oSlBoECRExsxDqWI4UCvlPSNPlCXk3V2bOqJ4paotxk=; b=cowiXHZeSWZMG92re9qorO3hwq66qT2+cy2U3wjx2mcC9vVMFfPivuebmuUhpL+e/i lJvtM26iQUADptpEtPu0pJ9orR7B3Ya8KUovwixKKJ+pcuxRwecxTk4IfOeP+0Mtmcwu lZ5Ei5bmeLTYo0yoNSaa4oI2zUUT0R1upvUdOjDR5/nw203sxKpmaAigHuqszf36Zj6K SwoQSAaFl0vxRo+11XtsdtdjAWRRRCmff5pPBq2QodYXmO/dGSm+QdbqQzSXhzi5mMjv q4/CiC0S+M9Yzbood52qfrP1FWkYwcfEzG8t/lQlFyh0x4CI5XKMXnSsj+wfewMyi7VO 8gOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=oSlBoECRExsxDqWI4UCvlPSNPlCXk3V2bOqJ4paotxk=; b=nWIybD83qapQTFqhJfsDDa1R3ELm6eERq+0P1Xb1jQ/dFQbZZ17L9eAQLnXFRo6qFD WWZvKZxKVF0KMLB+L1JbpMDmb/twGpsqWi4B7NYOLEn+cwzsx/SD03gP+DTreF682eeO u/GCblqoLRqBH3iH0xFcv7B4qeNd6nBJekNL+cMDcXibSgcQvIwhNvheEsIT8BKQT/Uv XVa2XFlrpQggtVxNKFhRDcnlhqP8B3/l/sIWuMwuPMYR2XqXPZ845L7Rs63oAlyoSrkP PlSSbTr9z0R2XRrtL5am0TXmRstEUDbD1CESlIDEEt1kPFXGgLUpR2Tw3JM8SRomRJd6 F2bg== X-Gm-Message-State: AOAM531/FgYwccfr2rxxPQBzcgfLCWGIbrzxVABVprOBnL4qgSQ1EV4G AxFNq6B9iEpRdduxhCDcHEzam6SGcNfBAQ== X-Google-Smtp-Source: ABdhPJxaNGgxJmhQyzWDECrYWnBC+TOnVbQCVfuiT3idnMd/VxlYPRXZcLdyfYSYja0o0Bvb4UAI0Q== X-Received: by 2002:a1c:2941:: with SMTP id p62mr25185166wmp.120.1619530425520; Tue, 27 Apr 2021 06:33:45 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aurelien Jarno , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , "Edgar E . Iglesias" , Aleksandar Rikalo , 1926277@bugs.launchpad.net Subject: [PATCH v2] target/mips: Only update MVPControl.EVP bit if executed by master VPE Date: Tue, 27 Apr 2021 15:33:37 +0200 Message-Id: <20210427133343.159718-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) According to the 'MIPS MT Application-Speci=EF=AC=81c Extension' manual: If the VPE executing the instruction is not a Master VPE, with the MVP bit of the VPEConf0 register set, the EVP bit is unchanged by the instruction. Modify the DVPE/EVPE opcodes to only update the MVPControl.EVP bit if executed on a master VPE. Reported-by: Hansni Bu Buglink: https://bugs.launchpad.net/qemu/+bug/1926277 Fixes: f249412c749 ("mips: Add MT halting and waking of VPEs") Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Jiaxun Yang --- Supersedes: <20210427103555.112652-1-f4bug@amsat.org> v2: Check VPEConf0.MVP bit (hansni) --- target/mips/cp0_helper.c | 32 ++++++++++++++++++-------------- 1 file changed, 18 insertions(+), 14 deletions(-) diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index aae2af6eccc..d5f274f5cdf 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -1635,12 +1635,14 @@ target_ulong helper_dvpe(CPUMIPSState *env) CPUState *other_cs =3D first_cpu; target_ulong prev =3D env->mvp->CP0_MVPControl; =20 - CPU_FOREACH(other_cs) { - MIPSCPU *other_cpu =3D MIPS_CPU(other_cs); - /* Turn off all VPEs except the one executing the dvpe. */ - if (&other_cpu->env !=3D env) { - other_cpu->env.mvp->CP0_MVPControl &=3D ~(1 << CP0MVPCo_EVP); - mips_vpe_sleep(other_cpu); + if (env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) { + CPU_FOREACH(other_cs) { + MIPSCPU *other_cpu =3D MIPS_CPU(other_cs); + /* Turn off all VPEs except the one executing the dvpe. */ + if (&other_cpu->env !=3D env) { + other_cpu->env.mvp->CP0_MVPControl &=3D ~(1 << CP0MVPCo_EV= P); + mips_vpe_sleep(other_cpu); + } } } return prev; @@ -1651,15 +1653,17 @@ target_ulong helper_evpe(CPUMIPSState *env) CPUState *other_cs =3D first_cpu; target_ulong prev =3D env->mvp->CP0_MVPControl; =20 - CPU_FOREACH(other_cs) { - MIPSCPU *other_cpu =3D MIPS_CPU(other_cs); + if (env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) { + CPU_FOREACH(other_cs) { + MIPSCPU *other_cpu =3D MIPS_CPU(other_cs); =20 - if (&other_cpu->env !=3D env - /* If the VPE is WFI, don't disturb its sleep. */ - && !mips_vpe_is_wfi(other_cpu)) { - /* Enable the VPE. */ - other_cpu->env.mvp->CP0_MVPControl |=3D (1 << CP0MVPCo_EVP); - mips_vpe_wake(other_cpu); /* And wake it up. */ + if (&other_cpu->env !=3D env + /* If the VPE is WFI, don't disturb its sleep. */ + && !mips_vpe_is_wfi(other_cpu)) { + /* Enable the VPE. */ + other_cpu->env.mvp->CP0_MVPControl |=3D (1 << CP0MVPCo_EVP= ); + mips_vpe_wake(other_cpu); /* And wake it up. */ + } } } return prev; --=20 2.26.3