From nobody Sun Feb 8 16:44:04 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1619521611; cv=none; d=zohomail.com; s=zohoarc; b=XugBZHajJ1pt+vz3QjPRGQlrA+CwhoOH0OLfiY5RKta9vSCDmGu6RrhT4bFgiunjnhyozQkDW8QGHiJoe0D26WxlvrXxqnf1F/mLLIgNkBR3OFh5pKM7X2pyJcZUZFBZgUJvPCV+TbvZUi/8cR7Q37iwf1l2LDsxt9irEB4HKmE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1619521611; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject; bh=/vNDT72bumqKASrZEoMb33vx0QAFciChwnE4JBD7TKY=; b=N+vCNdV4NAQvAhzB++Spld4aBAGWa2iEqIxJiThp4LgAVKYHBfTbR8KkF4MSolcYvnN38J+kNQjviGBITh/777nd6S3wH+snR3YDXOWB0ovIjdX67PwnEjoSC2NiHNAZ7pJjzczm/dMdnyuzS08dLdjivPOtdi2mU1glGwrMleI= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1619521611427722.8422641446401; Tue, 27 Apr 2021 04:06:51 -0700 (PDT) Received: from localhost ([::1]:47954 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lbLYH-00045T-Qi for importer@patchew.org; Tue, 27 Apr 2021 07:06:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46490) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lbLWf-00036p-L2 for qemu-devel@nongnu.org; Tue, 27 Apr 2021 07:05:09 -0400 Received: from mail.sysgo.com ([176.9.12.79]:59306) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lbLWc-0002Qb-Op for qemu-devel@nongnu.org; Tue, 27 Apr 2021 07:05:08 -0400 From: Roman Kapl To: Subject: [PATCH v2] amd_iommu: fix wrong MMIO operations Date: Tue, 27 Apr 2021 13:05:04 +0200 Message-Id: <20210427110504.10878-1-rka@sysgo.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=176.9.12.79; envelope-from=rka@sysgo.com; helo=mail.sysgo.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TO_EQ_FM_DIRECT_MX=0.228 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "Michael S. Tsirkin" , Roman Kapl , Richard Henderson , qemu-devel@nongnu.org, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Address was swapped with value when writing MMIO registers, so the user saw garbage in lot of cases. The interrupt status was not correctly set. Signed-off-by: Roman Kapl --- hw/i386/amd_iommu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) v1 -> v2: Change the amdvi_writeq_raw arg order to be consistent with the = rest of the code. diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 74a93a5d93..8b20914eee 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -99,7 +99,7 @@ static uint64_t amdvi_readq(AMDVIState *s, hwaddr addr) } =20 /* internal write */ -static void amdvi_writeq_raw(AMDVIState *s, uint64_t val, hwaddr addr) +static void amdvi_writeq_raw(AMDVIState *s, hwaddr addr, uint64_t val) { stq_le_p(&s->mmior[addr], val); } @@ -382,7 +382,7 @@ static void amdvi_completion_wait(AMDVIState *s, uint64= _t *cmd) } /* set completion interrupt */ if (extract64(cmd[0], 1, 1)) { - amdvi_test_mask(s, AMDVI_MMIO_STATUS, AMDVI_MMIO_STATUS_COMP_INT); + amdvi_assign_orq(s, AMDVI_MMIO_STATUS, AMDVI_MMIO_STATUS_COMP_INT); /* generate interrupt */ amdvi_generate_msi_interrupt(s); } @@ -553,7 +553,7 @@ static void amdvi_cmdbuf_run(AMDVIState *s) trace_amdvi_command_exec(s->cmdbuf_head, s->cmdbuf_tail, s->cmdbuf= ); amdvi_cmdbuf_exec(s); s->cmdbuf_head +=3D AMDVI_COMMAND_SIZE; - amdvi_writeq_raw(s, s->cmdbuf_head, AMDVI_MMIO_COMMAND_HEAD); + amdvi_writeq_raw(s, AMDVI_MMIO_COMMAND_HEAD, s->cmdbuf_head); =20 /* wrap head pointer */ if (s->cmdbuf_head >=3D s->cmdbuf_len * AMDVI_COMMAND_SIZE) { --=20 2.20.1