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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id l4sm19466811wrx.24.2021.04.18.09.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Apr 2021 09:31:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gpoNBDIqjGZ8Kx6BEbS7lZL3RSkdLsQ+f0VxVq/nvuQ=; b=r5hfpFp5NJBFF6gq+ARsJtfKX1OHw2ZlOyRiPKb/Xpxa7Ca4oPP3/yhesLZAZyOlYU NpIhFqAxE2umPmr5gUZzUwQfJXIinQ1ha7/1XZlM1bfnTvVaEri60dc6njHac6BhU7mP X0TwEzMPzN4cmKxboXMEsvHlVdF9wkpOLdj39GeAVPkeRQR421mKz+XjCEAfuLhGVDSW 3oC4C1x0790mwGRpJGma8bqwCtPB0sL55Z16Yg8AWxVdwXg8PjoXUenJEOuK4Ic+FcW4 U/wDoLPAGcl4KvafvwZN0SvIPFQC7/7Dk6eOk0Tt/i2rG0bmWVy/g2MI8D3GM7lRaZeO HMcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=gpoNBDIqjGZ8Kx6BEbS7lZL3RSkdLsQ+f0VxVq/nvuQ=; b=gx4BZh1opBNQcnLdEXADVnv2cc9mZ5QmEgUmlz9gtujo6A+s85NkY7zVeEzPw3ohhz N6PMAp64+0qt5V8tJ+oheSwb9cDtcteFeppnuCe09shaBCqBlHdGK6Wp1GwwxUWXOGAC sdHAp5TXC4O7T/sE+ZKpEmTib8Z23Pmf+gMQ9xNk3VZ8CyMJxOAtt5uFF7ksMI2Dpmqu nsIt5GvHYqyQeJ70FpTn/7Y3o6mWuzJZK7pbcCu4CVPWaCzI1NGs6LIh1GnKmKw7XsaX dQKgiF9J8ks7Co4QC5oHA8nV5q6O3PMIBW6dXImu6IknGpF3km0gRmoAmdH0tJKla587 kPOw== X-Gm-Message-State: AOAM533W0ZsXr6HTqnIDoG/BoeIV4DFRE06JCKNJgbf9zVQwMK1u+94A ZW6g1f9gqKh1TyEEQLMqebs= X-Google-Smtp-Source: ABdhPJwEXZ+6e89/VzvLpG1HsSTNk0519+2+yvy4B3kk43It+/lzCvmaEDR5fQ3+VL2k46u9sn/TVA== X-Received: by 2002:adf:f5cc:: with SMTP id k12mr9746560wrp.117.1618763506941; Sun, 18 Apr 2021 09:31:46 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Huacai Chen , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Richard Henderson , Aurelien Jarno Subject: [PATCH 02/26] target/mips: Move IEEE rounding mode array to new source file Date: Sun, 18 Apr 2021 18:31:10 +0200 Message-Id: <20210418163134.1133100-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210418163134.1133100-1-f4bug@amsat.org> References: <20210418163134.1133100-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) restore_msa_fp_status() is declared inlined in fpu_helper.h, and uses the ieee_rm[] array. Therefore any code calling restore_msa_fp_status() must have access to this ieee_rm[] array. kvm_mips_get_fpu_registers(), which is in target/mips/kvm.c, calls restore_msa_fp_status. Except this tiny array, the rest of fpu_helper.c is only useful for the TCG accelerator. To be able to restrict fpu_helper.c to TCG, we need to move the ieee_rm[] array to a new source file. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/mips/fpu.c | 18 ++++++++++++++++++ target/mips/fpu_helper.c | 8 -------- target/mips/meson.build | 1 + 3 files changed, 19 insertions(+), 8 deletions(-) create mode 100644 target/mips/fpu.c diff --git a/target/mips/fpu.c b/target/mips/fpu.c new file mode 100644 index 00000000000..39a2f7fd22e --- /dev/null +++ b/target/mips/fpu.c @@ -0,0 +1,18 @@ +/* + * Helpers for emulation of FPU-related MIPS instructions. + * + * Copyright (C) 2004-2005 Jocelyn Mayer + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#include "qemu/osdep.h" +#include "fpu/softfloat-helpers.h" +#include "fpu_helper.h" + +/* convert MIPS rounding mode in FCR31 to IEEE library */ +const FloatRoundMode ieee_rm[4] =3D { + float_round_nearest_even, + float_round_to_zero, + float_round_up, + float_round_down +}; diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 6dd853259e2..8ce56ed7c81 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -38,14 +38,6 @@ #define FP_TO_INT32_OVERFLOW 0x7fffffff #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL =20 -/* convert MIPS rounding mode in FCR31 to IEEE library */ -const FloatRoundMode ieee_rm[4] =3D { - float_round_nearest_even, - float_round_to_zero, - float_round_up, - float_round_down -}; - target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg) { target_ulong arg1 =3D 0; diff --git a/target/mips/meson.build b/target/mips/meson.build index 3733d1200f7..5fcb211ca9a 100644 --- a/target/mips/meson.build +++ b/target/mips/meson.build @@ -9,6 +9,7 @@ mips_ss =3D ss.source_set() mips_ss.add(files( 'cpu.c', + 'fpu.c', 'gdbstub.c', )) mips_tcg_ss =3D ss.source_set() --=20 2.26.3