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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id e13sm4820531wrg.72.2021.04.15.09.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Apr 2021 09:33:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1618504430; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IKnx1UsTiNnjJfU2KcMKe9foiZqOxTrajgakDx3VSoU=; b=gFKOAGtoZI2eS906svXjagiV9QaXbrY8G+w/zThPczdc5Db2cPzvQ9V/6RK3lYgfyePfUM 6MVD0/FId1ETsnHjNVoVinIcVCWEpBMHkGlSJmC1AIpOC3N4Aj3+mV/PBAokZzGTEw7o40 kMCr1Tt9aSNz2Uqbp1nNS6ci4YaY354= X-MC-Unique: tN6iZB5HOOGC-SjN1CPlJA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IKnx1UsTiNnjJfU2KcMKe9foiZqOxTrajgakDx3VSoU=; b=i+WlxHz2yD6VXO8MoG0AhXU++txyOyQouXBlEoidcxWLQWuzB5hqKNyuhZ/QXl1cE7 7HPwl2HGfHbFAqF/5TiciBuirgwGL1+ZQs49zk+mOS+ob/U2q+JgwtxM3DeAjy3nq8vX oUu8GprMaUQ0ZepiJrT6FWEja2nNe7bkLyGJVmRzA65RCsNUC1uFHOfYHp6S74lfCOft dvvdEKtqtPkRxZWgOh79vk0HA26e5skkONF8fEvppk9VwIXpBrIFU+MFKBdgLunD4gz6 I63tcv+dRK46HrSVHiNB6nOL0yoYx77bxczgRrlA8PNq/hwIiYzRezIq4n25PwrNx6aC pHgQ== X-Gm-Message-State: AOAM532j8VKmHcHXDdNdNfdbSu1WqF9bRzv6Mz11rKmhcaQnzV/9pHEj NPptUEWyrZK4lALmG37EmXy6KMglx07dbpj3PEmwBbt7JLyHNT/imJYMl3phFKxge3A3cpFgVT4 QpZjcUeIFuOESJA== X-Received: by 2002:adf:fe86:: with SMTP id l6mr4580811wrr.390.1618504428105; Thu, 15 Apr 2021 09:33:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxFVULUhOKWBrh54/W+muyqJnSUaT5CgVbHS+dWc17jz2PcfiXy9XAMSjn2ooCobSsC4UHrDw== X-Received: by 2002:adf:fe86:: with SMTP id l6mr4580801wrr.390.1618504428000; Thu, 15 Apr 2021 09:33:48 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Claudio Fontana , Igor Mammedov , Eduardo Habkost , qemu-arm@nongnu.org, Paolo Bonzini , Marcel Apfelbaum , Markus Armbruster , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Laurent Vivier , Andrew Jones , Richard Henderson , Juan Quintela , Thomas Huth , Peter Maydell , "Dr. David Alan Gilbert" , Eric Blake , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v4 07/12] qtest/arm-cpu-features: Use generic qtest_has_accel() to check for TCG Date: Thu, 15 Apr 2021 18:32:59 +0200 Message-Id: <20210415163304.4120052-8-philmd@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210415163304.4120052-1-philmd@redhat.com> References: <20210415163304.4120052-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Now than we can probe if the TCG accelerator is available at runtime with a QMP command, only run these tests if TCG is built into the QEMU binary. Suggested-by: Andrew Jones Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Andrew Jones --- tests/qtest/arm-cpu-features.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index b1d406542f7..0d9145dd168 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -20,7 +20,7 @@ */ #define SVE_MAX_VQ 16 =20 -#define MACHINE "-machine virt,gic-version=3Dmax -accel tcg " +#define MACHINE_TCG "-machine virt,gic-version=3Dmax -accel tcg " #define MACHINE_KVM "-machine virt,gic-version=3Dmax -accel kvm " #define QUERY_HEAD "{ 'execute': 'query-cpu-model-expansion', " \ " 'arguments': { 'type': 'full', " @@ -337,7 +337,7 @@ static void sve_tests_sve_max_vq_8(const void *data) { QTestState *qts; =20 - qts =3D qtest_init(MACHINE "-cpu max,sve-max-vq=3D8"); + qts =3D qtest_init(MACHINE_TCG "-cpu max,sve-max-vq=3D8"); =20 assert_sve_vls(qts, "max", BIT_ULL(8) - 1, NULL); =20 @@ -372,7 +372,7 @@ static void sve_tests_sve_off(const void *data) { QTestState *qts; =20 - qts =3D qtest_init(MACHINE "-cpu max,sve=3Doff"); + qts =3D qtest_init(MACHINE_TCG "-cpu max,sve=3Doff"); =20 /* SVE is off, so the map should be empty. */ assert_sve_vls(qts, "max", 0, NULL); @@ -428,7 +428,7 @@ static void test_query_cpu_model_expansion(const void *= data) { QTestState *qts; =20 - qts =3D qtest_init(MACHINE "-cpu max"); + qts =3D qtest_init(MACHINE_TCG "-cpu max"); =20 /* Test common query-cpu-model-expansion input validation */ assert_type_full(qts); @@ -593,8 +593,10 @@ int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); =20 - qtest_add_data_func("/arm/query-cpu-model-expansion", - NULL, test_query_cpu_model_expansion); + if (qtest_has_accel("tcg")) { + qtest_add_data_func("/arm/query-cpu-model-expansion", + NULL, test_query_cpu_model_expansion); + } =20 /* * For now we only run KVM specific tests with AArch64 QEMU in @@ -608,7 +610,7 @@ int main(int argc, char **argv) NULL, sve_tests_sve_off_kvm); } =20 - if (g_str_equal(qtest_get_arch(), "aarch64")) { + if (g_str_equal(qtest_get_arch(), "aarch64") && qtest_has_accel("tcg")= ) { qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-max-vq= -8", NULL, sve_tests_sve_max_vq_8); qtest_add_data_func("/arm/max/query-cpu-model-expansion/sve-off", --=20 2.26.3