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[88.21.201.17]) by smtp.gmail.com with ESMTPSA id w2sm1065553eju.71.2021.04.09.04.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 04:25:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=CaZ7A0hHP0vUQuh/pjacnc6RxmQkfaLdFlcQIeergRI=; b=W/Et8jOVXXhQIWsObP1zJCIPcxDNCSZ/7Dllqdx/EUMp9zDBKymymB5oii+QUCYGi/ +CwDZ8/7oowByqEKL+ikWXA56y/eTjo68bOOTnI1GZdUoPMwb7HHtNOAgE8vAtE44lt5 Q0w+0/BEi/R4GpVV77RzT63+0ROO4gdPFdx9unQapum8vKM2829rS8DsynELDIN2m5Wr cKYb0ih6JiyLQJ/5NA8KhjmuDoJ/U87evGVR09RKNEH6hKHm9o3XK0jzl2XniE5qPgOu hYLaP086r9yrcascnCCVl/hJQ3n7XzI6H3C0v4ooXS+e3VfQFGg1gdjhp/RNmHW80bnh DHKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=CaZ7A0hHP0vUQuh/pjacnc6RxmQkfaLdFlcQIeergRI=; b=Yn/cR64v0m0Udv7aI5wFqnxF92cBfHs1vYXE17OJc3l0YlhPaCze72tbFpH5C+xOq8 7KUpJ0jS1cCSUBK459lSWYN4TwRIgo5xeW6E/F90rhOI9pFckRnsl86sELVzIKM9KrmZ SrtWfvUjTdeM1TCzfbLKWlk1Vajfl2w+znnZLHbG0/c+RR05jGfyqsWGAGw+0JJ7kIJs jeDge1DLTtgIFyxUyE73CpHA+meL2EJU/cBR6A7L9Vb5ywk1MxvikDDrU1yDLJoc/TFA 8v7oW96t9L2BV0aCS0/Pd7AyHicXyq5kIHJOpZaolDhPqKwUSfWN+oJjnO+29o2rGuUK AOUw== X-Gm-Message-State: AOAM532cLqPc+8jIbsIfU7A7gBLFBAwRg2Y4mLSsKRmu0xXer4JJQrFd NSUpkuiLMyzeFMMYfFcIbfc= X-Google-Smtp-Source: ABdhPJz0mJQEiDNq+NxwwfrDQm7EK3tVDg34Z1cq9fb5ZMcRMH8rZupV7LIMi0dJiNnYGpgtaDrzWQ== X-Received: by 2002:a05:6402:212:: with SMTP id t18mr17107096edv.165.1617967557449; Fri, 09 Apr 2021 04:25:57 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Michael Rolnik , Luc Michel , Joaquin de Andres Subject: [PATCH-for-6.1] hw/avr/atmega: Convert to QDev Clock API Date: Fri, 9 Apr 2021 13:25:55 +0200 Message-Id: <20210409112555.2430933-1-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Create the oscillator object on the board, and propagate its clock to the ATMega MCU. Wire this clock to the timers. Properties are remplaced by clocks. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- Based-on: <20210409062401.2350436-1-f4bug@amsat.org> TODO: Add corresponding vmstates for migration, but these devices don't have any, so keep this for later. --- hw/avr/atmega.h | 3 ++- include/hw/timer/avr_timer16.h | 4 +++- hw/avr/arduino.c | 8 ++++++-- hw/avr/atmega.c | 20 +++++++++++--------- hw/timer/avr_timer16.c | 20 ++++++++++++-------- 5 files changed, 34 insertions(+), 21 deletions(-) diff --git a/hw/avr/atmega.h b/hw/avr/atmega.h index a99ee15c7e1..12e856386b6 100644 --- a/hw/avr/atmega.h +++ b/hw/avr/atmega.h @@ -11,6 +11,7 @@ #ifndef HW_AVR_ATMEGA_H #define HW_AVR_ATMEGA_H =20 +#include "hw/clock.h" #include "hw/char/avr_usart.h" #include "hw/timer/avr_timer16.h" #include "hw/misc/avr_power.h" @@ -41,11 +42,11 @@ struct AtmegaMcuState { MemoryRegion flash; MemoryRegion eeprom; MemoryRegion sram; + Clock *xtal_clkin; DeviceState *io; AVRMaskState pwr[POWER_MAX]; AVRUsartState usart[USART_MAX]; AVRTimer16State timer[TIMER_MAX]; - uint64_t xtal_freq_hz; }; =20 #endif /* HW_AVR_ATMEGA_H */ diff --git a/include/hw/timer/avr_timer16.h b/include/hw/timer/avr_timer16.h index 05362543378..86dc9e98d95 100644 --- a/include/hw/timer/avr_timer16.h +++ b/include/hw/timer/avr_timer16.h @@ -28,6 +28,7 @@ #ifndef HW_TIMER_AVR_TIMER16_H #define HW_TIMER_AVR_TIMER16_H =20 +#include "hw/clock.h" #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/hw.h" @@ -84,7 +85,8 @@ struct AVRTimer16State { uint8_t ifr; =20 uint8_t id; - uint64_t cpu_freq_hz; + Clock *io_clkin; + uint64_t freq_hz; uint64_t period_ns; uint64_t reset_time_ns; diff --git a/hw/avr/arduino.c b/hw/avr/arduino.c index 3ff31492fa6..71e69823c07 100644 --- a/hw/avr/arduino.c +++ b/hw/avr/arduino.c @@ -12,7 +12,9 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" +#include "hw/clock.h" #include "hw/boards.h" +#include "hw/qdev-clock.h" #include "atmega.h" #include "boot.h" #include "qom/object.h" @@ -21,6 +23,7 @@ struct ArduinoMachineState { /*< private >*/ MachineState parent_obj; /*< public >*/ + Clock *xtal; AtmegaMcuState mcu; }; typedef struct ArduinoMachineState ArduinoMachineState; @@ -44,9 +47,10 @@ static void arduino_machine_init(MachineState *machine) ArduinoMachineClass *amc =3D ARDUINO_MACHINE_GET_CLASS(machine); ArduinoMachineState *ams =3D ARDUINO_MACHINE(machine); =20 + ams->xtal =3D machine_create_constant_clock(machine, "osc", amc->xtal_= hz); + object_initialize_child(OBJECT(machine), "mcu", &ams->mcu, amc->mcu_ty= pe); - object_property_set_uint(OBJECT(&ams->mcu), "xtal-frequency-hz", - amc->xtal_hz, &error_abort); + qdev_connect_clock_in(DEVICE(&ams->mcu), "osc-in", ams->xtal); sysbus_realize(SYS_BUS_DEVICE(&ams->mcu), &error_abort); =20 if (machine->firmware) { diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c index 44c6afebbb6..b8a11965435 100644 --- a/hw/avr/atmega.c +++ b/hw/avr/atmega.c @@ -15,6 +15,7 @@ #include "exec/memory.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qom/object.h" @@ -216,6 +217,14 @@ static void connect_power_reduction_gpio(AtmegaMcuStat= e *s, qdev_get_gpio_in(cpu, 0)); } =20 +static void atmega_init(Object *obj) +{ + AtmegaMcuState *s =3D ATMEGA_MCU(obj); + + s->xtal_clkin =3D qdev_init_clock_in(DEVICE(obj), "osc-in", + NULL, NULL, ClockUpdate); +} + static void atmega_realize(DeviceState *dev, Error **errp) { AtmegaMcuState *s =3D ATMEGA_MCU(dev); @@ -227,11 +236,6 @@ static void atmega_realize(DeviceState *dev, Error **e= rrp) =20 assert(mc->io_size <=3D 0x200); =20 - if (!s->xtal_freq_hz) { - error_setg(errp, "\"xtal-frequency-hz\" property must be provided.= "); - return; - } - /* CPU */ object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type); object_property_set_bool(OBJECT(&s->cpu), "realized", true, &error_abo= rt); @@ -328,8 +332,7 @@ static void atmega_realize(DeviceState *dev, Error **er= rp) devname =3D g_strdup_printf("timer%zu", i); object_initialize_child(OBJECT(dev), devname, &s->timer[i], TYPE_AVR_TIMER16); - object_property_set_uint(OBJECT(&s->timer[i]), "cpu-frequency-hz", - s->xtal_freq_hz, &error_abort); + qdev_connect_clock_in(DEVICE(&s->timer[i]), "io-clk", s->xtal_clki= n); sbd =3D SYS_BUS_DEVICE(&s->timer[i]); sysbus_realize(sbd, &error_abort); sysbus_mmio_map(sbd, 0, OFFSET_DATA + mc->dev[idx].addr); @@ -353,8 +356,6 @@ static void atmega_realize(DeviceState *dev, Error **er= rp) } =20 static Property atmega_props[] =3D { - DEFINE_PROP_UINT64("xtal-frequency-hz", AtmegaMcuState, - xtal_freq_hz, 0), DEFINE_PROP_END_OF_LIST() }; =20 @@ -449,6 +450,7 @@ static const TypeInfo atmega_mcu_types[] =3D { .name =3D TYPE_ATMEGA_MCU, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(AtmegaMcuState), + .instance_init =3D atmega_init, .class_size =3D sizeof(AtmegaMcuClass), .class_init =3D atmega_class_init, .abstract =3D true, diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c index c48555da525..7092023d616 100644 --- a/hw/timer/avr_timer16.c +++ b/hw/timer/avr_timer16.c @@ -35,6 +35,7 @@ #include "qapi/error.h" #include "qemu/log.h" #include "hw/irq.h" +#include "hw/qdev-clock.h" #include "hw/qdev-properties.h" #include "hw/timer/avr_timer16.h" #include "trace.h" @@ -167,7 +168,7 @@ static void avr_timer16_clksrc_update(AVRTimer16State *= t16) break; } if (divider) { - t16->freq_hz =3D t16->cpu_freq_hz / divider; + t16->freq_hz =3D clock_get_hz(t16->io_clkin) / divider; t16->period_ns =3D NANOSECONDS_PER_SECOND / t16->freq_hz; trace_avr_timer16_clksrc_update(t16->freq_hz, t16->period_ns, (uint64_t)(1e6 / t16->freq_hz)); @@ -544,8 +545,6 @@ static const MemoryRegionOps avr_timer16_ifr_ops =3D { =20 static Property avr_timer16_properties[] =3D { DEFINE_PROP_UINT8("id", struct AVRTimer16State, id, 0), - DEFINE_PROP_UINT64("cpu-frequency-hz", struct AVRTimer16State, - cpu_freq_hz, 0), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -560,10 +559,20 @@ static void avr_timer16_pr(void *opaque, int irq, int= level) } } =20 +static void avr_timer16_clock_update(void *opaque, ClockEvent event) +{ + AVRTimer16State *s =3D opaque; + + avr_timer16_clksrc_update(s); +} + static void avr_timer16_init(Object *obj) { AVRTimer16State *s =3D AVR_TIMER16(obj); =20 + s->io_clkin =3D qdev_init_clock_in(DEVICE(obj), "io-clk", + avr_timer16_clock_update, s, ClockUpd= ate); + sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->capt_irq); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->compa_irq); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->compb_irq); @@ -587,11 +596,6 @@ static void avr_timer16_realize(DeviceState *dev, Erro= r **errp) { AVRTimer16State *s =3D AVR_TIMER16(dev); =20 - if (s->cpu_freq_hz =3D=3D 0) { - error_setg(errp, "AVR timer16: cpu-frequency-hz property must be s= et"); - return; - } - s->timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, avr_timer16_interrupt, s= ); s->enabled =3D true; } --=20 2.26.3