[PATCH v5 0/3] hw/misc: Model ASPEED hash and crypto engine

Joel Stanley posted 3 patches 2 years, 11 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20210409000253.1475587-1-joel@jms.id.au
docs/system/arm/aspeed.rst     |   2 +-
include/hw/arm/aspeed_soc.h    |   3 +
include/hw/misc/aspeed_hace.h  |  43 +++
hw/arm/aspeed_ast2600.c        |  15 ++
hw/arm/aspeed_soc.c            |  16 ++
hw/misc/aspeed_hace.c          | 389 +++++++++++++++++++++++++++
tests/qtest/aspeed_hace-test.c | 469 +++++++++++++++++++++++++++++++++
MAINTAINERS                    |   1 +
hw/misc/meson.build            |   1 +
tests/qtest/meson.build        |   3 +
10 files changed, 941 insertions(+), 1 deletion(-)
create mode 100644 include/hw/misc/aspeed_hace.h
create mode 100644 hw/misc/aspeed_hace.c
create mode 100644 tests/qtest/aspeed_hace-test.c
[PATCH v5 0/3] hw/misc: Model ASPEED hash and crypto engine
Posted by Joel Stanley 2 years, 11 months ago
This version of the series adds the cleanups Cédric made and the scatter
gather feature that Klaus implemented. I took inspiration from Klaus's
patches and reworked the direct hashing mode to easier implement both sg
and direct modes.

The r-b tags are preserved as the changes were minor. I welcome further
review though if you have time.

v5: Merge scatter gather feature
v4: Rebase on Philippe's memory region cleanup series [1]
    Address feedback from Cédric
    Rework qtest to run on ast2400, ast2500 and ast2600
v3: Rework qtest to not use libqtest-single.h, rebase to avoid LPC
conflicts.
v2: Address review from Andrew and Philippe. Adds a qtest.

[1] https://lore.kernel.org/qemu-devel/20210312182851.1922972-1-f4bug@amsat.org/

This adds a model for the ASPEED hash and crypto engine (HACE) found on
all supported ASPEED SoCs.

The model uses Qemu's gcrypto API to perform the SHA and MD5 hashing
directly in the machine's emulated memory space, which I found a neat
use of Qemu's features.

It has been tested using u-boot and from Linux userspace, and adds a
qtest for the model running as part of the ast2600-evb, ast2500-evb and
palmetto-bmc (to test ast2400) machines.

Note that the tests will fail without Philippe/Cédric's memory region series.

Joel Stanley (3):
  hw: Model ASPEED's Hash and Crypto Engine
  aspeed: Integrate HACE
  tests/qtest: Add test for Aspeed HACE

 docs/system/arm/aspeed.rst     |   2 +-
 include/hw/arm/aspeed_soc.h    |   3 +
 include/hw/misc/aspeed_hace.h  |  43 +++
 hw/arm/aspeed_ast2600.c        |  15 ++
 hw/arm/aspeed_soc.c            |  16 ++
 hw/misc/aspeed_hace.c          | 389 +++++++++++++++++++++++++++
 tests/qtest/aspeed_hace-test.c | 469 +++++++++++++++++++++++++++++++++
 MAINTAINERS                    |   1 +
 hw/misc/meson.build            |   1 +
 tests/qtest/meson.build        |   3 +
 10 files changed, 941 insertions(+), 1 deletion(-)
 create mode 100644 include/hw/misc/aspeed_hace.h
 create mode 100644 hw/misc/aspeed_hace.c
 create mode 100644 tests/qtest/aspeed_hace-test.c

-- 
2.30.2