From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=huawei.com ARC-Seal: i=1; a=rsa-sha256; t=1617185011; cv=none; d=zohomail.com; s=zohoarc; b=XasNL3XS0npViFZUBqvon/fUKNtulQyKc76LE5CBfTprBiZR3xpL6fBfqLMKhLeti6JvLvowOntyy9hdddKv6WjLSZKdGA19LNtZti/TPrnuKYTUCkjjyULJckefogmQ/Bh5/DKR6EtCUcbg7MIccuJHOWXccAo2UxQ1rDHI01s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617185011; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dpNvK3A+1znwVVSUfxW/b9SEM3MJwxTYbBDv/vPFJYU=; b=kJkVDSUbguP6HA3nI08lz6P0WUq8IzgENkwXGsPFhqfIVeWuwFxIaw4DRLnf8wUA/708HmG1A6Mp+309W5Ti20s/5tKZHemUhng0OFiKqWh7eIUdoyq6KpaaFfhk3toV32HeLcS786Pi+ySUhsy2DUt84rBLtUYlpT/acQdcjGY= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1617185011138287.9051248270389; Wed, 31 Mar 2021 03:03:31 -0700 (PDT) Received: from localhost ([::1]:53456 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lRXhB-00038l-R8 for importer@patchew.org; Wed, 31 Mar 2021 06:03:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52120) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXYH-0002ht-5z; Wed, 31 Mar 2021 05:54:18 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:4839) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXY6-0002Xu-KD; Wed, 31 Mar 2021 05:54:15 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4F9M6G08PWz1BFy7; Wed, 31 Mar 2021 17:51:50 +0800 (CST) Received: from DESKTOP-TMVL5KK.china.huawei.com (10.174.187.128) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Wed, 31 Mar 2021 17:53:47 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 1/6] vl.c: Add arch-neutral -smp, clusters=* command line support Date: Wed, 31 Mar 2021 17:53:38 +0800 Message-ID: <20210331095343.12172-2-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.190; envelope-from=wangyanan55@huawei.com; helo=szxga04-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" A cluster means a group of cores that share some resources (e.g. cache) among them under the LLC. For example, ARM64 server chip Kunpeng 920 has 6 or 8 clusters in each NUMA, and each cluster has 4 cores. All clusters share L3 cache data while cores within each cluster share the L2 cache. Also, there are some x86 CPU implementations (e.g. Jacobsville) where L2 cache is shared among a cluster of cores instead of being exclusive to one single core. For example, on Jacobsville there are 6 clusters of 4 Atom cores, each cluster sharing a separate L2, and 24 cores sharing L3). The cache affinity of cluster has been proved to improve the Linux kernel scheduling performance and a patchset has been posted, in which a general sched_domain for clusters was added and a cluster level was added in the arch-neutral cpu topology struct like below. struct cpu_topology { int thread_id; int core_id; int cluster_id; int package_id; int llc_id; cpumask_t thread_sibling; cpumask_t core_sibling; cpumask_t cluster_sibling; cpumask_t llc_sibling; } Also the Kernel Doc: Documentation/devicetree/bindings/cpu/cpu-topology.txt defines a four-level CPU topology hierarchy like socket/cluster/core/thread. According to the context, a socket node's child nodes must be one or more cluster nodes and a cluster node's child nodes must be one or more cluster nodes/one or more core nodes. So let's add the arch-neutral -smp, clusters=3D* command line support, so t= hat future guest os could make use of cluster cpu topology for better scheduling performance. And whichever architecture that has groups of cpus sharing some separate resources(e.g. L2 cache) internely under LLC can use this command line parameter to define a VM with cluster level cpu topology. For ARM machines, a four-level cpu hierarchy can be defined and it will be sockets/clusters/cores/threads. For PC machines, a five-level cpu hierarchy can be defined and it will be sockets/dies/clusters/cores/threads. Signed-off-by: Yanan Wang --- include/hw/boards.h | 4 +++- qemu-options.hx | 27 ++++++++++++++++----------- softmmu/vl.c | 3 +++ 3 files changed, 22 insertions(+), 12 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index a46dfe5d1a..776c3fe5e1 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -235,13 +235,15 @@ typedef struct DeviceMemoryState { /** * CpuTopology: * @cpus: the number of present logical processors on the machine - * @cores: the number of cores in one package + * @clusters: the number of clusters in one package + * @cores: the number of cores in one cluster * @threads: the number of threads in one core * @sockets: the number of sockets on the machine * @max_cpus: the maximum number of logical processors on the machine */ typedef struct CpuTopology { unsigned int cpus; + unsigned int clusters; unsigned int cores; unsigned int threads; unsigned int sockets; diff --git a/qemu-options.hx b/qemu-options.hx index 6c34c7050f..213904ceda 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -184,25 +184,30 @@ SRST ERST =20 DEF("smp", HAS_ARG, QEMU_OPTION_smp, - "-smp [cpus=3D]n[,maxcpus=3Dcpus][,cores=3Dcores][,threads=3Dthreads][= ,dies=3Ddies][,sockets=3Dsockets]\n" + "-smp [cpus=3D]n[,maxcpus=3Dcpus][,clusters=3Dclusters][,cores=3Dcores= ][,threads=3Dthreads][,dies=3Ddies][,sockets=3Dsockets]\n" " set the number of CPUs to 'n' [default=3D1]\n" " maxcpus=3D maximum number of total cpus, including\n" " offline CPUs for hotplug, etc\n" - " cores=3D number of CPU cores on one socket (for PC, i= t's on one die)\n" + " clusters=3D number of CPU clusters on one socket\n" + " (for PC, it's on one die)\n" + " cores=3D number of CPU cores on one cluster\n" " threads=3D number of threads on one CPU core\n" " dies=3D number of CPU dies on one socket (for PC only= )\n" " sockets=3D number of discrete sockets in the system\n= ", QEMU_ARCH_ALL) SRST -``-smp [cpus=3D]n[,cores=3Dcores][,threads=3Dthreads][,dies=3Ddies][,socke= ts=3Dsockets][,maxcpus=3Dmaxcpus]`` - Simulate an SMP system with n CPUs. On the PC target, up to 255 CPUs - are supported. On Sparc32 target, Linux limits the number of usable - CPUs to 4. For the PC target, the number of cores per die, the - number of threads per cores, the number of dies per packages and the - total number of sockets can be specified. Missing values will be - computed. If any on the three values is given, the total number of - CPUs n can be omitted. maxcpus specifies the maximum number of - hotpluggable CPUs. +``-smp [cpus=3D]n[,maxcpus=3Dcpus][,clusters=3Dclusters][,cores=3Dcores][,= threads=3Dthreads][,dies=3Ddies][,sockets=3Dsockets]`` + Simulate an SMP system with n CPUs. On the PC target, up to 255 + CPUs are supported. On the Sparc32 target, Linux limits the number + of usable CPUs to 4. For the PC target, the number of threads per + core, the number of cores per cluster, the number of clusters per + die, the number of dies per package and the total number of sockets + can be specified. For the ARM target, the number of threads per core, + the number of cores per cluster, the number of clusters per socket + and the total number of sockets can be specified. And missing values + will be computed. If any of the five values is given, the total + number of CPUs n can be omitted. Maxcpus specifies the maximum + number of hotpluggable CPUs. ERST =20 DEF("numa", HAS_ARG, QEMU_OPTION_numa, diff --git a/softmmu/vl.c b/softmmu/vl.c index b219ce1f35..b915f0606a 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -711,6 +711,9 @@ static QemuOptsList qemu_smp_opts =3D { }, { .name =3D "dies", .type =3D QEMU_OPT_NUMBER, + }, { + .name =3D "clusters", + .type =3D QEMU_OPT_NUMBER, }, { .name =3D "cores", .type =3D QEMU_OPT_NUMBER, --=20 2.19.1 From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=huawei.com ARC-Seal: i=1; a=rsa-sha256; t=1617185010; cv=none; d=zohomail.com; s=zohoarc; b=ETgtOd5gpaHAXisVzy2TtI4NCEwKWw/ThVtYWnOIyJ00+nPC7wVG0O1s4bSLQygyOdnSf7nmBgi8aMgAknaQXiq7cMNO+KYIzzfnRpwyZDWD8/OmgrWIyXbHODa2506iJm3PYmQ2PUeCwvxCWwHNTBXdbm2AJBIKHis86WE40KE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617185010; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=O/MSzVeH1SLIXgsXkt5u0JGoKE6TLWEiGwub5jtCqOc=; b=SnLDXvWQXKuc4AzeGc46+693R4Ri+gF7fZ+TnRRVGzF+EWQDTN0uAtVAh1uwqFTgt8gTM5GJteR15qQUktcTpLvbYO4lCln303DnX4OslvrcsZqUs7NUWP+6GyN74SOgfCeVGfraAMdMsnDvCkjbz55O0vna0Zm2oWPH2Uw225o= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1617185010651938.7328976044869; Wed, 31 Mar 2021 03:03:30 -0700 (PDT) Received: from localhost ([::1]:53400 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lRXhB-00037X-Ds for importer@patchew.org; Wed, 31 Mar 2021 06:03:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52188) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXYL-0002kv-Jy; Wed, 31 Mar 2021 05:54:21 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:4838) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXY9-0002Xt-9P; Wed, 31 Mar 2021 05:54:21 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4F9M6F6wfLz1BFy5; Wed, 31 Mar 2021 17:51:49 +0800 (CST) Received: from DESKTOP-TMVL5KK.china.huawei.com (10.174.187.128) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Wed, 31 Mar 2021 17:53:48 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 2/6] hw/core/machine: Parse cluster cpu topology in smp_parse() Date: Wed, 31 Mar 2021 17:53:39 +0800 Message-ID: <20210331095343.12172-3-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.190; envelope-from=wangyanan55@huawei.com; helo=szxga04-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Function smp_parse() in hw/core/machine.c is a generic/default function used for parsing the -smp command line. Since the new cluster parameter has been added in struct CpuTopology, we should parse this new parameter in the default function. In smp_parse(), the computing logic of missing values prefers sockets over cores over threads. And the value of clusters will be set as default 1 if not explictly specified, so that it will not impact the parsing results of machines that won't specify "clusters=3D" in -smp command line because they just don't support it. Signed-off-by: Yanan Wang --- hw/core/machine.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 970046f438..dd77ad183d 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -720,33 +720,38 @@ static void smp_parse(MachineState *ms, QemuOpts *opt= s) if (opts) { unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); + unsigned clusters =3D qemu_opt_get_number(opts, "clusters", 1); unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); =20 - /* compute missing values, prefer sockets over cores over threads = */ + /* + * Compute missing values, prefer sockets over cores + * over threads. And the value of clusters has been + * set as default 1 if not explicitly specified. + */ if (cpus =3D=3D 0 || sockets =3D=3D 0) { cores =3D cores > 0 ? cores : 1; threads =3D threads > 0 ? threads : 1; if (cpus =3D=3D 0) { sockets =3D sockets > 0 ? sockets : 1; - cpus =3D cores * threads * sockets; + cpus =3D sockets * clusters * cores * threads; } else { ms->smp.max_cpus =3D qemu_opt_get_number(opts, "maxcpus", cpus); - sockets =3D ms->smp.max_cpus / (cores * threads); + sockets =3D ms->smp.max_cpus / (clusters * cores * threads= ); } } else if (cores =3D=3D 0) { threads =3D threads > 0 ? threads : 1; - cores =3D cpus / (sockets * threads); + cores =3D cpus / (sockets * clusters * threads); cores =3D cores > 0 ? cores : 1; } else if (threads =3D=3D 0) { - threads =3D cpus / (cores * sockets); + threads =3D cpus / (sockets * clusters * cores); threads =3D threads > 0 ? threads : 1; - } else if (sockets * cores * threads < cpus) { + } else if (sockets * clusters * cores * threads < cpus) { error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) < " - "smp_cpus (%u)", - sockets, cores, threads, cpus); + "sockets (%u) * clusters (%u) * cores (%u) * " + "threads (%u) < smp_cpus (%u)", + sockets, clusters, cores, threads, cpus); exit(1); } =20 @@ -758,16 +763,17 @@ static void smp_parse(MachineState *ms, QemuOpts *opt= s) exit(1); } =20 - if (sockets * cores * threads !=3D ms->smp.max_cpus) { + if (sockets * clusters * cores * threads !=3D ms->smp.max_cpus) { error_report("Invalid CPU topology: " - "sockets (%u) * cores (%u) * threads (%u) " - "!=3D maxcpus (%u)", - sockets, cores, threads, + "sockets (%u) * clusters (%u) * cores (%u) * " + "threads (%u) !=3D maxcpus (%u)", + sockets, clusters, cores, threads, ms->smp.max_cpus); exit(1); } =20 ms->smp.cpus =3D cpus; + ms->smp.clusters =3D clusters; ms->smp.cores =3D cores; ms->smp.threads =3D threads; ms->smp.sockets =3D sockets; --=20 2.19.1 From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 31 Mar 2021 17:53:49 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 3/6] hw/arm/virt: Parse cluster cpu topology for ARM machines Date: Wed, 31 Mar 2021 17:53:40 +0800 Message-ID: <20210331095343.12172-4-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.32; envelope-from=wangyanan55@huawei.com; helo=szxga06-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is a separate function virt_smp_parse() in hw/virt/arm.c used to parse cpu topology for the ARM machines. And there are some ARM implementations that have the concept of cluster, for example, ARM64 server chip Kunpeng 920 has 6 or 8 clusters in each NUMA node and each cluster has 4 cores. All clusters share L3 cache data while the cores within each cluster share L2 cache. So parse cluster cpu topology for ARM machines, then guest kernel will take advantages of it for better scheduling performance. In virt_smp_parse(), the computing logic of missing values prefers cores over sockets over threads. And the value of clusters will be set as default 1 if not explictly specified, so that it will not impact the parsing results of machines that won't specify "clusters=3D" in -smp command line because they just don't support it. Signed-off-by: Yanan Wang --- hw/arm/virt.c | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 911ad7d3aa..c9ad76ff64 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2608,35 +2608,37 @@ static void virt_smp_parse(MachineState *ms, QemuOp= ts *opts) if (opts) { unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); + unsigned clusters =3D qemu_opt_get_number(opts, "clusters", 1); unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); =20 /* - * Compute missing values; prefer cores over sockets and - * sockets over threads. + * Compute missing values, prefer cores over sockets + * and sockets over threads. The value of clusters has + * been be set as default 1 if not explicitly specified. */ if (cpus =3D=3D 0 || cores =3D=3D 0) { sockets =3D sockets > 0 ? sockets : 1; threads =3D threads > 0 ? threads : 1; if (cpus =3D=3D 0) { cores =3D cores > 0 ? cores : 1; - cpus =3D cores * threads * sockets; + cpus =3D sockets * clusters * cores * threads; } else { ms->smp.max_cpus =3D qemu_opt_get_number(opts, "maxcpus", = cpus); - cores =3D ms->smp.max_cpus / (sockets * threads); + cores =3D ms->smp.max_cpus / (sockets * clusters * threads= ); } } else if (sockets =3D=3D 0) { threads =3D threads > 0 ? threads : 1; - sockets =3D cpus / (cores * threads); + sockets =3D cpus / (clusters * cores * threads); sockets =3D sockets > 0 ? sockets : 1; } else if (threads =3D=3D 0) { - threads =3D cpus / (cores * sockets); + threads =3D cpus / (sockets * clusters * cores); threads =3D threads > 0 ? threads : 1; - } else if (sockets * cores * threads < cpus) { + } else if (sockets * clusters * cores * threads < cpus) { error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) < " - "smp_cpus (%u)", - sockets, cores, threads, cpus); + "sockets (%u) * clusters (%u) * cores (%u) * " + "threads (%u) < smp_cpus (%u)", + sockets, clusters, cores, threads, cpus); exit(1); } =20 @@ -2647,16 +2649,17 @@ static void virt_smp_parse(MachineState *ms, QemuOp= ts *opts) exit(1); } =20 - if (sockets * cores * threads !=3D ms->smp.max_cpus) { + if (sockets * clusters * cores * threads !=3D ms->smp.max_cpus) { error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u)" - "!=3D maxcpus (%u)", - sockets, cores, threads, + "sockets (%u) * clusters(%u) * cores (%u) * " + "threads (%u) !=3D maxcpus (%u)", + sockets, clusters, cores, threads, ms->smp.max_cpus); exit(1); } =20 ms->smp.cpus =3D cpus; + ms->smp.clusters =3D clusters; ms->smp.cores =3D cores; ms->smp.threads =3D threads; ms->smp.sockets =3D sockets; --=20 2.19.1 From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1617184681532139.66915304878376; Wed, 31 Mar 2021 02:58:01 -0700 (PDT) Received: from localhost ([::1]:40754 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lRXbq-0006J8-Up for importer@patchew.org; Wed, 31 Mar 2021 05:58:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52204) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXYL-0002lr-T0; Wed, 31 Mar 2021 05:54:21 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:4841) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXY7-0002aw-2M; Wed, 31 Mar 2021 05:54:21 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4F9M6M1MGlz1BFy9; Wed, 31 Mar 2021 17:51:55 +0800 (CST) Received: from DESKTOP-TMVL5KK.china.huawei.com (10.174.187.128) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.498.0; Wed, 31 Mar 2021 17:53:51 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 4/6] hw/i386/pc: Parse cluster cpu topology for PC machines Date: Wed, 31 Mar 2021 17:53:41 +0800 Message-ID: <20210331095343.12172-5-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.190; envelope-from=wangyanan55@huawei.com; helo=szxga04-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is a separate function pc_smp_parse() in hw/i386/pc.c used to parse cpu topology for the PC machines. And there are some x86 implementations that have a similar concept of cluster, for example, on Jacobsville there are 6 clusters of 4 Atom cores, each cluster sharing a separate L2 cache, and 24 cores sharing L3 cache. So parse cluster cpu topology the for PC machines, then guest kernel will take advantages of it for better scheduling performance. In pc_smp_parse(), the computing logic of missing values prefers sockets over cores over threads. And the value of clusters will be set as default 1 if not explictly specified, so that it will not impact the parsing results of machines that won't specify "clusters=3D" in -smp command line because they just don't support it. Signed-off-by: Yanan Wang --- hw/i386/pc.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8aa85dec54..f2906f9185 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -716,33 +716,39 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); unsigned dies =3D qemu_opt_get_number(opts, "dies", 1); + unsigned clusters =3D qemu_opt_get_number(opts, "clusters", 1); unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); =20 - /* compute missing values, prefer sockets over cores over threads = */ + /* + * Compute missing values, prefer sockets over cores + * over threads. And the value of dies or clusters has + * been set as default 1 if not explicitly specified. + */ if (cpus =3D=3D 0 || sockets =3D=3D 0) { cores =3D cores > 0 ? cores : 1; threads =3D threads > 0 ? threads : 1; if (cpus =3D=3D 0) { sockets =3D sockets > 0 ? sockets : 1; - cpus =3D cores * threads * dies * sockets; + cpus =3D sockets * dies * clusters * cores * threads; } else { ms->smp.max_cpus =3D qemu_opt_get_number(opts, "maxcpus", cpus); - sockets =3D ms->smp.max_cpus / (cores * threads * dies); + sockets =3D ms->smp.max_cpus / + (dies * clusters * cores * threads); } } else if (cores =3D=3D 0) { threads =3D threads > 0 ? threads : 1; - cores =3D cpus / (sockets * dies * threads); + cores =3D cpus / (sockets * dies * clusters * threads); cores =3D cores > 0 ? cores : 1; } else if (threads =3D=3D 0) { - threads =3D cpus / (cores * dies * sockets); + threads =3D cpus / (sockets * dies * clusters * cores); threads =3D threads > 0 ? threads : 1; - } else if (sockets * dies * cores * threads < cpus) { + } else if (sockets * dies * clusters * cores * threads < cpus) { error_report("cpu topology: " - "sockets (%u) * dies (%u) * cores (%u) * threads = (%u) < " - "smp_cpus (%u)", - sockets, dies, cores, threads, cpus); + "sockets (%u) * dies (%u) * clusters (%u) * " + "cores (%u) * threads (%u) < smp_cpus (%u)", + sockets, dies, clusters, cores, threads, cpus); exit(1); } =20 @@ -756,14 +762,15 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) =20 if (sockets * dies * cores * threads !=3D ms->smp.max_cpus) { error_report("Invalid CPU topology deprecated: " - "sockets (%u) * dies (%u) * cores (%u) * threads = (%u) " - "!=3D maxcpus (%u)", - sockets, dies, cores, threads, + "sockets (%u) * dies (%u) * clusters (%u) * " + "cores (%u) * threads (%u) !=3D maxcpus (%u)", + sockets, dies, clusters, cores, threads, ms->smp.max_cpus); exit(1); } =20 ms->smp.cpus =3D cpus; + ms->smp.clusters =3D clusters; ms->smp.cores =3D cores; ms->smp.threads =3D threads; ms->smp.sockets =3D sockets; --=20 2.19.1 From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 31 Mar 2021 17:53:52 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 5/6] hw/arm/virt-acpi-build: Add cluster level for ARM PPTT table Date: Wed, 31 Mar 2021 17:53:42 +0800 Message-ID: <20210331095343.12172-6-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.32; envelope-from=wangyanan55@huawei.com; helo=szxga06-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a Processor Hierarchy Node of cluster level between core level and package level for ARM PPTT table. Signed-off-by: Yanan Wang --- hw/acpi/aml-build.c | 11 ++++++++++ hw/arm/virt-acpi-build.c | 43 +++++++++++++++++++++---------------- include/hw/acpi/aml-build.h | 2 ++ 3 files changed, 38 insertions(+), 18 deletions(-) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index a0af3e9d73..fe07817013 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1902,6 +1902,17 @@ void build_socket_hierarchy(GArray *tbl, uint32_t pa= rent, uint32_t id) build_append_int_noprefix(tbl, 0, 4); /* Number of private resources = */ } =20 +void build_cluster_hierarchy(GArray *tbl, uint32_t parent, uint32_t id) +{ + build_append_byte(tbl, ACPI_PPTT_TYPE_PROCESSOR); /* Type 0 - processo= r */ + build_append_byte(tbl, 20); /* Length, no private resources = */ + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ + build_append_int_noprefix(tbl, 0, 4); /* Flags */ + build_append_int_noprefix(tbl, parent, 4); /* Parent */ + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */ + build_append_int_noprefix(tbl, 0, 4); /* Number of private resources */ +} + void build_processor_hierarchy(GArray *tbl, uint32_t flags, uint32_t parent, uint32_t id) { diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 38d50ce66c..3b80518a90 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -442,6 +442,7 @@ build_pptt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) int pptt_start =3D table_data->len; int uid =3D 0, cpus =3D 0, socket =3D 0; MachineState *ms =3D MACHINE(vms); + unsigned int smp_clusters =3D ms->smp.clusters; unsigned int smp_cores =3D ms->smp.cores; unsigned int smp_threads =3D ms->smp.threads; =20 @@ -449,29 +450,35 @@ build_pptt(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) =20 for (socket =3D 0; cpus < ms->possible_cpus->len; socket++) { uint32_t socket_offset =3D table_data->len - pptt_start; - int core; + int cluster; =20 build_socket_hierarchy(table_data, 0, socket); =20 - for (core =3D 0; core < smp_cores; core++) { - uint32_t core_offset =3D table_data->len - pptt_start; - int thread; - - if (smp_threads <=3D 1) { - build_processor_hierarchy(table_data, - ACPI_PPTT_ACPI_PROCESSOR_ID_VALI= D | - ACPI_PPTT_ACPI_LEAF_NODE, - socket_offset, uid++); - } else { - build_processor_hierarchy(table_data, - ACPI_PPTT_ACPI_PROCESSOR_ID_VALI= D, - socket_offset, core); - for (thread =3D 0; thread < smp_threads; thread++) { - build_thread_hierarchy(table_data, core_offset, uid++); + for (cluster =3D 0; cluster < smp_clusters; cluster++) { + uint32_t cluster_offset =3D table_data->len - pptt_start; + int core; + + build_cluster_hierarchy(table_data, socket_offset, cluster); + + for (core =3D 0; core < smp_cores; core++) { + uint32_t core_offset =3D table_data->len - pptt_start; + int thread; + + if (smp_threads <=3D 1) { + build_processor_hierarchy(table_data, + ACPI_PPTT_ACPI_PROCESSOR_ID_= VALID | + ACPI_PPTT_ACPI_LEAF_NODE, + cluster_offset, uid++); + } else { + build_processor_hierarchy(table_data, 0, cluster_offse= t, core); + + for (thread =3D 0; thread < smp_threads; thread++) { + build_thread_hierarchy(table_data, core_offset, ui= d++); + } } - } + } } - cpus +=3D smp_cores * smp_threads; + cpus +=3D smp_clusters * smp_cores * smp_threads; } =20 build_header(linker, table_data, diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 7f0ca1a198..cb68535cf1 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -464,6 +464,8 @@ void build_slit(GArray *table_data, BIOSLinker *linker,= MachineState *ms, =20 void build_socket_hierarchy(GArray *tbl, uint32_t parent, uint32_t id); =20 +void build_cluster_hierarchy(GArray *tbl, uint32_t parent, uint32_t id); + void build_processor_hierarchy(GArray *tbl, uint32_t flags, uint32_t parent, uint32_t id); =20 --=20 2.19.1 From nobody Mon May 6 12:21:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 31 Mar 2021 17:53:54 +0800 From: Yanan Wang To: , Subject: [RFC PATCH 6/6] hw/arm/virt: Add cluster level for ARM device tree Date: Wed, 31 Mar 2021 17:53:43 +0800 Message-ID: <20210331095343.12172-7-wangyanan55@huawei.com> X-Mailer: git-send-email 2.8.4.windows.1 In-Reply-To: <20210331095343.12172-1-wangyanan55@huawei.com> References: <20210331095343.12172-1-wangyanan55@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.128] X-CFilter-Loop: Reflected Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.32; envelope-from=wangyanan55@huawei.com; helo=szxga06-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Barry Song , Peter Maydell , Andrew Jones , Eduardo Habkost , "Michael S . Tsirkin" , wanghaibin.wang@huawei.com, Richard Henderson , Yanan Wang , Shannon Zhao , Paolo Bonzini , yuzenghui@huawei.com, Igor Mammedov , zhukeqian1@huawei.com, Jiajie Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a cluster level between core level and package level for ARM device tree. Signed-off-by: Yanan Wang --- hw/arm/virt.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c9ad76ff64..d78db3387e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -430,14 +430,20 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) =20 if (ms->smp.threads > 1) { map_path =3D g_strdup_printf( - "/cpus/cpu-map/%s%d/%s%d/%s%d", - "socket", cpu / (ms->smp.cores * ms->smp.threa= ds), + "/cpus/cpu-map/%s%d/%s%d/%s%d/%s%d", + "socket", + cpu / (ms->smp.clusters * ms->smp.cores * + ms->smp.threads), + "cluster", + (cpu / (ms->smp.cores * ms->smp.threads)) % + ms->smp.clusters, "core", (cpu / ms->smp.threads) % ms->smp.core= s, "thread", cpu % ms->smp.threads); } else { map_path =3D g_strdup_printf( - "/cpus/cpu-map/%s%d/%s%d", - "socket", cpu / ms->smp.cores, + "/cpus/cpu-map/%s%d/%s%d/%s%d", + "socket", cpu / (ms->smp.clusters * ms->smp.co= res), + "cluster", (cpu / ms->smp.cores) % ms->smp.clu= sters, "core", cpu % ms->smp.cores); } qemu_fdt_add_path(vms->fdt, map_path); --=20 2.19.1