From nobody Tue Apr 30 06:04:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1616989213; cv=none; d=zohomail.com; s=zohoarc; b=OqXwP5MLVwhnGNhqtz8VyfXnY7YmK/69ojE0HAQ7q6Cp4PqR7SEFmgdoR05ocd4pYyZn4Iyo0w/EFKzRkYbuW8uKGoCHJhPkjmMdZx/qcOBLFny2XuJe2rw8lq/Ef5zoCCfTuBbLEOraalvASt7vlJh3eqpu+jB2jI+LoPB7PRc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616989213; h=Content-Type:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To; bh=VIh7DZqZ0MMaK5weWtXiKvJ8ur0IehdBIO8UBaAyFQY=; b=XXoBus6gidta5RVlse01StdHQn9WLXJMVDJ/vRBrodu7xzgGdD0z2eGIQTU3QkzT19qMAvJSXU3YMptR19Yfhaotv3a8g0YXT7zAfQndKG6Rq+ezbwiyhKqqO/Wx6AgcktKcs7zNyn8vab0mcF3eBlKIkCuqliwmNkBZ74UUh+4= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1616989213800501.2748564386304; Sun, 28 Mar 2021 20:40:13 -0700 (PDT) Received: from localhost ([::1]:50830 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lQilA-0008G2-RD for importer@patchew.org; Sun, 28 Mar 2021 23:40:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQikY-0007mE-0L; Sun, 28 Mar 2021 23:39:34 -0400 Received: from atcsqr.andestech.com ([60.248.187.195]:27560) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQikU-0008Ci-SD; Sun, 28 Mar 2021 23:39:33 -0400 Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id 12T3cmKF067949; Mon, 29 Mar 2021 11:38:48 +0800 (GMT-8) (envelope-from dylan@andestech.com) Received: from atcfdc88.andestech.com (10.0.15.120) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Mon, 29 Mar 2021 11:38:46 +0800 From: Dylan Jhong To: , , , , , Subject: [PATCH V4] target/riscv: Align the data type of reset vector address Date: Mon, 29 Mar 2021 11:38:44 +0800 Message-ID: <20210329033844.11878-1-dylan@andestech.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.0.15.120] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 12T3cmKF067949 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=60.248.187.195; envelope-from=dylan@andestech.com; helo=ATCSQR.andestech.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alankao@andestech.com, Dylan Jhong , x5710999x@gmail.com, ruinland@andestech.com, bmeng.cn@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use target_ulong to instead of uint64_t on reset vector address to adapt on both 32/64 machine. Signed-off-by: Dylan Jhong Signed-off-by: Ruinland ChuanTzu Tsai --- target/riscv/cpu.c | 5 +++-- target/riscv/cpu.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7d6ed80f6b..268945d8a9 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -137,7 +137,7 @@ static void set_feature(CPURISCVState *env, int feature) env->features |=3D (1ULL << feature); } =20 -static void set_resetvec(CPURISCVState *env, int resetvec) +static void set_resetvec(CPURISCVState *env, target_ulong resetvec) { #ifndef CONFIG_USER_ONLY env->resetvec =3D resetvec; @@ -554,7 +554,8 @@ static Property riscv_cpu_properties[] =3D { DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), - DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC), + DEFINE_PROP_UNSIGNED("resetvec", RISCVCPU, cfg.resetvec, + DEFAULT_RSTVEC, qdev_prop_uint64, target_ulong), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0a33d387ba..d9d7891666 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -303,7 +303,7 @@ struct RISCVCPU { uint16_t elen; bool mmu; bool pmp; - uint64_t resetvec; + target_ulong resetvec; } cfg; }; =20 --=20 2.17.1