From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) client-ip=209.85.128.48; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f48.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718458; cv=none; d=zohomail.com; s=zohoarc; b=Lwb77xCn1kMk7+LKtcJZf0tkZgZydAnPRES7b2j47Efrp1CKffuxe6DY7AIeCRMsNigXn1Mr1TvwtrYJPMhq3lV/jFF53Rdbhy+I8jlFdL+NahbQHy+pmH1npm0bzrXThxRJNYrUgojr4A12y7B8Xc4FPoGZzgEkdi0RzZx8ErY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718458; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=saTn6NarVlEELQgHGdwR/wrWO06QjsMUeOIlGAoNQ9M=; b=ShjhDcVDxzOmSxtCbtcJ8RdhbO7u+XO8O1xCkU1zICxVR2GcaWGK+6U4Iq9h3GCAuy9yD4DaOF0/EuqhhhLxl4Ggmwwa3uMxii7+Z0NeOlLzsMUcPVZZgCVbyI8Tma1KnvyCbSl1uTQh08azTk/mcxmpc1YeiLsnW5z+incZCiE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) by mx.zohomail.com with SMTPS id 1616718458582746.3276208448418; Thu, 25 Mar 2021 17:27:38 -0700 (PDT) Received: by mail-wm1-f48.google.com with SMTP id f22-20020a7bc8d60000b029010c024a1407so4034451wml.2 for ; Thu, 25 Mar 2021 17:27:37 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id q207sm8402159wme.36.2021.03.25.17.27.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:27:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=saTn6NarVlEELQgHGdwR/wrWO06QjsMUeOIlGAoNQ9M=; b=hqQ6yMllaA4CLNt9rLG19D+p6ABbiimsAVYZ6gof5/26P4m3A+TrjSLrjhb8E5CpaD k1bjspKsRk4KD+NAw6s2oR1SS849pXkypeM6PRHYeNai8tvs4RdA6nbYVHx3FnhoaWka TnEktTPPI2LDuHuK2WPh+fta7zi84IFZ42Sf7JDhDKXLZxYiDc8BdIEVuqNKBQVcCYwJ 2/IIB6cji/VJHYEabwdj6KE6oZVEEhJ473jpjNzIs5k1/UOxrXyZUXEjd0SYCv1bBGnG OPmAN+++431XhIx16jo99xp2O/rVdQiDHxgsXObnKA9Y4iMar5rXbBoOqRKG9MCPgAPm w3vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=saTn6NarVlEELQgHGdwR/wrWO06QjsMUeOIlGAoNQ9M=; b=at+iF8g+U60VW0tDCLk9bC5Nu2k2ijQdIuSV4rjdKfQTgp+7qogCt0Tv6YXeK4rgiR /lBtjr6Bz7KNTMFlD1z0grscSBs/dIujIWIkyT1fYGDP/74Kt6l0SnLap34IvTKVuz78 QSqhnrTTBHpw00jtoYkByF8aWgWUNWtqs5SjK8JBnkC8hPkBzXEGHHSvTY+jiBnDaR8z STQ0AqwomX3hoepTox64XgCKF8XCOCXgrIIUU6QiUo0J42MW2xblrEFcuuJ3XnBJiJJ+ oHM74/dSdhMwS2sP1obgBD3+ri/+nGitOP6ciGZKs3pV9Ip/NKT60KUNkssonmo73LuO cNLg== X-Gm-Message-State: AOAM533YywQ9M7zLI+6pEW6hEIeIAALj5rb1+Dsux9pCKDuqxysQf1ff biwtoKZ3yEKi87OSTflfWTk= X-Google-Smtp-Source: ABdhPJxdvBd4hUR6euoVap15xJPgJm/JSU6i+IUtGx9IiifYu3ssymwlxnQzlB8aMbmzOqublIVEng== X-Received: by 2002:a1c:bc82:: with SMTP id m124mr10383440wmf.118.1616718456724; Thu, 25 Mar 2021 17:27:36 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson Subject: [RFC PATCH-for-6.1 01/10] hw/misc: Add device to help managing aliased memory regions Date: Fri, 26 Mar 2021 01:27:19 +0100 Message-Id: <20210326002728.1069834-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) // TODO explain here how buses work? when some address lines are // not bound we get memory aliasing, high addresses are masked. // etc... Add a helper to manage this use case easily. For example a having @span_size =3D @region_size / 4 we get such mapping: ^-----------^ | | | | | +-------+ | +---------+ <--+ | | +---------+ | | | | | | | | +-----------> | alias#3 | | | | | | | | | | | +---------+ | | | | +---------+ | | | | | | | | | | +-------> | alias#2 | | | | | | | | |region | container | | | +---------+ | size | | | | +---------+ | | | | | | | | | | | | +----> | alias#1 | | | | | | | | | | | | | | | +---------+ <--+ | | | +-+---+--+--+ +---------+ | | | | | | | | |span | | | | subregion +-> | alias#0 | |size | offset | | | | | | | | +----> | +-------+ | +-----------+ +---------+ <--+ <--+ | | | | | | | | | | | | | | | | ^-----------^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/misc/aliased_region.h | 87 ++++++++++++++++++++ hw/misc/aliased_region.c | 133 +++++++++++++++++++++++++++++++ MAINTAINERS | 6 ++ hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + 5 files changed, 230 insertions(+) create mode 100644 include/hw/misc/aliased_region.h create mode 100644 hw/misc/aliased_region.c diff --git a/include/hw/misc/aliased_region.h b/include/hw/misc/aliased_reg= ion.h new file mode 100644 index 00000000000..0ce0d5d1cef --- /dev/null +++ b/include/hw/misc/aliased_region.h @@ -0,0 +1,87 @@ +/* + * Aliased memory regions + * + * Copyright (c) 2018 Philippe Mathieu-Daud=C3=A9 + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_MISC_ALIASED_REGION_H +#define HW_MISC_ALIASED_REGION_H + +#include "exec/memory.h" +#include "hw/sysbus.h" + +#define TYPE_ALIASED_REGION "aliased-memory-region" +OBJECT_DECLARE_SIMPLE_TYPE(AliasedRegionState, ALIASED_REGION) + +struct AliasedRegionState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion container; + uint64_t region_size; + uint64_t span_size; + MemoryRegion *mr; + + struct { + size_t count; + MemoryRegion *alias; + } mem; +}; + +/** + * memory_region_add_subregion_aliased: + * @container: the #MemoryRegion to contain the aliased subregions. + * @offset: the offset relative to @container where the aliased subregion + * are added. + * @region_size: size of the region containing the aliased subregions. + * @subregion: the subregion to be aliased. + * @span_size: size between each aliased subregion + * + * This utility function creates and maps an instance of aliased-memory-re= gion, + * which is a dummy device of a single region which simply contains multip= le + * aliases of the provided @subregion, spanned over the @region_size every + * @span_size. The device is mapped at @offset within @container. + * + * For example a having @span_size =3D @region_size / 4 we get such mappin= g: + * + * +-----------+ + * | | + * | | + * | +-------+ | +---------+ <--+ + * | | +---------+ | + * | | | | | + * | | +-----------> | alias#3 | | + * | | | | | | + * | | | +---------+ | + * | | | +---------+ | + * | | | | | | + * | | | +-------> | alias#2 | | + * | | | | | | |re= gion + * | container | | | +---------+ | s= ize + * | | | | +---------+ | + * | | | | | | | + * | | | | +----> | alias#1 | | + * | | | | | | | | + * | | | | | +---------+ <--+ | + * | | +-+---+--+--+ +---------+ | | + * | | | | | | |span | + * | | | subregion +-> | alias#0 | |size | + * offset | | | | | | | | + * +----> | +-------+ | +-----------+ +---------+ <--+ <--+ + * | | | + * | | | + * | | | + * | | | + * | | | + * + +-----------+ + */ +void memory_region_add_subregion_aliased(MemoryRegion *container, + hwaddr offset, + uint64_t region_size, + MemoryRegion *subregion, + uint64_t span_size); + +#endif diff --git a/hw/misc/aliased_region.c b/hw/misc/aliased_region.c new file mode 100644 index 00000000000..8fcc63f2648 --- /dev/null +++ b/hw/misc/aliased_region.c @@ -0,0 +1,133 @@ +/* + * Aliased memory regions + * + * Copyright (c) 2018 Philippe Mathieu-Daud=C3=A9 + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/cutils.h" +#include "qapi/error.h" +#include "hw/hw.h" +#include "hw/sysbus.h" +#include "hw/misc/aliased_region.h" +#include "hw/qdev-properties.h" + +static void aliased_mem_realize(AliasedRegionState *s, const char *mr_name) +{ + uint64_t subregion_size; + int subregion_bits; + + memory_region_init(&s->container, OBJECT(s), mr_name, s->region_size); + + subregion_bits =3D 64 - clz64(s->span_size - 1); + s->mem.count =3D s->region_size >> subregion_bits; + assert(s->mem.count > 1); + subregion_size =3D 1ULL << subregion_bits; + + s->mem.alias =3D g_new(MemoryRegion, s->mem.count); + for (size_t i =3D 0; i < s->mem.count; i++) { + g_autofree char *name =3D g_strdup_printf("%s [#%zu/%zu]", + memory_region_name(s->mr), + i, s->mem.count); + memory_region_init_alias(&s->mem.alias[i], OBJECT(s), name, + s->mr, 0, s->span_size); + memory_region_add_subregion(&s->container, i * subregion_size, + &s->mem.alias[i]); + } +} + +static void aliased_mr_realize(DeviceState *dev, Error **errp) +{ + AliasedRegionState *s =3D ALIASED_REGION(dev); + g_autofree char *name =3D NULL, *span =3D NULL; + + if (s->region_size =3D=3D 0) { + error_setg(errp, "property 'region-size' not specified or zero"); + return; + } + + if (s->mr =3D=3D NULL) { + error_setg(errp, "property 'iomem' not specified"); + return; + } + + if (!s->span_size) { + s->span_size =3D pow2ceil(memory_region_size(s->mr)); + } else if (!is_power_of_2(s->span_size)) { + error_setg(errp, "property 'span-size' must be a power of 2"); + return; + } + + span =3D size_to_str(s->span_size); + name =3D g_strdup_printf("masked %s [span of %s]", + memory_region_name(s->mr), span); + aliased_mem_realize(s, name); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container); +} + +static void aliased_mr_unrealize(DeviceState *dev) +{ + AliasedRegionState *s =3D ALIASED_REGION(dev); + + g_free(s->mem.alias); +} + +static Property aliased_mr_properties[] =3D { + DEFINE_PROP_UINT64("region-size", AliasedRegionState, region_size, 0), + DEFINE_PROP_UINT64("span-size", AliasedRegionState, span_size, 0), + DEFINE_PROP_LINK("iomem", AliasedRegionState, mr, + TYPE_MEMORY_REGION, MemoryRegion *), + DEFINE_PROP_END_OF_LIST(), +}; + +static void aliased_mr_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D aliased_mr_realize; + dc->unrealize =3D aliased_mr_unrealize; + /* Reason: needs to be wired up to work */ + dc->user_creatable =3D false; + device_class_set_props(dc, aliased_mr_properties); +} + +static const TypeInfo aliased_mr_info =3D { + .name =3D TYPE_ALIASED_REGION, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(AliasedRegionState), + .class_init =3D aliased_mr_class_init, +}; + +static void aliased_mr_register_types(void) +{ + type_register_static(&aliased_mr_info); +} + +type_init(aliased_mr_register_types) + +void memory_region_add_subregion_aliased(MemoryRegion *container, + hwaddr offset, + uint64_t region_size, + MemoryRegion *subregion, + uint64_t span_size) +{ + DeviceState *dev; + + if (!region_size) { + region_size =3D pow2ceil(memory_region_size(container)); + } else { + assert(region_size <=3D memory_region_size(container)); + } + + dev =3D qdev_new(TYPE_ALIASED_REGION); + qdev_prop_set_uint64(dev, "region-size", region_size); + qdev_prop_set_uint64(dev, "span-size", span_size); + object_property_set_link(OBJECT(dev), "iomem", OBJECT(subregion), + &error_abort); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_abort); + + memory_region_add_subregion(container, offset, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev)= , 0)); +} diff --git a/MAINTAINERS b/MAINTAINERS index 554be84b321..f82ffd50a91 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2097,6 +2097,12 @@ S: Maintained F: include/hw/misc/empty_slot.h F: hw/misc/empty_slot.c =20 +Aliased memory region +M: Philippe Mathieu-Daud=C3=A9 +S: Maintained +F: include/hw/misc/aliased_region.h +F: hw/misc/aliased_region.c + Standard VGA M: Gerd Hoffmann S: Maintained diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index c71ed258204..ca51b99989e 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -151,6 +151,9 @@ config AUX config UNIMP bool =20 +config ALIASED_REGION + bool + config LED bool =20 diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 21034dc60a8..e65541b835f 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -12,6 +12,7 @@ softmmu_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c')) softmmu_ss.add(when: 'CONFIG_UNIMP', if_true: files('unimp.c')) softmmu_ss.add(when: 'CONFIG_EMPTY_SLOT', if_true: files('empty_slot.c')) +softmmu_ss.add(when: 'CONFIG_ALIASED_REGION', if_true: files('aliased_regi= on.c')) softmmu_ss.add(when: 'CONFIG_LED', if_true: files('led.c')) softmmu_ss.add(when: 'CONFIG_PVPANIC_COMMON', if_true: files('pvpanic.c')) =20 --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.51 as permitted sender) client-ip=209.85.128.51; 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[88.21.201.17]) by smtp.gmail.com with ESMTPSA id u4sm9609242wrm.24.2021.03.25.17.27.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:27:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O7W6IEOHSoDvRbI0khuBdpTH+Nl9d9QUqt9PPpv29LE=; b=N19NSLmflIp+mhy8BaAwL7u8+ZVW61/N8eKBushPRrKAg1g3QAmzjyi/kOXs/5dnYB oBMdcn2/pnbIqQqFH9Pce8Poyjhc4UA+LCYcwW71/Sf75blOnxcWu6YVt+sp+ZYxKOM6 N9zdAQfsqAsTY9AMMSBGPvxVzeeeKwRfxc96wfPhaFRzptGWN15ITC9D08+JKPNQcMpI OgJdq7Q6V+Dw9JdEvr46z1eQ1iBwg5k83PbshUDu3ml6zobNMV/vHwUii5oCKiIMdgsq WdTJ5P9FOb9EP0CizDOMncFP1RACO1BtMmWdQ84p09RAF/h23JSSZqv0PfjuUuLVfWgB xElA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=O7W6IEOHSoDvRbI0khuBdpTH+Nl9d9QUqt9PPpv29LE=; b=sep0XV47Bbdwsz9IpaeptdyyycWM6puiWA7rFXctEHDzkujCJ2DE+NFtQiWcf2aK2U IJG+F2+fKezCG+uohDb5pJm2wjVqDITQ9V6/Vv4k4Y9G1qGb0rKAeFy1xQPNKgGoSfql EIApiX7dT+onyLxA0pJSZyKSrb/T45xeDJ2BZQqTqbUh5XrOyZblBR+LHHnWMjsvA7QW b12Jc/LvdDVvRce+UlWg2bieoms2q/G1vACiyWJ2VHS9F5CF6gcZu0wZeNewv9fHVb8F 5xm6RvwHjTAnVC10VsBr7JfxsEZadnUmgikoyTYiLkhlhJlx7Aypq2LUTA9cuSTAp+30 3ZNw== X-Gm-Message-State: AOAM533c5MVFeRxkbhJDgoU787ySehRjb3w7Xu060nXKjhJulw8ILqHw Rtk5joygZA4MEzt1plBiSPU= X-Google-Smtp-Source: ABdhPJws53IjRyn7osS54kW9BohBvUfqx6cHPjq6vzHHzPx4wiEBlIv6thwVRPTw9U+Dhz/5c3TwMQ== X-Received: by 2002:a7b:c385:: with SMTP id s5mr9896183wmj.17.1616718461645; Thu, 25 Mar 2021 17:27:41 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , Jan Kiszka Subject: [PATCH-for-6.1 02/10] hw/arm/musicpal: Open-code pflash_cfi02_register() call Date: Fri, 26 Mar 2021 01:27:20 +0100 Message-Id: <20210326002728.1069834-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) To be able to manually map the flash region on the main memory (in the next commit), first expand the pflash_cfi02_register in place. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/musicpal.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 9cebece2de0..8b58b66f263 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -10,6 +10,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "cpu.h" #include "hw/sysbus.h" @@ -1640,6 +1641,7 @@ static void musicpal_init(MachineState *machine) /* Register flash */ dinfo =3D drive_get(IF_PFLASH, 0, 0); if (dinfo) { + static const size_t sector_size =3D 64 * KiB; BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); =20 flash_size =3D blk_getlength(blk); @@ -1649,17 +1651,30 @@ static void musicpal_init(MachineState *machine) exit(1); } =20 + dev =3D qdev_new(TYPE_PFLASH_CFI02); + qdev_prop_set_drive(dev, "drive", blk); + qdev_prop_set_uint32(dev, "num-blocks", flash_size / sector_size); + qdev_prop_set_uint32(dev, "sector-length", sector_size); + qdev_prop_set_uint8(dev, "width", 2); /* 16-bit */ + qdev_prop_set_uint8(dev, "mappings", MP_FLASH_SIZE_MAX / flash_siz= e); + qdev_prop_set_uint8(dev, "big-endian", 0); + qdev_prop_set_uint16(dev, "id0", 0x00bf); + qdev_prop_set_uint16(dev, "id1", 0x236d); + qdev_prop_set_uint16(dev, "id2", 0x0000); + qdev_prop_set_uint16(dev, "id3", 0x0000); + qdev_prop_set_uint16(dev, "unlock-addr0", 0x5555); + qdev_prop_set_uint16(dev, "unlock-addr1", 0x2aaa); + qdev_prop_set_string(dev, "name", "musicpal.flash"); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, + 0x100000000ULL - MP_FLASH_SIZE_MAX); + /* * The original U-Boot accesses the flash at 0xFE000000 instead of * 0xFF800000 (if there is 8 MB flash). So remap flash access if t= he * image is smaller than 32 MB. */ - pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, - "musicpal.flash", flash_size, - blk, 0x10000, - MP_FLASH_SIZE_MAX / flash_size, - 2, 0x00BF, 0x236D, 0x0000, 0x0000, - 0x5555, 0x2AAA, 0); } sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); =20 --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) client-ip=209.85.128.48; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f48.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718468; cv=none; d=zohomail.com; s=zohoarc; b=KB6rUdQ1LZ9sUJgU9SD/FtpFBC+7x1PX8yrzI0oPlOf4bZsZUNd3cP/J6T4OajthGy4SrfAzU/8z6LYgi/8YYvw9+1F7SM42tUvstMxFFYnJ16WzFS9jUXQ60G0KzG8j8jxtvvfSZCPSNNX85RtAJPWMcgUWskmSRhAr28wMGew= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718468; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=IYakNFxQV1ex75l66dPkqyEqS369liYXkwtkj/H9Uas=; b=euMbbdI4nPtUguoeeWbSHnBpiFLE68qatNO08rthsF1bOKO/PNzTMuMNtUZ/wzny3yPNumAqFclMMaxQVL/Js5B0oA378dXEuPNuAt7dXtHf2wGiLXtt951eDc6J68FSGNMENOGkGcI9UB1IVeyK5/u9YDylukhhcifm4/BBCF0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.48 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) by mx.zohomail.com with SMTPS id 1616718468309849.7520249683179; Thu, 25 Mar 2021 17:27:48 -0700 (PDT) Received: by mail-wm1-f48.google.com with SMTP id g20so2103540wmk.3 for ; Thu, 25 Mar 2021 17:27:47 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id r11sm9513265wrm.26.2021.03.25.17.27.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:27:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IYakNFxQV1ex75l66dPkqyEqS369liYXkwtkj/H9Uas=; b=KPgrCjl7IEfoYlrAJFCDMudAfThi+8A7nYifuZpdkqHNNj2tu1GBZmdoCJK30+iz26 TatGmkhGh6fSBj5zwzxTTyolSrNFlCbQ96wcMdfeUMtkMsTenHnwj3oy+h00COc2gF5V pGejtLKe4WsO4r6LyNfE12k3Mo2uDfsf1hp2AQbjvwCaI5+mRgZHjdqJNLULqzDCc2zf DJYFn1Yirj9flWyfBZXdNqAK9uxsTOOomjsfWbgBNZ82KJIf4ctMY4tL1l7tInTb6sLA AyeCPrEVk3+ijjvP378521okK5qsgls19edZgOtTODDF6cdFMcgHYhlf6YceabPA/ETD nkjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=IYakNFxQV1ex75l66dPkqyEqS369liYXkwtkj/H9Uas=; b=ToOnZeHZ3gSaC5nu8LwLiY+S+D1U2dDV0XssC7oYyxP7ojUnZm3iI3J6tMnOBiOVKr IpZm94EGUzgJfj/drbNHi5O3sX3B71pm8fIrMcnx3CghXXAcgUczgyXOB8hf23qxOszC bJNuFEaqWZdXKFjUm5Qwz6GTMd8Md7YAt8KbP7v+AnPOx/sOda8aK2PEROnHS5hDXbW8 GCdW3KCN4K6+MiEBCVpgw3KvjIxePIg7maNz3sVGuGgTnsFl5O88QmvNB9ekD5mWWPxG gZd2T8YDbIf70ZjxklSZZ2KJjcCcUCOLFvpBCMUAHEa+YBAAGj4QAV3olnsmFE4eC4Vw 5JMQ== X-Gm-Message-State: AOAM530Sb4lDXnK3HfgNRbgMnyBSYadKxm28LGuM39cVkRFrtlBeduBL sKnxycUcPvWScNMhnv1S+ps= X-Google-Smtp-Source: ABdhPJxe/rYYqQpo4DJebS5dMcnZn6DD4xd4y8iiQPhT0TcaIdyPxFYKOKupjgPTUjqg3bP3SutnPQ== X-Received: by 2002:a05:600c:210a:: with SMTP id u10mr10497666wml.147.1616718466644; Thu, 25 Mar 2021 17:27:46 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , Jan Kiszka Subject: [RFC PATCH-for-6.1 03/10] hw/arm/musicpal: Map flash using memory_region_add_subregion_aliased() Date: Fri, 26 Mar 2021 01:27:21 +0100 Message-Id: <20210326002728.1069834-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Instead of using a device specific feature for mapping the flash memory multiple times over a wider region, use the generic memory_region_add_subregion_aliased() helper. There is no change in the memory layout. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/musicpal.c | 11 +++++++---- hw/arm/Kconfig | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 8b58b66f263..7d1f2f3fb3f 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -30,6 +30,7 @@ #include "hw/irq.h" #include "hw/or-irq.h" #include "hw/audio/wm8750.h" +#include "hw/misc/aliased_region.h" #include "sysemu/block-backend.h" #include "sysemu/runstate.h" #include "sysemu/dma.h" @@ -1656,7 +1657,7 @@ static void musicpal_init(MachineState *machine) qdev_prop_set_uint32(dev, "num-blocks", flash_size / sector_size); qdev_prop_set_uint32(dev, "sector-length", sector_size); qdev_prop_set_uint8(dev, "width", 2); /* 16-bit */ - qdev_prop_set_uint8(dev, "mappings", MP_FLASH_SIZE_MAX / flash_siz= e); + qdev_prop_set_uint8(dev, "mappings", 0); qdev_prop_set_uint8(dev, "big-endian", 0); qdev_prop_set_uint16(dev, "id0", 0x00bf); qdev_prop_set_uint16(dev, "id1", 0x236d); @@ -1667,14 +1668,16 @@ static void musicpal_init(MachineState *machine) qdev_prop_set_string(dev, "name", "musicpal.flash"); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, - 0x100000000ULL - MP_FLASH_SIZE_MAX); - /* * The original U-Boot accesses the flash at 0xFE000000 instead of * 0xFF800000 (if there is 8 MB flash). So remap flash access if t= he * image is smaller than 32 MB. */ + memory_region_add_subregion_aliased(get_system_memory(), + 0x100000000ULL - MP_FLASH_SIZE_MAX, + MP_FLASH_SIZE_MAX, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev)= , 0), + flash_size); } sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); =20 diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 8c37cf00da7..aa8553b3cd3 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -101,6 +101,7 @@ config MUSICPAL select MARVELL_88W8618 select PTIMER select PFLASH_CFI02 + select ALIASED_REGION select SERIAL select WM8750 =20 --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.54 as permitted sender) client-ip=209.85.221.54; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f54.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.54 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail(p=none dis=none) header.from=amsat.org ARC-Seal: i=1; a=rsa-sha256; t=1616718473; cv=none; d=zohomail.com; s=zohoarc; b=G/GXen+N/AZ4P/21pji3zs4zES/tGdR2C+puL0mHM4zOg7J/izuzHms60Wpx7voTyyhNSEgUcCW34IItLEX7Kq8W7HuTAogqOECAIx4jNhd9FRZEXbi/6zOrWjDaTWCvXjaVYVgE01yZrTUm367RrWgOkMdk4H0wgJP+AXgeZNY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718473; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=FPkR6E5eYDSt/dTQyU/+Z12pNzndsaiabWlUEgFNTyo=; b=UTmuddnscv6tOgbvOd7QmCoVCy+AGhLR9QZvQ6s0ei0OhkFHEJH1KOvDJjmsvD/LNqHI8IS8kO8oDDIal7lsndSxuC6Vq5PHcd9pApMKbVz7EBbSlCxgxndiPB3ge5Qjl1L7dmtHQLPrAqccKmg3IjfIRsR9obu8TN7zKIqdxoc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.54 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) by mx.zohomail.com with SMTPS id 1616718473253361.2913897690406; Thu, 25 Mar 2021 17:27:53 -0700 (PDT) Received: by mail-wr1-f54.google.com with SMTP id x7so3993199wrw.10 for ; Thu, 25 Mar 2021 17:27:52 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id c6sm9121200wri.32.2021.03.25.17.27.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:27:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FPkR6E5eYDSt/dTQyU/+Z12pNzndsaiabWlUEgFNTyo=; b=XG7b71J6Lu5jA5w+dCTkl2zhZguh7iKxEIeIOn3DUL4n1zI86Hn6x2aAc8exNt5jjd hGQn2/jPbN8OZbFpiPv0iOQhrBz2dqhJUUimQmfzjB9LU9eXlNGA/QhsjVd0LUTrt2e1 7AbJOBBY/IZrPtP8Za+jx3TOpM5ot51mYIcHM5NdOSTFqjCQHHlA1l1YGC9TIAvTJK7p 2ihJwDotxJmvGOaLeSCOMVveWpCIdBtkgrQZxV/ehos/Co/7pOdHRvEgTyS/tzBJZlis UnHD6YcKXbNmHItqMc22/ZavWI1CzjtgRR5XY1RGY4iE/Ifu3cCrR553QXCTnvn97hi3 QePQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=FPkR6E5eYDSt/dTQyU/+Z12pNzndsaiabWlUEgFNTyo=; b=pruMCZsD4IWr5LafBSy60jzqHIsFYQdARHMmYQIMSNoS120wNXs1czAjmyTbHKmNdW 37gFrbIz7jlY4OiCZ5jcDEwItDrcmFdprFoYGY5nmoJ4lPE+oUfMXKxZzN9CMdpLWULD jiKJhocAvCidxcXl9K3kfFT056seMn6dts3ec+QwlGY2R7q8Y+LYkNZWxU8bjSihWLNJ 3oHHUwnEiiHq9DckISjiFTmnBiftkcpORuee67uWFxbepFbZmtmYSVLe0Bn6LmpVj8BE OUVJe4TCLSfKC8NL+Na/Hixg16WnY8W1q42Kk2z71a8mcVw/+22TZSYQK5pXP0hnGuF8 wX/g== X-Gm-Message-State: AOAM5315tMiBUBxlhIFbHcUrcU9UT3sasArXLJD0GmIZpUeZ2PvjvHrn ULoAm0j5VdUkUpkCC4oEzf0= X-Google-Smtp-Source: ABdhPJxIKwzLEE+6NFuEVQ8AZI9y5ldUO4TQzECKUGzoXG7wdLQccHU3sj1+XaT543vfeG3X8xs45w== X-Received: by 2002:a5d:56d0:: with SMTP id m16mr11631592wrw.355.1616718471500; Thu, 25 Mar 2021 17:27:51 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , Antony Pavlov Subject: [PATCH-for-6.1 04/10] hw/arm/digic: Open-code pflash_cfi02_register() call Date: Fri, 26 Mar 2021 01:27:22 +0100 Message-Id: <20210326002728.1069834-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) To be able to manually map the flash region on the main memory (in the next commit), first expand the pflash_cfi02_register in place. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/digic_boards.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 6cdc1d83fca..fc4a671b2e1 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -31,6 +31,8 @@ #include "hw/boards.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" +#include "hw/qdev-properties.h" +#include "hw/misc/aliased_region.h" #include "hw/arm/digic.h" #include "hw/block/flash.h" #include "hw/loader.h" @@ -120,12 +122,25 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, = hwaddr addr, #define FLASH_K8P3215UQB_SIZE (4 * 1024 * 1024) #define FLASH_K8P3215UQB_SECTOR_SIZE (64 * 1024) =20 - pflash_cfi02_register(addr, "pflash", FLASH_K8P3215UQB_SIZE, - NULL, FLASH_K8P3215UQB_SECTOR_SIZE, - DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE, - 4, - 0x00EC, 0x007E, 0x0003, 0x0001, - 0x0555, 0x2aa, 0); + DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI02); + + qdev_prop_set_uint32(dev, "num-blocks", + FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_S= IZE); + qdev_prop_set_uint32(dev, "sector-length", FLASH_K8P3215UQB_SECTOR_SIZ= E); + qdev_prop_set_uint8(dev, "width", 4); /* 32-bit */ + qdev_prop_set_uint8(dev, "mappings", + DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE); + qdev_prop_set_uint8(dev, "big-endian", 0); + qdev_prop_set_uint16(dev, "id0", 0x00ec); + qdev_prop_set_uint16(dev, "id1", 0x007e); + qdev_prop_set_uint16(dev, "id2", 0x0003); + qdev_prop_set_uint16(dev, "id3", 0x0001); + qdev_prop_set_uint16(dev, "unlock-addr0", 0x0555); + qdev_prop_set_uint16(dev, "unlock-addr1", 0x2aa); + qdev_prop_set_string(dev, "name", "pflash"); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); =20 digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, filename); } --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.44 as permitted sender) client-ip=209.85.221.44; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f44.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.44 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718478; cv=none; d=zohomail.com; s=zohoarc; b=WaIyZkvpFF6lxh7S9U/kaA/QvDPzXdVBgqDtZAEeJauSUvLPoF96Z2QHULOGO+x/PDaJhZM+mniIFQ0HlL7NT3y+kzP0vSZUfUl5JHG1BZVpNDea624NLtr8KIhg7pxbs7Oh1V81L6wzR5lCt/REmVnd8LO6jMu2GKUzrsQgwUQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718478; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9vQI7A5hmQ3wSaUcxdAm+j6q3/KZqQAA4ivIYPpUB90=; b=FZp5OAJLLCX9FXZLCR7+3yH+CiO/99cMg5AGjJ1/xOCx4VFWB7ParIgRKRBImZ7UZqhmZ/BUTsQzODrh1duyqwvUQQGjzWA/OzwwXRNpwFD9PWhenm3K2m+iUtdqYXH/EWIJXRZEsFuWCFKWl/qj1FBaTAwxdZs3EJlUAWi/NPU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.44 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) by mx.zohomail.com with SMTPS id 1616718478303930.6635427337142; Thu, 25 Mar 2021 17:27:58 -0700 (PDT) Received: by mail-wr1-f44.google.com with SMTP id x16so4022417wrn.4 for ; Thu, 25 Mar 2021 17:27:57 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id e17sm9844458wra.65.2021.03.25.17.27.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:27:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9vQI7A5hmQ3wSaUcxdAm+j6q3/KZqQAA4ivIYPpUB90=; b=U/dcfFBgWaAIgcCwfoiGO/eDt8K/1jMiXa/RXYJzdS9NYIL8P80pZrT0JSRSj1+vO4 luO7ybcX4WdAiV4opZZdQyrVX3bmYyjws4dChRjp/v5rv9JsdGon6h2rz++HL0EeZebA cvJ1l5b1gRd0qAGbDMJuyMBvxrQHMYltJT9Vz4BRJdLquze3iSXCD40JTYb/QRgHISmO rwIZqvc80ctdAkq4E3ExL33eEeS552pISMqNBNG/mpSE28B1MlRhfgNqGI/4CtvfJdDa LHD4mMlALpniwsZWsoMHsGaVOoR5KJfUtwEqbtPlWRtiUU7o3X0rBk1x1cyjU1M8GdUY /Hcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9vQI7A5hmQ3wSaUcxdAm+j6q3/KZqQAA4ivIYPpUB90=; b=dsuinKigtQCOhcrALqavj54aIb5jZi6Yp28+U/rxAadYDTzv9of+jd0ZDtgvCA2uat 6HPzvwJnxfCCGpjeZNR/kXpDQYVPf2tbOU2udfE5iCO0KXp2Iqv5PAondkY9/c/Fg/M+ +t94hgkblaOy+hNxwDqjuVo+M27AnwyJcd34V3rLyPOgVTVWSi61zKaewgPrI4bk9Tdi iStRCR3wP8Sc6CaxtignqFhevWjqGSB80Hu01gvOgkXZnr2n2WwksugRbwAtg4+hOfW4 cMHGcT/yoMJa0PTrxz2NSclqHNIT2KB4kztR4Elr1tVkZImBYRjv+m695udcnbROTR3D A4Dg== X-Gm-Message-State: AOAM5308XipJjNVtAn4WUlSCnHJ3X3KnJZlE3RYyz3w6YefrRGOsSHHp saJ9nk5Hj9cEMOSxE0OI2J8= X-Google-Smtp-Source: ABdhPJzJyn8qA/gDC2LjpGKi6r8FHjnf2MA7vcXj4XM4GYzPYEWOP4ddLgBme7pftkweiiKL7l4CFw== X-Received: by 2002:a05:6000:1868:: with SMTP id d8mr11705878wri.301.1616718476546; Thu, 25 Mar 2021 17:27:56 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , Antony Pavlov Subject: [RFC PATCH-for-6.1 05/10] hw/arm/digic: Map flash using memory_region_add_subregion_aliased() Date: Fri, 26 Mar 2021 01:27:23 +0100 Message-Id: <20210326002728.1069834-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Instead of using a device specific feature for mapping the flash memory multiple times over a wider region, use the generic memory_region_add_subregion_aliased() helper. There is no change in the memory layout. * before: $ qemu-system-arm -M canon-a1100 -S -monitor stdio QEMU 5.2.90 monitor - type 'help' for more information (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000003ffffff (prio 0, ram): ram 00000000c0210000-00000000c02100ff (prio 0, i/o): digic-timer 00000000c0210100-00000000c02101ff (prio 0, i/o): digic-timer 00000000c0210200-00000000c02102ff (prio 0, i/o): digic-timer 00000000c0800000-00000000c0800017 (prio 0, i/o): digic-uart 00000000f8000000-00000000ffffffff (prio 0, i/o): pflash 00000000f8000000-00000000f83fffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff 00000000f8400000-00000000f87fffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff 00000000f8800000-00000000f8bfffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff ... 00000000ff400000-00000000ff7fffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff 00000000ff800000-00000000ffbfffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff 00000000ffc00000-00000000ffffffff (prio 0, romd): alias pflash-alia= s @pflash 0000000000000000-00000000003fffff * after: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000003ffffff (prio 0, ram): ram 00000000c0210000-00000000c02100ff (prio 0, i/o): digic-timer 00000000c0210100-00000000c02101ff (prio 0, i/o): digic-timer 00000000c0210200-00000000c02102ff (prio 0, i/o): digic-timer 00000000c0800000-00000000c0800017 (prio 0, i/o): digic-uart 00000000f8000000-00000000ffffffff (prio 0, i/o): masked pflash [span = of 4 MiB] 00000000f8000000-00000000f83fffff (prio 0, romd): alias pflash [#0/= 32] @pflash 0000000000000000-00000000003fffff 00000000f8400000-00000000f87fffff (prio 0, romd): alias pflash [#1/= 32] @pflash 0000000000000000-00000000003fffff 00000000f8800000-00000000f8bfffff (prio 0, romd): alias pflash [#2/= 32] @pflash 0000000000000000-00000000003fffff ... 00000000ff400000-00000000ff7fffff (prio 0, romd): alias pflash [#29= /32] @pflash 0000000000000000-00000000003fffff 00000000ff800000-00000000ffbfffff (prio 0, romd): alias pflash [#30= /32] @pflash 0000000000000000-00000000003fffff 00000000ffc00000-00000000ffffffff (prio 0, romd): alias pflash [#31= /32] @pflash 0000000000000000-00000000003fffff Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/digic_boards.c | 8 +++++--- hw/arm/Kconfig | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index fc4a671b2e1..293402b1240 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -128,8 +128,7 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, hw= addr addr, FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_S= IZE); qdev_prop_set_uint32(dev, "sector-length", FLASH_K8P3215UQB_SECTOR_SIZ= E); qdev_prop_set_uint8(dev, "width", 4); /* 32-bit */ - qdev_prop_set_uint8(dev, "mappings", - DIGIC4_ROM_MAX_SIZE / FLASH_K8P3215UQB_SIZE); + qdev_prop_set_uint8(dev, "mappings", 0); qdev_prop_set_uint8(dev, "big-endian", 0); qdev_prop_set_uint16(dev, "id0", 0x00ec); qdev_prop_set_uint16(dev, "id1", 0x007e); @@ -140,7 +139,10 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, h= waddr addr, qdev_prop_set_string(dev, "name", "pflash"); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); =20 - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + memory_region_add_subregion_aliased(get_system_memory(), + addr, DIGIC4_ROM_MAX_SIZE, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0), + FLASH_K8P3215UQB_SIZE); =20 digic_load_rom(s, addr, FLASH_K8P3215UQB_SIZE, filename); } diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index aa8553b3cd3..1a7b9724d6c 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -42,6 +42,7 @@ config DIGIC bool select PTIMER select PFLASH_CFI02 + select ALIASED_REGION =20 config EXYNOS4 bool --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.51 as permitted sender) client-ip=209.85.128.51; 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[88.21.201.17]) by smtp.gmail.com with ESMTPSA id a13sm9524931wrp.31.2021.03.25.17.28.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:28:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dJbcGY6sOvOVraPquf/gluBsf0D+iYUyhVli41P2iL8=; b=QavHjpPUU/2FTrNGn+BNIYCIvSckEOAjdO1WvSBeaip7H1mVUFLLisbh1i/Z0/73gP 3GfhCvlwYq1zpN5UtUW2Cvc8Bo4R+FbIVaconwCJZYTkfUJRkhFfXz41v60Aaopnh+0A wKpcAkarUjmjvn+uP4OExdtLGJ+iaaB0j69Qx3JnFFGP38SGGWZu22Wvqhp+msEnxOOz 4XT/3m/wChvdP3fYiML2p3JHQoOgie3VeqcSJOcA5gk9vHCvsfj+2qxFVj2jtVtDbX7g jd34gix/Q+at6nXkHgrV90bQ4ZCHjSRYEDG4lvk5HwD8VpRV+oVNc7MXKkaxje2ZNxka t8Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=dJbcGY6sOvOVraPquf/gluBsf0D+iYUyhVli41P2iL8=; b=EpEIZrdWTzU3x2WHbf9cuWhPSA7/TKQGCBzhyyPmJ6aBc8jEW00WNaiewvdXV6jB4T ee6Q9zaz4WvM6xBacoFsQ+FFrFpItxlmaa1muzPMH87LVVloi6/IK3Bv6MH7+FAGe3c7 Sa0M38vY4wENACB2RJgOQEYs0hqOML0UbaZJwD9DYVryUjX7my3JTyijxAU/JOMGkFMH /MOkqbh1kz3x/RRpWtdhDSFB05q6wiiKW4HlNtjzESI1f9gzAhdZ8TvWFrckzrmslYOH 6BZZ8Lr/mOqTUEETFq0z0Q6+mhpdkmwpL+uGK54tk8/IDFK6+xRLx0UbAFcLkLfmDE/7 msew== X-Gm-Message-State: AOAM531CeXbXVPgF5609V9OHgiDrb3iUy9nSiJMHRWwxmLOpoNrGFeLQ 5hZF9qlWxxLKGX50WXm0bCs= X-Google-Smtp-Source: ABdhPJzAxyJzBhSmyfeQ71RrGp7Fb6STCrZIx7mGw3rdXekioUzmFk44J8ZOW7GI0HCYiSPxwUd1NQ== X-Received: by 2002:a1c:e341:: with SMTP id a62mr10654555wmh.152.1616718481720; Thu, 25 Mar 2021 17:28:01 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Kevin Wolf , Max Reitz , qemu-block@nongnu.org (open list:Block layer core) Subject: [PATCH-for-6.1 06/10] hw/block/pflash_cfi02: Remove pflash_setup_mappings() Date: Fri, 26 Mar 2021 01:27:24 +0100 Message-Id: <20210326002728.1069834-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) All boards calling pflash_cfi02_register() use nb_mappings=3D1, which does not do any mapping: $ git grep -wl pflash_cfi02_register hw/ hw/arm/xilinx_zynq.c hw/block/pflash_cfi02.c hw/lm32/lm32_boards.c hw/ppc/ppc405_boards.c hw/sh4/r2d.c We can remove this now unneeded code. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Gibson --- hw/block/pflash_cfi02.c | 35 ++--------------------------------- 1 file changed, 2 insertions(+), 33 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 02c514fb6e0..6f4b3e3c3fe 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -75,7 +75,6 @@ struct PFlashCFI02 { uint32_t nb_blocs[PFLASH_MAX_ERASE_REGIONS]; uint32_t sector_len[PFLASH_MAX_ERASE_REGIONS]; uint32_t chip_len; - uint8_t mappings; uint8_t width; uint8_t be; int wcycle; /* if 0, the flash is read normally */ @@ -92,13 +91,6 @@ struct PFlashCFI02 { uint16_t unlock_addr1; uint8_t cfi_table[0x4d]; QEMUTimer timer; - /* - * The device replicates the flash memory across its memory space. Em= ulate - * that by having a container (.mem) filled with an array of aliases - * (.mem_mappings) pointing to the flash memory (.orig_mem). - */ - MemoryRegion mem; - MemoryRegion *mem_mappings; /* array; one per mapping */ MemoryRegion orig_mem; bool rom_mode; int read_counter; /* used for lazy switch-back to rom mode */ @@ -158,23 +150,6 @@ static inline void toggle_dq2(PFlashCFI02 *pfl) pfl->status ^=3D 0x04; } =20 -/* - * Set up replicated mappings of the same region. - */ -static void pflash_setup_mappings(PFlashCFI02 *pfl) -{ - unsigned i; - hwaddr size =3D memory_region_size(&pfl->orig_mem); - - memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * s= ize); - pfl->mem_mappings =3D g_new(MemoryRegion, pfl->mappings); - for (i =3D 0; i < pfl->mappings; ++i) { - memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl), - "pflash-alias", &pfl->orig_mem, 0, size); - memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mapping= s[i]); - } -} - static void pflash_reset_state_machine(PFlashCFI02 *pfl) { trace_pflash_reset(pfl->name); @@ -917,12 +892,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Err= or **errp) pfl->sector_erase_map =3D bitmap_new(pfl->total_sectors); =20 pfl->rom_mode =3D true; - if (pfl->mappings > 1) { - pflash_setup_mappings(pfl); - sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); - } else { - sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->orig_mem); - } + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->orig_mem); =20 timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->status =3D 0; @@ -950,7 +920,6 @@ static Property pflash_cfi02_properties[] =3D { DEFINE_PROP_UINT32("num-blocks3", PFlashCFI02, nb_blocs[3], 0), DEFINE_PROP_UINT32("sector-length3", PFlashCFI02, sector_len[3], 0), DEFINE_PROP_UINT8("width", PFlashCFI02, width, 0), - DEFINE_PROP_UINT8("mappings", PFlashCFI02, mappings, 0), DEFINE_PROP_UINT8("big-endian", PFlashCFI02, be, 0), DEFINE_PROP_UINT16("id0", PFlashCFI02, ident0, 0), DEFINE_PROP_UINT16("id1", PFlashCFI02, ident1, 0), @@ -1008,6 +977,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, { DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI02); =20 + assert(nb_mappings <=3D 1); if (blk) { qdev_prop_set_drive(dev, "drive", blk); } @@ -1015,7 +985,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, qdev_prop_set_uint32(dev, "num-blocks", size / sector_len); qdev_prop_set_uint32(dev, "sector-length", sector_len); qdev_prop_set_uint8(dev, "width", width); - qdev_prop_set_uint8(dev, "mappings", nb_mappings); qdev_prop_set_uint8(dev, "big-endian", !!be); qdev_prop_set_uint16(dev, "id0", id0); qdev_prop_set_uint16(dev, "id1", id1); --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.52 as permitted sender) client-ip=209.85.221.52; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f52.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.52 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718488; cv=none; d=zohomail.com; s=zohoarc; b=MDuqRhTxx6xE+HeqGUydSmsYau9VlbYZXTk9omzRXGWekX6B0Oa4xu9JWr2KUfsPMuq+4PMGxwqDuDxA+8191LLbfoyE4Zm+esdzzNiE4MMOpek5BGuLkD6MdWiegBlGZdRk+56iCsrcV1a1+Sy3nMEaIK7xDR7p6G3XyjEyJak= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718488; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=nDWnefwEc2MavpEPfUetVUP5VldhKkTrnJaHJ9vDFJg=; b=HSg0QnA+wWhsZh7/6LaHbP4uEjaYgvn7r+XXE4Swdd9m8kjQ2uJva2IgX5O9EFUgal0Vx4FNmy0v3RPYZsYMn/fV5g0O+hoHNPHVWYrd668N60kf9TIk4IDFxNZMor/sjmhG0lLHBkiOL3vkBxLbGel31X6n5o4pQl07MycfqK8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.52 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) by mx.zohomail.com with SMTPS id 1616718488888429.2322838544279; Thu, 25 Mar 2021 17:28:08 -0700 (PDT) Received: by mail-wr1-f52.google.com with SMTP id b9so3999118wrt.8 for ; Thu, 25 Mar 2021 17:28:08 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id y1sm7976686wmq.29.2021.03.25.17.28.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:28:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nDWnefwEc2MavpEPfUetVUP5VldhKkTrnJaHJ9vDFJg=; b=qWF7s3vr6tMbXqm7PL121kfpJIY8tLAD0lQs1XkGxpQSsqetG8+7mYnujU6/vtjlZ3 xkEA18Dfj7wNUC7PPAYJVjG7JlRl8l+QikwyDBd7nUHWj6yJjCv+NvkFyw64vWdhLVje DI7/sRKj4UFmH8Ye7vGZBO+k9oiwNLt6ze1k0Nc/I1v15h+HLy20NHLeTKIwCpkHKfhD QMZqo+WPyE9kwZPTaiN4OrLLttIKwEs+7MPKJz3NnYA3mUCvopedhIRNNCo3yI3u7hYs BjxDQfMJ5sFTlAJlBxEyRnEQLqNDQwrwbE4o/xl6Otw9YJkx0dTfLpjauJXrAmtqdQmJ Ju+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=nDWnefwEc2MavpEPfUetVUP5VldhKkTrnJaHJ9vDFJg=; b=W43c1d3yT4ZTJB9p3dTMfl6P6QxijoftM7F9QTsvnRN9+W3Qrkw4Eqyz3tw4bhPvc2 trgL16AJRCWX0C7lec4LoGEixbebVaFXfkpwrqQ9EwcRAR22gA6nMgHR2QY5lVPFRumi DCjHT+TCFMg5ft2hLmqWavnW5EO5kuACDu6805z0qddQXEHXoplU4qdPgh2wO50zjsBv QXHJBlaS3783FjUhtmYWuA8dnYQJhi0SbYRoqyd4pVjVYS5mKad9fbvo+AhBtxkgV7SG /odXSJlhVLzqWWSmJR32aI1dvDMNiR6KCmurqeLe7m2XWmHbl7R/XwSd4bAmGy2A7CeI ekzg== X-Gm-Message-State: AOAM5317aW19wyjLhm56PyHFe5V+6BPGB6WWDyD5Pu3sCm9DMYENblxP GM9CvYeuCJoxLAjAo01qD20= X-Google-Smtp-Source: ABdhPJxGX774X1QY6/TgwL3qC1ihPzYVBr6n4pJ2MKpCiZAmwvKQNGUbaNZUHgO6BcWW2fw/ALzzAQ== X-Received: by 2002:adf:8b45:: with SMTP id v5mr11436323wra.398.1616718487086; Thu, 25 Mar 2021 17:28:07 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson , Antony Pavlov , Jan Kiszka , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Kevin Wolf , Max Reitz , Michael Walle , Greg Kurz , Yoshinori Sato , Magnus Damm , qemu-block@nongnu.org (open list:Block layer core) Subject: [PATCH-for-6.1 07/10] hw/block/pflash_cfi02: Simplify pflash_cfi02_register() prototype Date: Fri, 26 Mar 2021 01:27:25 +0100 Message-Id: <20210326002728.1069834-8-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The previous commit removed the mapping code from TYPE_PFLASH_CFI02. pflash_cfi02_register() doesn't use the 'nb_mappings' argument anymore. Simply remove it to simplify. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/block/flash.h | 1 - hw/arm/digic_boards.c | 1 - hw/arm/musicpal.c | 1 - hw/arm/xilinx_zynq.c | 2 +- hw/block/pflash_cfi02.c | 3 +-- hw/lm32/lm32_boards.c | 4 ++-- hw/ppc/ppc405_boards.c | 6 +++--- hw/sh4/r2d.c | 2 +- 8 files changed, 8 insertions(+), 12 deletions(-) diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h index 7dde0adcee7..0e5dd818a9d 100644 --- a/include/hw/block/flash.h +++ b/include/hw/block/flash.h @@ -36,7 +36,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, hwaddr size, BlockBackend *blk, uint32_t sector_len, - int nb_mappings, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c index 293402b1240..eb694c70d4c 100644 --- a/hw/arm/digic_boards.c +++ b/hw/arm/digic_boards.c @@ -128,7 +128,6 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, hw= addr addr, FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_S= IZE); qdev_prop_set_uint32(dev, "sector-length", FLASH_K8P3215UQB_SECTOR_SIZ= E); qdev_prop_set_uint8(dev, "width", 4); /* 32-bit */ - qdev_prop_set_uint8(dev, "mappings", 0); qdev_prop_set_uint8(dev, "big-endian", 0); qdev_prop_set_uint16(dev, "id0", 0x00ec); qdev_prop_set_uint16(dev, "id1", 0x007e); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 7d1f2f3fb3f..e882e11df36 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1657,7 +1657,6 @@ static void musicpal_init(MachineState *machine) qdev_prop_set_uint32(dev, "num-blocks", flash_size / sector_size); qdev_prop_set_uint32(dev, "sector-length", sector_size); qdev_prop_set_uint8(dev, "width", 2); /* 16-bit */ - qdev_prop_set_uint8(dev, "mappings", 0); qdev_prop_set_uint8(dev, "big-endian", 0); qdev_prop_set_uint16(dev, "id0", 0x00bf); qdev_prop_set_uint16(dev, "id1", 0x236d); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 8db6cfd47f5..d12b00e7648 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -220,7 +220,7 @@ static void zynq_init(MachineState *machine) pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, FLASH_SECTOR_SIZE, 1, - 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, + 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa, 0); =20 /* Create the main clock source, and feed slcr with it */ diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 6f4b3e3c3fe..2b412402fac 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -968,7 +968,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, hwaddr size, BlockBackend *blk, uint32_t sector_len, - int nb_mappings, int width, + int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, uint16_t unlock_addr0, @@ -977,7 +977,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base, { DeviceState *dev =3D qdev_new(TYPE_PFLASH_CFI02); =20 - assert(nb_mappings <=3D 1); if (blk) { qdev_prop_set_drive(dev, "drive", blk); } diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index b5d97dd53ed..96877ba7cfb 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -121,7 +121,7 @@ static void lm32_evr_init(MachineState *machine) pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, - 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); + 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ env->pic_state =3D lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cp= u, 0)); @@ -218,7 +218,7 @@ static void lm32_uclinux_init(MachineState *machine) pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, flash_sector_size, - 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); + 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); =20 /* create irq lines */ env->pic_state =3D lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, en= v, 0)); diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c index 8f77887fb18..2503e033497 100644 --- a/hw/ppc/ppc405_boards.c +++ b/hw/ppc/ppc405_boards.c @@ -198,7 +198,7 @@ static void ref405ep_init(MachineState *machine) pflash_cfi02_register((uint32_t)(-bios_size), "ef405ep.bios", bios_size, blk_by_legacy_dinfo(dinfo), - 64 * KiB, 1, + 64 * KiB, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); } else @@ -469,7 +469,7 @@ static void taihu_405ep_init(MachineState *machine) pflash_cfi02_register(0xFFE00000, "taihu_405ep.bios", bios_size, blk_by_legacy_dinfo(dinfo), - 64 * KiB, 1, + 64 * KiB, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; @@ -502,7 +502,7 @@ static void taihu_405ep_init(MachineState *machine) bios_size =3D 32 * MiB; pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size, blk_by_legacy_dinfo(dinfo), - 64 * KiB, 1, + 64 * KiB, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x= 2AA, 1); fl_idx++; diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 443820901d4..b7288dcba80 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -301,7 +301,7 @@ static void r2d_init(MachineState *machine) dinfo =3D drive_get(IF_PFLASH, 0, 0); pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE, dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, - 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200, + 64 * KiB, 2, 0x0001, 0x227e, 0x2220, 0x2200, 0x555, 0x2aa, 0); =20 /* NIC: rtl8139 on-board, and 2 slots. */ --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) client-ip=209.85.128.49; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f49.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718494; cv=none; d=zohomail.com; s=zohoarc; b=mf3kpHJZjm5PCp+Rbbf4EOT+dpwZrO9AigxEijRm7lATlWn8X77+8I/GXd7fha+r3FA3H/LuvN856JlhFH81HIdMQem3opQM4Hzs4o7mmH/U1A36/07byUp/FycHQLV7+NsS/J5WYPBWLytVLW/hiKHGL8ztigF245lP6bKc/dM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718494; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=OKDA4eVJdfRxYq1EfuTuqohDkKwpb3am+iFd4G3Hvr4=; b=csBUeKPxIapNBqhX/Fi7xOHQdpwvobtaW7uJvAI5NDVPQ1RahM/2HdCzKBw1iw6Oik+0q8e5tf9ypzJ9sQrY4vJZRiBj9Wa/j8cPN5xW41ie4fC/7j3nMY7nn0vP9fG6/pOVU1bzy3c2vxJ5WhiS+DWxaGWaVUGdX63byAPaKm0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) by mx.zohomail.com with SMTPS id 1616718494108459.98626616311185; Thu, 25 Mar 2021 17:28:14 -0700 (PDT) Received: by mail-wm1-f49.google.com with SMTP id g20so2103871wmk.3 for ; Thu, 25 Mar 2021 17:28:13 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id s20sm8211386wmj.36.2021.03.25.17.28.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:28:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OKDA4eVJdfRxYq1EfuTuqohDkKwpb3am+iFd4G3Hvr4=; b=O8+KG+/omyfE3MH1os+UijgTr/H3PK50FfNKFkjBALk6lmN9OPaXSGbEHO8OzF7pKu unDA/pp34Ts9CED9QY34UuHA3GIVmBEdHxsLxbht2imL0nbsecRFsU9Ec3AjMun7ouPR LMAsCnSI0inmmqD3evV3B7wS4NHrwnZmoEDN2v+0xMnVNYFgbw+cSHY04OwBn5M+4RoH SFxa+/WDTyZg2KEnBBie2EYvW7FmxAr+BsO5cRy5TVF4r+iYlNB+8r/m8Qt7EuENKijG GmjymdiQR4f813q7I4djwx68DYv5/CeMKNsKHmvwewG5AC/h4JOdZYB57e7FmxDl5ekF j7Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=OKDA4eVJdfRxYq1EfuTuqohDkKwpb3am+iFd4G3Hvr4=; b=PNmMugcZRvPpVWKepn5hGCO0+qY9qekO/H5eZdDgoPLQXLhn7V7dU8WIctDgnIvJjC DKVmpiTTczCM8jVmuHlsh3zi3SgHmwtwPqHl9h+ryIJt+tchZ1/YXKInjtdmnoaNbv3H 3k81NRA1GEzyiG0jhXg1wwcAf4VjYRadko7lAmgjmuCwTTRzvYCDLKA5UL2/z4ukFwZl O2GjBvnJFA24NiOOyYStu/Aqu5W5781lUR4GFqFkUR/yy1JwXTQA/djrEinYlySdA7vB xfnWFabUdLuxWK/FQx2W4kBltqgRfiD8sgkdD7npV8euMnyaY/6KkW/0owouqid2j9iC wNFQ== X-Gm-Message-State: AOAM533iE8GEEA995heepms7d/b4MQyf719wuFtqB20Ql16+eX0kijzh G4WfSjqPnCCZ/qC8EEysZj8= X-Google-Smtp-Source: ABdhPJy1NXEfN2hkOHw1HkOWIl3+xRN70JpVZP9oEPisumT3Rs9PjqBFDq3uB88l1C8YmzpOK702fg== X-Received: by 2002:a1c:9a09:: with SMTP id c9mr10056005wme.172.1616718492267; Thu, 25 Mar 2021 17:28:12 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson Subject: [RFC PATCH-for-6.1 08/10] hw/misc/aliased_region: Simplify aliased I/O regions Date: Fri, 26 Mar 2021 01:27:26 +0100 Message-Id: <20210326002728.1069834-9-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Currently a small I/O region aliased on a wide container creates many aliases. For example, a 8 bytes regions in a 4KiB container creates 512 aliases! As I/O goes via the slow path, we can optimize by using an I/O region which dispatch via an address space view of the aliased region. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/misc/aliased_region.h | 6 +++- hw/misc/aliased_region.c | 56 ++++++++++++++++++++++++++++++-- 2 files changed, 59 insertions(+), 3 deletions(-) diff --git a/include/hw/misc/aliased_region.h b/include/hw/misc/aliased_reg= ion.h index 0ce0d5d1cef..30b54cf06b7 100644 --- a/include/hw/misc/aliased_region.h +++ b/include/hw/misc/aliased_region.h @@ -1,7 +1,7 @@ /* * Aliased memory regions * - * Copyright (c) 2018 Philippe Mathieu-Daud=C3=A9 + * Copyright (c) 2018, 2020 Philippe Mathieu-Daud=C3=A9 * * SPDX-License-Identifier: GPL-2.0-or-later */ @@ -25,6 +25,10 @@ struct AliasedRegionState { uint64_t span_size; MemoryRegion *mr; =20 + struct { + AddressSpace as; + } io; + struct { size_t count; MemoryRegion *alias; diff --git a/hw/misc/aliased_region.c b/hw/misc/aliased_region.c index 8fcc63f2648..46b4412430a 100644 --- a/hw/misc/aliased_region.c +++ b/hw/misc/aliased_region.c @@ -1,7 +1,7 @@ /* * Aliased memory regions * - * Copyright (c) 2018 Philippe Mathieu-Daud=C3=A9 + * Copyright (c) 2018, 2020 Philippe Mathieu-Daud=C3=A9 * * SPDX-License-Identifier: GPL-2.0-or-later */ @@ -14,6 +14,50 @@ #include "hw/misc/aliased_region.h" #include "hw/qdev-properties.h" =20 +static MemTxResult aliased_io_read(void *opaque, hwaddr offset, + uint64_t *data, unsigned size, + MemTxAttrs attrs) +{ + AliasedRegionState *s =3D ALIASED_REGION(opaque); + + return address_space_read(&s->io.as, offset, attrs, data, size); +} + +static MemTxResult aliased_io_write(void *opaque, hwaddr offset, + uint64_t data, unsigned size, + MemTxAttrs attrs) +{ + AliasedRegionState *s =3D ALIASED_REGION(opaque); + + return address_space_write(&s->io.as, offset, attrs, &data, size); +} + +static bool aliased_io_accepts(void *opaque, hwaddr offset, unsigned size, + bool is_write, MemTxAttrs attrs) +{ + AliasedRegionState *s =3D ALIASED_REGION(opaque); + + return address_space_access_valid(&s->io.as, offset, size, is_write, a= ttrs); +} + +static const MemoryRegionOps aliased_io_ops =3D { + .read_with_attrs =3D aliased_io_read, + .write_with_attrs =3D aliased_io_write, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 8, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 8, + .valid.accepts =3D aliased_io_accepts, + .endianness =3D DEVICE_NATIVE_ENDIAN, +}; + +static void aliased_io_realize(AliasedRegionState *s, const char *mr_name) +{ + memory_region_init_io(&s->container, OBJECT(s), &aliased_io_ops, s, + mr_name, s->region_size); + address_space_init(&s->io.as, s->mr, memory_region_name(s->mr)); +} + static void aliased_mem_realize(AliasedRegionState *s, const char *mr_name) { uint64_t subregion_size; @@ -63,7 +107,15 @@ static void aliased_mr_realize(DeviceState *dev, Error = **errp) span =3D size_to_str(s->span_size); name =3D g_strdup_printf("masked %s [span of %s]", memory_region_name(s->mr), span); - aliased_mem_realize(s, name); + + if (memory_region_is_ram(s->mr) + || memory_region_is_ram_device(s->mr) + || memory_region_is_romd(s->mr)) { + aliased_mem_realize(s, name); + } else { + /* I/O or container */ + aliased_io_realize(s, name); + } sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container); } =20 --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.43 as permitted sender) client-ip=209.85.128.43; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f43.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.43 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1616718499; cv=none; d=zohomail.com; s=zohoarc; b=e+AgJL6BtIQdMmyelWO1G3pnJKM9cfsBCK7nkHlf/1ctSZEBXPAU4TEQsr+rzXCO2IBKLzJW2gN2tt/kLJzrk9VFLSIj4wPaNvtjtHaf71QIRRNGgoXszkElkYGgXtbk3nM9OHxvsTMx2U9vHK5UJGvwyChbkdvWC18SFAXXGwY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616718499; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZjHOHQ6FW9OLxHcp9ojcwWz0Qq5Kwhc+7VGNOsAq47o=; b=RYDZOS5HnSvaM6ZiApXftpKWT0u6rpBNoPDIDnxgNkvbhxjZd2YvJfqbgDeAJihQc0OoR+x/Munh8M8iG+Uyq/uKJlXt0XUKhFtLBFay64smbSkZWwUgdKGj5Eq+eJmt+L1pteoIFqSuvrqDVEYOOTp6Y/4WJ3qiVNkCx9iD/NA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.43 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) by mx.zohomail.com with SMTPS id 1616718499096798.8926606047008; Thu, 25 Mar 2021 17:28:19 -0700 (PDT) Received: by mail-wm1-f43.google.com with SMTP id g25so2139310wmh.0 for ; Thu, 25 Mar 2021 17:28:18 -0700 (PDT) Return-Path: Return-Path: Received: from localhost.localdomain (17.red-88-21-201.staticip.rima-tde.net. [88.21.201.17]) by smtp.gmail.com with ESMTPSA id f22sm8015889wmc.33.2021.03.25.17.28.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:28:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZjHOHQ6FW9OLxHcp9ojcwWz0Qq5Kwhc+7VGNOsAq47o=; b=aLBGIQyBNFRm+22cuNQuAwX4oIXI2Tfptl+DmTXOCqiT81LTlC8vCs5ZYzBSKqG7RI it57i0q/sCXWcAAP62Z2T/yrXCwRSimZ7BOTMVRdQSniflCGppEX0y9INwjMOybgqFS7 hAWbv8vUSAXHQaCaaSx8Tecd5pxOf+nb/JZCfcquFk7jMzCrn5aU+AElkqsaWnLhHzQC WPn8e3vTICuj8MHt4Mya7h0tPxSLXZMR5/fO7APO8xCoR4DNSzGSPTEdMEaEnJ0hZuMz WrM6D9LUlXQx37gBZRMmrkF2T6F89nt30gbLEW7KlDtH0cMmDNR7zs+/QCR7Z+Z4DFAw kp/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ZjHOHQ6FW9OLxHcp9ojcwWz0Qq5Kwhc+7VGNOsAq47o=; b=lab2aWKjvySAcnV02Zs/CYkYkx6Ew4iCGqAclomXhwFcAC1gaW2QeIm9zyBMgRFRN0 OFgOoJeAYQuhZOWIHoVfGBwNYaukEAEXCKurwraYOn1Hbw2+WRIsf9zrIflGFO+o5GQ4 4E69Rauy+s965qiXF4JCCfapJrNdUzLJxW9d54DJqQc+v83vfQwuUmUdcVlacU6UH5z/ fN8Hth6nHEUtjGRfBSTkGmt+r9ug187sefc7V7u6HmZpkyonyZYO7naSv//1G1KRM5OU t17hmn+bEhXO0Mfydvu9S6RD08N3BOFypof2jLrWjZtn7nZpELa3TUALCJUyY5rmfgDQ qnGw== X-Gm-Message-State: AOAM533Nki/TWXMHJX3dKO8MvMoIPQR5GPUtLMmCtwm7oLtmeXfN0end TZnJXUXNxguA1J8IL2RZRGs= X-Google-Smtp-Source: ABdhPJwoV5Hp8hbWmfYVBJtivaREd9dCiXrpe8vp/XnkXZA96gDS0sB6VTjt24fdnH2m3y6MBTjWjg== X-Received: by 2002:a7b:c047:: with SMTP id u7mr10379733wmc.98.1616718497222; Thu, 25 Mar 2021 17:28:17 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson Subject: [PATCH-for-6.1 09/10] hw/m68k/q800: Add MacIO container Date: Fri, 26 Mar 2021 01:27:27 +0100 Message-Id: <20210326002728.1069834-10-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Instead of having devices mapped onto some main memory range, then having many aliases pointing to this memory range, add a container, map the devices onto it, and map aliases of the container onto the main memory. We gain a better visibility of the devices on the mac-io bus. - before: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000007ffffff (prio 0, ram): m68k_mac.ram 0000000040800000-00000000408fffff (prio 0, rom): m68k_mac.rom 0000000050000000-0000000050003fff (prio 0, i/o): mac-via 0000000050000000-0000000050001fff (prio 0, i/o): via1 0000000050002000-0000000050003fff (prio 0, i/o): via2 0000000050008000-0000000050008fff (prio 0, rom): dp8393x-prom 000000005000a000-000000005000a0ff (prio 0, i/o): dp8393x-regs 000000005000c020-000000005000c027 (prio 0, i/o): escc 0000000050010000-00000000500100ff (prio 0, i/o): esp-regs 0000000050010100-0000000050010103 (prio 0, i/o): esp-pdma 000000005001e000-000000005001ffff (prio 0, i/o): swim 0000000050040000-000000005007ffff (prio 0, i/o): alias mac_m68k.io[1]= @system 0000000050000000-000000005003ffff 0000000050080000-00000000500bffff (prio 0, i/o): alias mac_m68k.io[2]= @system 0000000050000000-000000005003ffff 00000000500c0000-00000000500fffff (prio 0, i/o): alias mac_m68k.io[3]= @system 0000000050000000-000000005003ffff ... 0000000053f40000-0000000053f7ffff (prio 0, i/o): alias mac_m68k.io[25= 3] @system 0000000050000000-000000005003ffff 0000000053f80000-0000000053fbffff (prio 0, i/o): alias mac_m68k.io[25= 4] @system 0000000050000000-000000005003ffff 0000000053fc0000-0000000053ffffff (prio 0, i/o): alias mac_m68k.io[25= 5] @system 0000000050000000-000000005003ffff 0000000060000000-00000000efffffff (prio 0, i/o): nubus-super-slots 00000000f0000000-00000000feffffff (prio 0, i/o): nubus-slots 00000000f9000000-00000000f9ffffff (prio 0, i/o): nubus-slot-9 00000000f9001000-00000000f9400fff (prio 0, ram): macfb-vram 00000000f9800000-00000000f9800fff (prio 0, i/o): macfb-ctrl 00000000f9ffffe8-00000000f9ffffeb (prio 0, i/o): nubus-slot-9-rom 00000000f9ffffec-00000000f9ffffff (prio 0, i/o): nubus-slot-9-for= mat-block - after: address-space: memory 0000000000000000-0000000007ffffff (prio 0, ram): m68k_mac.ram 0000000040800000-00000000408fffff (prio 0, rom): m68k_mac.rom 0000000050000000-000000005003ffff (prio 0, i/o): alias mac_m68k.io[0]= @mac-io 0000000000000000-000000000003ffff 0000000050040000-000000005007ffff (prio 0, i/o): alias mac_m68k.io[1]= @mac-io 0000000000000000-000000000003ffff 0000000050080000-00000000500bffff (prio 0, i/o): alias mac_m68k.io[2]= @mac-io 0000000000000000-000000000003ffff ... 0000000053f40000-0000000053f7ffff (prio 0, i/o): alias mac_m68k.io[25= 3] @mac-io 0000000000000000-000000000003ffff 0000000053f80000-0000000053fbffff (prio 0, i/o): alias mac_m68k.io[25= 4] @mac-io 0000000000000000-000000000003ffff 0000000053fc0000-0000000053ffffff (prio 0, i/o): alias mac_m68k.io[25= 5] @mac-io 0000000000000000-000000000003ffff 0000000060000000-00000000efffffff (prio 0, i/o): nubus-super-slots 00000000f0000000-00000000feffffff (prio 0, i/o): nubus-slots 00000000f9000000-00000000f9ffffff (prio 0, i/o): nubus-slot-9 00000000f9001000-00000000f9400fff (prio 0, ram): macfb-vram 00000000f9800000-00000000f9800fff (prio 0, i/o): macfb-ctrl 00000000f9ffffe8-00000000f9ffffeb (prio 0, i/o): nubus-slot-9-rom 00000000f9ffffec-00000000f9ffffff (prio 0, i/o): nubus-slot-9-for= mat-block memory-region: mac-io 0000000000000000-000000000003ffff (prio 0, i/o): mac-io 0000000000000000-0000000000003fff (prio 0, i/o): mac-via 0000000000000000-0000000000001fff (prio 0, i/o): via1 0000000000002000-0000000000003fff (prio 0, i/o): via2 0000000000008000-0000000000008fff (prio 0, rom): dp8393x-prom 000000000000a000-000000000000a0ff (prio 0, i/o): dp8393x-regs 000000000000c020-000000000000c027 (prio 0, i/o): escc 0000000000010000-00000000000100ff (prio 0, i/o): esp-regs 0000000000010100-0000000000010103 (prio 0, i/o): esp-pdma 000000000001e000-000000000001ffff (prio 0, i/o): swim Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/m68k/q800.c | 54 ++++++++++++++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 21 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 4d2e866eec7..8f14e677077 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -61,14 +61,14 @@ #define IO_SLICE 0x00040000 #define IO_SIZE 0x04000000 =20 -#define VIA_BASE (IO_BASE + 0x00000) -#define SONIC_PROM_BASE (IO_BASE + 0x08000) -#define SONIC_BASE (IO_BASE + 0x0a000) -#define SCC_BASE (IO_BASE + 0x0c020) -#define ESP_BASE (IO_BASE + 0x10000) -#define ESP_PDMA (IO_BASE + 0x10100) -#define ASC_BASE (IO_BASE + 0x14000) -#define SWIM_BASE (IO_BASE + 0x1E000) +#define VIA_OFFSET (0x00000) +#define SONIC_PROM_OFFSET (0x08000) +#define SONIC_IO_OFFSET (0x0a000) +#define SCC_OFFSET (0x0c020) +#define ESP_OFFSET (0x10000) +#define ESP_PDMA_OFFSET (0x10100) +#define ASC_OFFSET (0x14000) +#define SWIM_OFFSET (0x1e000) =20 #define NUBUS_SUPER_SLOT_BASE 0x60000000 #define NUBUS_SLOT_BASE 0xf0000000 @@ -213,8 +213,9 @@ static void q800_init(MachineState *machine) ram_addr_t initrd_base; int32_t initrd_size; MemoryRegion *rom; + MemoryRegion *macio; MemoryRegion *io; - const int io_slice_nb =3D (IO_SIZE / IO_SLICE) - 1; + const int io_slice_nb =3D (IO_SIZE / IO_SLICE); int i; ram_addr_t ram_size =3D machine->ram_size; const char *kernel_filename =3D machine->kernel_filename; @@ -249,18 +250,21 @@ static void q800_init(MachineState *machine) /* RAM */ memory_region_add_subregion(get_system_memory(), 0, machine->ram); =20 + /* MacIO bus */ + macio =3D g_new(MemoryRegion, 1); + memory_region_init(macio, NULL, "mac-io", 256 * KiB); /* FIXME or 128K= ? */ + /* * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE */ io =3D g_new(MemoryRegion, io_slice_nb); for (i =3D 0; i < io_slice_nb; i++) { - char *name =3D g_strdup_printf("mac_m68k.io[%d]", i + 1); + char *name =3D g_strdup_printf("mac_m68k.io[%d]", i); =20 - memory_region_init_alias(&io[i], NULL, name, get_system_memory(), - IO_BASE, IO_SLICE); + memory_region_init_alias(&io[i], NULL, name, macio, 0, IO_SLICE); memory_region_add_subregion(get_system_memory(), - IO_BASE + (i + 1) * IO_SLICE, &io[i]); + IO_BASE + i * IO_SLICE, &io[i]); g_free(name); } =20 @@ -278,7 +282,8 @@ static void q800_init(MachineState *machine) } sysbus =3D SYS_BUS_DEVICE(via_dev); sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_mmio_map(sysbus, 0, VIA_BASE); + memory_region_add_subregion(macio, VIA_OFFSET, + sysbus_mmio_get_region(sysbus, 0)); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, qdev_get_gpio_in(glue, 0)); qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, @@ -321,9 +326,11 @@ static void q800_init(MachineState *machine) OBJECT(get_system_memory()), &error_abort); sysbus =3D SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_mmio_map(sysbus, 0, SONIC_BASE); - sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE); sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, 2)); + memory_region_add_subregion(macio, SONIC_IO_OFFSET, + sysbus_mmio_get_region(sysbus, 0)); + memory_region_add_subregion(macio, SONIC_PROM_OFFSET, + sysbus_mmio_get_region(sysbus, 1)); =20 /* SCC */ =20 @@ -346,7 +353,8 @@ static void q800_init(MachineState *machine) sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); qdev_connect_gpio_out(DEVICE(escc_orgate), 0, qdev_get_gpio_in(glue, 3= )); - sysbus_mmio_map(sysbus, 0, SCC_BASE); + memory_region_add_subregion(macio, SCC_OFFSET, + sysbus_mmio_get_region(sysbus, 0)); =20 /* SCSI */ =20 @@ -367,8 +375,10 @@ static void q800_init(MachineState *machine) sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in_named(via_dev, "via2-irq", VIA2_IRQ_SCSI_DATA_BIT)); - sysbus_mmio_map(sysbus, 0, ESP_BASE); - sysbus_mmio_map(sysbus, 1, ESP_PDMA); + memory_region_add_subregion(macio, ESP_OFFSET, + sysbus_mmio_get_region(sysbus, 0)); + memory_region_add_subregion(macio, ESP_PDMA_OFFSET, + sysbus_mmio_get_region(sysbus, 1)); =20 scsi_bus_legacy_handle_cmdline(&esp->bus); =20 @@ -376,7 +386,8 @@ static void q800_init(MachineState *machine) =20 dev =3D qdev_new(TYPE_SWIM); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); + memory_region_add_subregion(macio, SWIM_OFFSET, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev)= , 0)); =20 /* NuBus */ =20 @@ -423,7 +434,8 @@ static void q800_init(MachineState *machine) (graphic_height << 16) | graphic_width); BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, (graphic_width * graphic_depth + 7) / 8); - BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); + BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, + IO_BASE + SCC_OFFSET); =20 rom =3D g_malloc(sizeof(*rom)); memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", --=20 2.26.2 From nobody Sat May 4 02:48:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.48 as permitted sender) client-ip=209.85.221.48; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f48.google.com; Authentication-Results: mx.zohomail.com; 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[88.21.201.17]) by smtp.gmail.com with ESMTPSA id a17sm7951026wmj.9.2021.03.25.17.28.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Mar 2021 17:28:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ac0Y0HtO9B44DC7CRON+B/TUEAbi/V+Fv+F690K+iOg=; b=iqmAYl2jN3HWu/A7aUc/pSLgR/GC7FfqN3oJ/B6BTStageD5LUGX4gbKUI/dG/Ks82 xfRU2YWlsh0jPYeGN3IQ9r6NwDQE3Gt8PBmIstFCsZd5ZXoGNblym8XUcizMEZ5OWbOp 5ML7PCeKdNPjvyp5jiW+laBZsAPlI85pvMJxbNYzqOBqGbtp34vV/UXG/akuaZ6ih3EV X19KPH0ZGvdsOYSpOMJbMfqBt7Loki8qrltW4AlT0At5ksPR28G61rHpX89HJ08duCf2 0TD/mvUMAqr1ayGfIgVFxEehSqLiUSmLCV1U4oH8iXNsqss9I+6YVMVkEEWtM0Sy6MGl kV7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ac0Y0HtO9B44DC7CRON+B/TUEAbi/V+Fv+F690K+iOg=; b=JrBH46LxR5T9Tl1CV+3aMmJhtbdE5Dx+q2T1YtNxPkyDTlGVdbCJP5Ay23JdxKo6vI +vLq2UkfPTYBMP5hMpradXRNjOgsfGfEfcRII7Vl5ddtV+3sp4Bg2WDzKxKwbme0oEpc BvtUkpFN5a3kF0fslpy9LiDY61GBowYvh7RzAd+HdWPrJA7p12FzmCDVQaLSTxYbduvG 1e+5xSR9T6BtpLRmcUM0DGuqNNBvW6O9WvfoOY6+Ze4emADBGNHpIiIDHNU3G1qpM19F a36NeLSE+hlpGqSArT4zr2sKklIIk9JQaSWkB1W6CPExlPyASa8Jf2vswEC5QHnOlYQd UExw== X-Gm-Message-State: AOAM533KlvLhaUy0tRn1CNoyydpdQoLQjR+KcXYY0aFw+aj+mzFaKqGX 41pibuCbGVw3r2AZCQOegkc= X-Google-Smtp-Source: ABdhPJwzfb/pc3AyVKBgvghDNvg21uDVkExx/Rm2ArpGHOtX8A77e1dWA5XXS0UPZCDGAa1ZGTkHNg== X-Received: by 2002:a05:6000:10c3:: with SMTP id b3mr11417612wrx.96.1616718502178; Thu, 25 Mar 2021 17:28:22 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Laurent Vivier , Mark Cave-Ayland , Peter Maydell , Richard Henderson , Alistair Francis , "Edgar E. Iglesias" , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, David Gibson Subject: [RFC PATCH-for-6.1 10/10] hw/m68k/q800: Map MacIO using memory_region_add_subregion_aliased() Date: Fri, 26 Mar 2021 01:27:28 +0100 Message-Id: <20210326002728.1069834-11-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210326002728.1069834-1-f4bug@amsat.org> References: <20210326002728.1069834-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Currently the memory and flatview tree is huge, not very practical: $ (echo info mtree -f;echo q) \ | qemu-system-m68k -M q800 -S -monitor stdio \ | wc -l 2073 Use the memory_region_add_subregion_aliased() helper to manage the MacIO aliases under the hood. - before: (qemu) info mtree address-space: memory 0000000000000000-0000000007ffffff (prio 0, ram): m68k_mac.ram 0000000040800000-00000000408fffff (prio 0, rom): m68k_mac.rom 0000000050000000-000000005003ffff (prio 0, i/o): alias mac_m68k.io[0]= @mac-io 0000000000000000-000000000003ffff 0000000050040000-000000005007ffff (prio 0, i/o): alias mac_m68k.io[1]= @mac-io 0000000000000000-000000000003ffff 0000000050080000-00000000500bffff (prio 0, i/o): alias mac_m68k.io[2]= @mac-io 0000000000000000-000000000003ffff ... 0000000053f40000-0000000053f7ffff (prio 0, i/o): alias mac_m68k.io[25= 3] @mac-io 0000000000000000-000000000003ffff 0000000053f80000-0000000053fbffff (prio 0, i/o): alias mac_m68k.io[25= 4] @mac-io 0000000000000000-000000000003ffff 0000000053fc0000-0000000053ffffff (prio 0, i/o): alias mac_m68k.io[25= 5] @mac-io 0000000000000000-000000000003ffff 0000000060000000-00000000efffffff (prio 0, i/o): nubus-super-slots 00000000f0000000-00000000feffffff (prio 0, i/o): nubus-slots 00000000f9000000-00000000f9ffffff (prio 0, i/o): nubus-slot-9 00000000f9001000-00000000f9400fff (prio 0, ram): macfb-vram 00000000f9800000-00000000f9800fff (prio 0, i/o): macfb-ctrl 00000000f9ffffe8-00000000f9ffffeb (prio 0, i/o): nubus-slot-9-rom 00000000f9ffffec-00000000f9ffffff (prio 0, i/o): nubus-slot-9-for= mat-block - after: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-0000000007ffffff (prio 0, ram): m68k_mac.ram 0000000040800000-00000000408fffff (prio 0, rom): m68k_mac.rom 0000000050000000-0000000053ffffff (prio 0, i/o): masked mac-io [span = of 256 KiB] 0000000060000000-00000000efffffff (prio 0, i/o): nubus-super-slots 00000000f0000000-00000000feffffff (prio 0, i/o): nubus-slots 00000000f9000000-00000000f9ffffff (prio 0, i/o): nubus-slot-9 00000000f9001000-00000000f9400fff (prio 0, ram): macfb-vram 00000000f9800000-00000000f9800fff (prio 0, i/o): macfb-ctrl 00000000f9ffffe8-00000000f9ffffeb (prio 0, i/o): nubus-slot-9-rom 00000000f9ffffec-00000000f9ffffff (prio 0, i/o): nubus-slot-9-for= mat-block (qemu) info mtree -f FlatView #0 AS "memory", root: system AS "cpu-memory-0", root: system AS "dp8393x", root: system Root memory region: system 0000000000000000-0000000007ffffff (prio 0, ram): m68k_mac.ram 0000000040800000-00000000408fffff (prio 0, rom): m68k_mac.rom 0000000050000000-0000000053ffffff (prio 0, i/o): masked mac-io [span of= 256 KiB] 0000000060000000-00000000efffffff (prio 0, i/o): nubus-super-slots 00000000f0000000-00000000f9000fff (prio 0, i/o): nubus-slots 00000000f9001000-00000000f9400fff (prio 0, ram): macfb-vram 00000000f9401000-00000000f97fffff (prio 0, i/o): nubus-slots @000000000= 9401000 00000000f9800000-00000000f9800fff (prio 0, i/o): macfb-ctrl 00000000f9801000-00000000f9ffffe7 (prio 0, i/o): nubus-slots @000000000= 9801000 00000000f9ffffe8-00000000f9ffffeb (prio 0, rom): nubus-slot-9-rom 00000000f9ffffec-00000000f9ffffff (prio 0, i/o): nubus-slot-9-format-bl= ock 00000000fa000000-00000000feffffff (prio 0, i/o): nubus-slots @000000000= a000000 FlatView #1 AS "mac-io", root: mac-io Root memory region: mac-io 0000000000000000-0000000000001fff (prio 0, i/o): via1 0000000000002000-0000000000003fff (prio 0, i/o): via2 0000000000008000-0000000000008fff (prio 0, rom): dp8393x-prom 000000000000a000-000000000000a0ff (prio 0, i/o): dp8393x-regs 000000000000c020-000000000000c027 (prio 0, i/o): escc 0000000000010000-00000000000100ff (prio 0, i/o): esp-regs 0000000000010100-0000000000010103 (prio 0, i/o): esp-pdma 000000000001e000-000000000001ffff (prio 0, i/o): swim Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/m68k/q800.c | 15 +++------------ hw/m68k/Kconfig | 1 + 2 files changed, 4 insertions(+), 12 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 8f14e677077..4ca7e1af08e 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -40,6 +40,7 @@ #include "standard-headers/asm-m68k/bootinfo.h" #include "standard-headers/asm-m68k/bootinfo-mac.h" #include "bootinfo.h" +#include "hw/misc/aliased_region.h" #include "hw/misc/mac_via.h" #include "hw/input/adb.h" #include "hw/nubus/mac-nubus-bridge.h" @@ -214,9 +215,6 @@ static void q800_init(MachineState *machine) int32_t initrd_size; MemoryRegion *rom; MemoryRegion *macio; - MemoryRegion *io; - const int io_slice_nb =3D (IO_SIZE / IO_SLICE); - int i; ram_addr_t ram_size =3D machine->ram_size; const char *kernel_filename =3D machine->kernel_filename; const char *initrd_filename =3D machine->initrd_filename; @@ -258,15 +256,8 @@ static void q800_init(MachineState *machine) * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE */ - io =3D g_new(MemoryRegion, io_slice_nb); - for (i =3D 0; i < io_slice_nb; i++) { - char *name =3D g_strdup_printf("mac_m68k.io[%d]", i); - - memory_region_init_alias(&io[i], NULL, name, macio, 0, IO_SLICE); - memory_region_add_subregion(get_system_memory(), - IO_BASE + i * IO_SLICE, &io[i]); - g_free(name); - } + memory_region_add_subregion_aliased(get_system_memory(), + IO_BASE, IO_SIZE, macio, IO_SLICE); =20 /* IRQ Glue */ glue =3D qdev_new(TYPE_GLUE); diff --git a/hw/m68k/Kconfig b/hw/m68k/Kconfig index f839f8a0306..d2e588913b7 100644 --- a/hw/m68k/Kconfig +++ b/hw/m68k/Kconfig @@ -23,6 +23,7 @@ config Q800 select ESP select DP8393X select OR_IRQ + select ALIASED_REGION =20 config M68K_VIRT bool --=20 2.26.2