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Wed, 24 Mar 2021 22:39:15 +0000 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12OMdEUC31130018 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 24 Mar 2021 22:39:14 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F08CCC605D; Wed, 24 Mar 2021 22:39:13 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4511FC605F; Wed, 24 Mar 2021 22:39:11 +0000 (GMT) Received: from T480-KlausKiwi.localdomain (unknown [9.85.133.239]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 24 Mar 2021 22:39:10 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=NYoNUd7YDsykkYHf2aml8u42BPG48iPwlx9Nkz7ImNY=; b=RnDojjOluwV6KCY6bpFPhBEew/absfzwYr7czq63iNAdVRxE3McW15zCk1aK7XaZz1BW AkAsjwiswJ2XlVoePfs4tkwXFfuMvUKtG02joa77dutjDwPRbQr1I1PJNki/R0NG4HG4 eXo92xr9RsJLB5gz4pAT7PKST4GU+BKkkm+qXGvC0VcEfVpJIGADURj6RSuktjpXKOGK O7Zpc5SlThebwiXK66eRUGj7qEE4U4caHSTcw2nF1L0oC2g8oTYM1haq8QLvCEWVl/qA 5SJSB/CmG3usekjoJx1LrMPtv0tfE9pk7TLnANlJ1MUjhgFfGTne8HN8jz89sWd8lHQn fA== From: Klaus Heinrich Kiwi To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/3] aspeed: Coding Style cleanups on do_hash_operation Date: Wed, 24 Mar 2021 19:38:44 -0300 Message-Id: <20210324223846.17407-2-klaus@linux.vnet.ibm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> References: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-24_13:2021-03-24, 2021-03-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 clxscore=1015 impostorscore=0 mlxlogscore=999 priorityscore=1501 suspectscore=0 spamscore=0 bulkscore=0 mlxscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103240161 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=148.163.158.5; envelope-from=klaus@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Andrew Jeffery , Klaus Heinrich Kiwi , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , Joel Stanley Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Basically using camelCase for some variables... Signed-off-by: Klaus Heinrich Kiwi --- hw/misc/aspeed_hace.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index 6e5b447a48..93313d2b80 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -86,24 +86,24 @@ static int hash_algo_lookup(uint32_t mask) =20 static int do_hash_operation(AspeedHACEState *s, int algo) { - hwaddr src, len, dest; - uint8_t *digest_buf =3D NULL; - size_t digest_len =3D 0; - char *src_buf; + uint32_t src, len, dest; + uint8_t *digestBuf =3D NULL; + size_t digestLen =3D 0; + char *srcBuf; int rc; =20 src =3D s->regs[R_HASH_SRC]; len =3D s->regs[R_HASH_SRC_LEN]; dest =3D s->regs[R_HASH_DEST]; =20 - src_buf =3D address_space_map(&s->dram_as, src, &len, false, - MEMTXATTRS_UNSPECIFIED); - if (!src_buf) { + srcBuf =3D address_space_map(&s->dram_as, src, (hwaddr *) &len, + false, MEMTXATTRS_UNSPECIFIED); + if (!srcBuf) { qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map dram\n", __func_= _); return -EACCES; } =20 - rc =3D qcrypto_hash_bytes(algo, src_buf, len, &digest_buf, &digest_len, + rc =3D qcrypto_hash_bytes(algo, srcBuf, len, &digestBuf, &digestLen, &error_fatal); if (rc < 0) { qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", __func__); @@ -111,14 +111,14 @@ static int do_hash_operation(AspeedHACEState *s, int = algo) } =20 rc =3D address_space_write(&s->dram_as, dest, MEMTXATTRS_UNSPECIFIED, - digest_buf, digest_len); + digestBuf, digestLen); if (rc) { qemu_log_mask(LOG_GUEST_ERROR, "%s: address space write failed\n", __func__); } - g_free(digest_buf); + g_free(digestBuf); =20 - address_space_unmap(&s->dram_as, src_buf, len, false, len); + address_space_unmap(&s->dram_as, srcBuf, len, false, len); =20 /* * Set status bits to indicate completion. Testing shows hardware sets --=20 2.25.1 From nobody Sun May 5 05:45:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1616625894; cv=none; d=zohomail.com; s=zohoarc; b=SA2QSQhw+0Na2cMAhoTXzPFt5os1keA8G5ihkOOTZduSN0E79L11gc/D/lKX63SstbEdK3Q5s5r59SYluaKVU9Jx1HFE5hq2UBe82hfbnpVv7nDroC2Lrs6wOaJDg+e6LreYQy9omuQEyIxGdd8wSNUqcNZxEA4xuyBtwbnmkAM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616625894; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=dUO4fOEv1n8VcWVg5BZZBX4F71p8l5ojaat6OU5nL4o=; b=jUvPKOcflN9Z/qYFvumLc7hQ0KVi10tZD7mIpaFOV4W42c2W0e4SyubSSATQoCkFkWmdVscKaA8Q9WVLr3pLCeHfusSkfRX2gbrNxqNOoNOel784PW+3rzLu05mSepxV+Josn2q22XmR5epm9/Uy3HY/xrxWreinEc9xeFwdRGY= ARC-Authentication-Results: i=1; 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Wed, 24 Mar 2021 22:39:21 +0000 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08027.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12OMdKwG11338026 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 24 Mar 2021 22:39:20 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EE93FC605F; Wed, 24 Mar 2021 22:39:19 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44759C6059; Wed, 24 Mar 2021 22:39:17 +0000 (GMT) Received: from T480-KlausKiwi.localdomain (unknown [9.85.133.239]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 24 Mar 2021 22:39:17 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=dUO4fOEv1n8VcWVg5BZZBX4F71p8l5ojaat6OU5nL4o=; b=qLorZUwbqL5TSD0KO3peq1+Sch2dN02I3TfIYyteaup+NpD4ixmP+mIwP/VzjuaFOx5b lcM4kcO/hy2iu+YJRZNJufupAbF8yu30YsuFkLqYLnvRGhYouBe00iQ9fX2kBo7oq7ly b0jOPWdoQQJ7Ze68beidkLWlz6oMXZ5Dr7pNUHJrkJYhdK97dpjj268UMq3ezK19kJlr 5gEeNeVaXAUQyN0vc4zOFKhqPsig/Nx1wms7EWeDIBy0XXrGHUOhQ4/0zJOpw0nKEYQV 9YYMJdXEN/wkc5f9zVMCtXpao+cyyCuQcMJHlQuHtGf3wnd+hBGIyDW9fpdrcJTAWnym bQ== From: Klaus Heinrich Kiwi To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 2/3] aspeed: Add Scater-Gather support for HACE Hash Date: Wed, 24 Mar 2021 19:38:45 -0300 Message-Id: <20210324223846.17407-3-klaus@linux.vnet.ibm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> References: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-24_13:2021-03-24, 2021-03-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 mlxscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 priorityscore=1501 adultscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103240161 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=148.163.156.1; envelope-from=klaus@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Andrew Jeffery , Klaus Heinrich Kiwi , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , Joel Stanley Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Complement the Aspeed HACE support with Scatter-Gather hash support for sha256 and sha512. Scatter-Gather is only supported on AST2600-series. Signed-off-by: Klaus Heinrich Kiwi --- hw/misc/aspeed_hace.c | 127 ++++++++++++++++++++++++++++++++-- include/hw/misc/aspeed_hace.h | 6 ++ 2 files changed, 127 insertions(+), 6 deletions(-) diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c index 93313d2b80..8a37b1d961 100644 --- a/hw/misc/aspeed_hace.c +++ b/hw/misc/aspeed_hace.c @@ -57,6 +57,10 @@ /* Other cmd bits */ #define HASH_IRQ_EN BIT(9) #define HASH_SG_EN BIT(18) +/* Scatter-gather data list */ +#define SG_LIST_LAST BIT(31) +#define SG_LIST_LEN_MASK 0x7fffffff +#define SG_LIST_ADDR_MASK 0x7ffffff8 /* 8-byte aligned */ =20 static const struct { uint32_t mask; @@ -129,6 +133,117 @@ static int do_hash_operation(AspeedHACEState *s, int = algo) return 0; } =20 +static int do_hash_sg_operation(AspeedHACEState *s, int algo) +{ + uint32_t src, dest, reqSize; + hwaddr len; + const size_t reqLen =3D sizeof(struct aspeed_sg_list); + struct iovec iov[ASPEED_HACE_MAX_SG]; + unsigned int i =3D 0; + unsigned int isLast =3D 0; + uint8_t *digestBuf =3D NULL; + size_t digestLen =3D 0, size =3D 0; + struct aspeed_sg_list *sgList; + int rc; + + reqSize =3D s->regs[R_HASH_SRC_LEN]; + dest =3D s->regs[R_HASH_DEST]; + + while (!isLast && i < ASPEED_HACE_MAX_SG) { + src =3D s->regs[R_HASH_SRC] + (i * reqLen); + len =3D reqLen; + sgList =3D (struct aspeed_sg_list *) address_space_map(&s->dram_as, + src, + (hwaddr *) &len, + false, + MEMTXATTRS_UNSPECIFIED); + if (!sgList) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: failed to map dram for SG Array entry '%u' for address '= 0x%0x'\n", + __func__, i, src); + rc =3D -EACCES; + goto cleanup; + } + if (len !=3D reqLen) + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Warning: dram map for SG array entry '%u' requested siz= e '%lu' !=3D mapped size '%lu'\n", + __func__, i, reqLen, len); + + isLast =3D sgList->len & SG_LIST_LAST; + + iov[i].iov_len =3D (hwaddr) (sgList->len & SG_LIST_LEN_MASK); + iov[i].iov_base =3D address_space_map(&s->dram_as, + sgList->phy_addr & SG_LIST_ADDR_MASK, + &iov[i].iov_len, false, + MEMTXATTRS_UNSPECIFIED); + if (!iov[i].iov_base) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: failed to map dram for SG array entry '%u' for region '0= x%x', len '%u'\n", + __func__, i, sgList->phy_addr & SG_LIST_ADDR_MASK, + sgList->len & SG_LIST_LEN_MASK); + rc =3D -EACCES; + goto cleanup; + } + if (iov[i].iov_len !=3D (sgList->len & SG_LIST_LEN_MASK)) + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Warning: dram map for SG region entry %u requested size= %u !=3D mapped size %lu\n", + __func__, i, (sgList->len & SG_LIST_LEN_MASK), iov[i].iov_len= ); + + + address_space_unmap(&s->dram_as, (void *) sgList, len, false, + len); + size +=3D iov[i].iov_len; + i++; + } + + if (!isLast) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Error: Exhausted maximum of '%u' SG array entrie= s\n", + __func__, ASPEED_HACE_MAX_SG); + rc =3D -ENOTSUP; + goto cleanup; + } + + if (size !=3D reqSize) + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Warning: requested SG total size %u !=3D actual size %lu\n", + __func__, reqSize, size); + + rc =3D qcrypto_hash_bytesv(algo, iov, i, &digestBuf, &digestLen, + &error_fatal); + if (rc < 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: qcrypto failed\n", + __func__); + goto cleanup; + } + + rc =3D address_space_write(&s->dram_as, dest, MEMTXATTRS_UNSPECIFIED, + digestBuf, digestLen); + if (rc) + qemu_log_mask(LOG_GUEST_ERROR, + "%s: address space write failed\n", __func__); + g_free(digestBuf); + +cleanup: + + for (; i > 0; i--) { + address_space_unmap(&s->dram_as, iov[i - 1].iov_base, + iov[i - 1].iov_len, false, + iov[i - 1].iov_len); + } + + /* + * Set status bits to indicate completion. Testing shows hardware sets + * these irrespective of HASH_IRQ_EN. + */ + if (!rc) { + s->regs[R_STATUS] |=3D HASH_IRQ; + } + + return rc; +} + + =20 static uint64_t aspeed_hace_read(void *opaque, hwaddr addr, unsigned int s= ize) { @@ -187,11 +302,6 @@ static void aspeed_hace_write(void *opaque, hwaddr add= r, uint64_t data, "%s: HMAC engine command mode %"PRIx64" not impl= emented", __func__, (data & HASH_HMAC_MASK) >> 8); } - if (data & HASH_SG_EN) { - qemu_log_mask(LOG_UNIMP, - "%s: Hash scatter gather mode not implemented", - __func__); - } if (data & BIT(1)) { qemu_log_mask(LOG_UNIMP, "%s: Cascaded mode not implemented", @@ -204,7 +314,12 @@ static void aspeed_hace_write(void *opaque, hwaddr add= r, uint64_t data, __func__, data & ahc->hash_mask); break; } - do_hash_operation(s, algo); + if (data & HASH_SG_EN) { + s->regs[(R_HASH_SRC >> 2)] &=3D 0x7FFFFFF8; + do_hash_sg_operation(s, algo); + } else { + do_hash_operation(s, algo); + } =20 if (data & HASH_IRQ_EN) { qemu_irq_raise(s->irq); diff --git a/include/hw/misc/aspeed_hace.h b/include/hw/misc/aspeed_hace.h index 94d5ada95f..ead46afda9 100644 --- a/include/hw/misc/aspeed_hace.h +++ b/include/hw/misc/aspeed_hace.h @@ -40,4 +40,10 @@ struct AspeedHACEClass { uint32_t hash_mask; }; =20 +#define ASPEED_HACE_MAX_SG 256 +struct aspeed_sg_list { + uint32_t len; + uint32_t phy_addr; +} __attribute__ ((__packed__)); + #endif /* _ASPEED_HACE_H_ */ --=20 2.25.1 From nobody Sun May 5 05:45:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1616626056; cv=none; d=zohomail.com; s=zohoarc; b=EQH7uQtJGZT4iU/9sSUbrGV9V8YdhMQGlFgzU01E0EG/Ac1gfG6Yy0o2MB+Fltfe23LL66g8EB8R60/lBJrbB78x9vOsAUDPMZM1HTSLb2Ig7bp6VDSXxuQiEFnlA5rZ2Pe6Y+r2QHz5X6lgOlzyk12GY3U0MRsu/BvRbYTerbs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Wed, 24 Mar 2021 22:39:21 +0000 (GMT) Received: from T480-KlausKiwi.localdomain (unknown [9.85.133.239]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 24 Mar 2021 22:39:21 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=1J+AX+sAg8gmsWb0OHWC2KKyjWmYKe14LrGev8yWxtM=; b=KlQYFcSYumjkrurPpnbLYhFLqX/m9SUBhJKf/65SqmdqnGGNmb+1/4ROJO9uwhzZfzWY R0fp9Tznn8B+p+xhBKDRAGEsCGJZKmq1HFzd3566ii9LPnTzJr8ML0V0fii1wuCwhkt0 To/0gfsbXb5fk/PMYszp4aKYJaQDA1lZJOD9Nap7ii/whBJkLhmxStUMjxeWbtV2F21L cToSmsTMMsQyM9ASzwBZf3Tm8GCRMKVroXCJjE7gCwr+CgFZ69NnN9FV5b2h4C4k3sY9 BLmFmI80mBRrP/UMjsgMJbope/P6pWxx2uhqbxtGnfOcE65jPOoo0uyIta4POkqBSuNc Dg== From: Klaus Heinrich Kiwi To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 3/3] tests: Aspeed HACE Scatter-Gather tests Date: Wed, 24 Mar 2021 19:38:46 -0300 Message-Id: <20210324223846.17407-4-klaus@linux.vnet.ibm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> References: <20210324223846.17407-1-klaus@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-03-24_13:2021-03-24, 2021-03-24 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 priorityscore=1501 adultscore=0 impostorscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103240161 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=148.163.156.1; envelope-from=klaus@linux.vnet.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Andrew Jeffery , Klaus Heinrich Kiwi , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Paolo Bonzini , Joel Stanley Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Expand current Aspeed HACE testsuite to also include Scatter-Gather of sha256 and sha512 operations. Signed-off-by: Klaus Heinrich Kiwi --- tests/qtest/aspeed_hace-test.c | 164 ++++++++++++++++++++++++++++++--- 1 file changed, 153 insertions(+), 11 deletions(-) diff --git a/tests/qtest/aspeed_hace-test.c b/tests/qtest/aspeed_hace-test.c index 2b624b6b09..ae3f963449 100644 --- a/tests/qtest/aspeed_hace-test.c +++ b/tests/qtest/aspeed_hace-test.c @@ -35,6 +35,11 @@ #define HACE_HASH_DATA_LEN 0x2c #define HACE_HASH_CMD 0x30 =20 +struct aspeed_sg_list { + uint32_t len; + uint32_t phy_addr; +} __attribute__ ((__packed__)); + /* * Test vector is the ascii "abc" * @@ -63,6 +68,33 @@ static const uint8_t test_result_md5[] =3D { 0x90, 0x01, 0x50, 0x98, 0x3c, 0xd2, 0x4f, 0xb0, 0xd6, 0x96, 0x3f, 0x7d, 0x28, 0xe1, 0x7f, 0x72}; =20 +/* + * The Scatter-Gather Test vector is the ascii "abc" "def" "ghi", broken + * into blocks of 3 characters as shown + * + * Expected results were generated using command line utitiles: + * + * echo -n -e 'abcdefghi' | dd of=3D/tmp/test + * for hash in sha512sum sha256sum; do $hash /tmp/test; done + * + */ +static const uint8_t test_vector_sg1[] =3D {0x61, 0x62, 0x63}; +static const uint8_t test_vector_sg2[] =3D {0x64, 0x65, 0x66}; +static const uint8_t test_vector_sg3[] =3D {0x67, 0x68, 0x69}; + +static const uint8_t test_result_sg_sha512[] =3D { + 0xf2, 0x2d, 0x51, 0xd2, 0x52, 0x92, 0xca, 0x1d, 0x0f, 0x68, 0xf6, 0x9a, + 0xed, 0xc7, 0x89, 0x70, 0x19, 0x30, 0x8c, 0xc9, 0xdb, 0x46, 0xef, 0xb7, + 0x5a, 0x03, 0xdd, 0x49, 0x4f, 0xc7, 0xf1, 0x26, 0xc0, 0x10, 0xe8, 0xad, + 0xe6, 0xa0, 0x0a, 0x0c, 0x1a, 0x5f, 0x1b, 0x75, 0xd8, 0x1e, 0x0e, 0xd5, + 0xa9, 0x3c, 0xe9, 0x8d, 0xc9, 0xb8, 0x33, 0xdb, 0x78, 0x39, 0x24, 0x7b, + 0x1d, 0x9c, 0x24, 0xfe}; + +static const uint8_t test_result_sg_sha256[] =3D { + 0x19, 0xcc, 0x02, 0xf2, 0x6d, 0xf4, 0x3c, 0xc5, 0x71, 0xbc, 0x9e, 0xd7, + 0xb0, 0xc4, 0xd2, 0x92, 0x24, 0xa3, 0xec, 0x22, 0x95, 0x29, 0x22, 0x17, + 0x25, 0xef, 0x76, 0xd0, 0x21, 0xc8, 0x32, 0x6f}; + =20 static void write_regs(QTestState *s, uint32_t base, uint32_t src, uint32_t length, uint32_t out, uint32_t method) @@ -167,28 +199,124 @@ static void test_sha512(const char *machine, const u= int32_t base, test_result_sha512, sizeof(digest)); } =20 +static void test_sha256_sg(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s =3D qtest_init(machine); + + const uint32_t src_addr_1 =3D src_addr + 0x1000000; + const uint32_t src_addr_2 =3D src_addr + 0x2000000; + const uint32_t src_addr_3 =3D src_addr + 0x3000000; + const uint32_t digest_addr =3D src_addr + 0x4000000; + uint8_t digest[32] =3D {0}; + struct aspeed_sg_list array[] =3D { + { sizeof(test_vector_sg1), src_addr_1}, + { sizeof(test_vector_sg2), src_addr_2}, + { sizeof(test_vector_sg3) | 1u << 31, src_addr_3}, + }; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr_1, test_vector_sg1, sizeof(test_vector_sg1)= ); + qtest_memwrite(s, src_addr_2, test_vector_sg2, sizeof(test_vector_sg2)= ); + qtest_memwrite(s, src_addr_3, test_vector_sg3, sizeof(test_vector_sg3)= ); + qtest_memwrite(s, src_addr, array, sizeof(array)); + + write_regs(s, base, src_addr, + (sizeof(test_vector_sg1) + + sizeof(test_vector_sg2) + + sizeof(test_vector_sg3)), + digest_addr, HACE_ALGO_SHA256 | HACE_SG_EN); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sg_sha256, sizeof(digest)); +} + +static void test_sha512_sg(const char *machine, const uint32_t base, + const uint32_t src_addr) +{ + QTestState *s =3D qtest_init(machine); + + const uint32_t src_addr_1 =3D src_addr + 0x1000000; + const uint32_t src_addr_2 =3D src_addr + 0x2000000; + const uint32_t src_addr_3 =3D src_addr + 0x3000000; + const uint32_t digest_addr =3D src_addr + 0x4000000; + uint8_t digest[64] =3D {0}; + struct aspeed_sg_list array[] =3D { + { sizeof(test_vector_sg1), src_addr_1}, + { sizeof(test_vector_sg2), src_addr_2}, + { sizeof(test_vector_sg3) | 1u << 31, src_addr_3}, + }; + + /* Check engine is idle, no busy or irq bits set */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0); + + /* Write test vector into memory */ + qtest_memwrite(s, src_addr_1, test_vector_sg1, sizeof(test_vector_sg1)= ); + qtest_memwrite(s, src_addr_2, test_vector_sg2, sizeof(test_vector_sg2)= ); + qtest_memwrite(s, src_addr_3, test_vector_sg3, sizeof(test_vector_sg3)= ); + qtest_memwrite(s, src_addr, array, sizeof(array)); + + write_regs(s, base, src_addr, + (sizeof(test_vector_sg1) + + sizeof(test_vector_sg2) + + sizeof(test_vector_sg3)), + digest_addr, HACE_ALGO_SHA512 | HACE_SG_EN); + + /* Check hash IRQ status is asserted */ + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0x00000200); + + /* Clear IRQ status and check status is deasserted */ + qtest_writel(s, base + HACE_STS, 0x00000200); + g_assert_cmphex(qtest_readl(s, base + HACE_STS), =3D=3D, 0); + + /* Read computed digest from memory */ + qtest_memread(s, digest_addr, digest, sizeof(digest)); + + /* Check result of computation */ + g_assert_cmpmem(digest, sizeof(digest), + test_result_sg_sha512, sizeof(digest)); +} + struct masks { - uint32_t src; + uint32_t src_direct; + uint32_t src_sg; uint32_t dest; uint32_t len; }; =20 static const struct masks ast2600_masks =3D { - .src =3D 0x7fffffff, - .dest =3D 0x7ffffff8, - .len =3D 0x0fffffff, + .src_direct =3D 0x7fffffff, + .src_sg =3D 0x7ffffff8, + .dest =3D 0x7ffffff8, + .len =3D 0x0fffffff, }; =20 static const struct masks ast2500_masks =3D { - .src =3D 0x3fffffff, - .dest =3D 0x3ffffff8, - .len =3D 0x0fffffff, + .src_direct =3D 0x3fffffff, + .src_sg =3D 0x0, /* SG mode not supported */ + .dest =3D 0x3ffffff8, + .len =3D 0x0fffffff, }; =20 static const struct masks ast2400_masks =3D { - .src =3D 0x0fffffff, - .dest =3D 0x0ffffff8, - .len =3D 0x0fffffff, + .src_direct =3D 0x0fffffff, + .src_sg =3D 0x0, /* SG mode not supported */ + .dest =3D 0x0ffffff8, + .len =3D 0x0fffffff, }; =20 static void test_addresses(const char *machine, const uint32_t base, @@ -208,7 +336,8 @@ static void test_addresses(const char *machine, const u= int32_t base, =20 /* Check that the address masking is correct */ qtest_writel(s, base + HACE_HASH_SRC, 0xffffffff); - g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), =3D=3D, expected= ->src); + g_assert_cmphex(qtest_readl(s, base + HACE_HASH_SRC), =3D=3D, + expected->src_direct); =20 qtest_writel(s, base + HACE_HASH_DIGEST, 0xffffffff); g_assert_cmphex(qtest_readl(s, base + HACE_HASH_DIGEST), =3D=3D, expec= ted->dest); @@ -238,11 +367,21 @@ static void test_sha256_ast2600(void) test_sha256("-machine ast2600-evb", 0x1e6d0000, 0x80000000); } =20 +static void test_sha256_sg_ast2600(void) +{ + test_sha256_sg("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + static void test_sha512_ast2600(void) { test_sha512("-machine ast2600-evb", 0x1e6d0000, 0x80000000); } =20 +static void test_sha512_sg_ast2600(void) +{ + test_sha512_sg("-machine ast2600-evb", 0x1e6d0000, 0x80000000); +} + static void test_addresses_ast2600(void) { test_addresses("-machine ast2600-evb", 0x1e6d0000, &ast2600_masks); @@ -299,6 +438,9 @@ int main(int argc, char **argv) qtest_add_func("ast2600/hace/sha256", test_sha256_ast2600); qtest_add_func("ast2600/hace/md5", test_md5_ast2600); =20 + qtest_add_func("ast2600/hace/sha512_sg", test_sha512_sg_ast2600); + qtest_add_func("ast2600/hace/sha256_sg", test_sha256_sg_ast2600); + qtest_add_func("ast2500/hace/addresses", test_addresses_ast2500); qtest_add_func("ast2500/hace/sha512", test_sha512_ast2500); qtest_add_func("ast2500/hace/sha256", test_sha256_ast2500); --=20 2.25.1