From nobody Wed Nov 19 13:56:55 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1616008166; cv=none; d=zohomail.com; s=zohoarc; b=N/WAh+3kDri4RK2JhdiWRs4SLAvVGCfQGASynvFOBHyA1w7D4em74sXst0zQJb7PCPmHJwqWVUy0HPU5PI4cgy1L+GubO1buc00m18UPJPTHrvcAvXa8JtQb0HIOIxMyfXBRcM/LUXDowGL205asO1cjEFB+KhNZ3IxumPxkWzI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1616008166; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=MdVh9mkrxFaXu/43VLQADikvtUwthlEbmSFAqCBpMTQ=; b=D4ZRZnFHmuHIL3z7agVqnuy0lauBeE6m8k3TKbkBpEQ8W8X63JOMmU53j4KRvU78IgXHb0AktpQgWaiUieyySY/xazsEW+4UExZ7qXE5WDOXM9pepYqslHfrrftKVC0zZzP6lH520qE+bkBISOu/OK4pj7bDJTIe7Fx2OWEJuQQ= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1616008166087215.3944402897613; Wed, 17 Mar 2021 12:09:26 -0700 (PDT) Received: from localhost ([::1]:38114 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lMbXo-0002ud-SU for importer@patchew.org; Wed, 17 Mar 2021 15:09:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39928) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMaxB-0004aV-EC for qemu-devel@nongnu.org; Wed, 17 Mar 2021 14:31:34 -0400 Received: from mx2.suse.de ([195.135.220.15]:48798) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMaws-0007un-2P for qemu-devel@nongnu.org; Wed, 17 Mar 2021 14:31:32 -0400 Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 82070AE5C; Wed, 17 Mar 2021 18:30:38 +0000 (UTC) X-Virus-Scanned: by amavisd-new at test-mx.suse.de From: Claudio Fontana To: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [RFC v9 50/50] target/arm: refactor arm_cpu_finalize_features into cpu64 Date: Wed, 17 Mar 2021 19:30:13 +0100 Message-Id: <20210317183013.25772-51-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210317183013.25772-1-cfontana@suse.de> References: <20210317183013.25772-1-cfontana@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" all the features in arm_cpu_finalize_features are actually TARGET_AARCH64-only, since KVM is now only supported on 64bit. Therefore move the function to cpu64, and rename it to aarch64_cpu_finalize_features. Signed-off-by: Claudio Fontana --- target/arm/cpu.h | 3 +- target/arm/kvm/kvm_arm.h | 5 ++-- target/arm/cpu.c | 65 ++++++++++------------------------------ target/arm/cpu64.c | 25 ++++++++++++++++ target/arm/kvm/kvm64.c | 7 +++-- target/arm/monitor.c | 8 +++-- 6 files changed, 54 insertions(+), 59 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e9cfb99ad9..99c03fd6b4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1036,6 +1036,7 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f,= CPUState *cs, #ifdef TARGET_AARCH64 int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); +bool aarch64_cpu_finalize_features(ARMCPU *cpu, Error **errp); =20 static inline bool is_a64(CPUARMState *env) { @@ -2096,8 +2097,6 @@ static inline int arm_feature(CPUARMState *env, int f= eature) return (env->features & (1ULL << feature)) !=3D 0; } =20 -void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp); - #if !defined(CONFIG_USER_ONLY) /* Return true if exception levels below EL3 are in secure state, * or would be following an exception return to that level. diff --git a/target/arm/kvm/kvm_arm.h b/target/arm/kvm/kvm_arm.h index 34f8daa377..5c0d58f527 100644 --- a/target/arm/kvm/kvm_arm.h +++ b/target/arm/kvm/kvm_arm.h @@ -275,7 +275,7 @@ void kvm_arm_add_vcpu_properties(Object *obj); * Validate the kvm-steal-time property selection and set its default * based on KVM support and guest configuration. */ -void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp); +bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp); =20 /** * kvm_arm_steal_time_supported: @@ -436,9 +436,10 @@ static inline void kvm_arm_pvtime_init(CPUState *cs, u= int64_t ipa) g_assert_not_reached(); } =20 -static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +static inline bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) { g_assert_not_reached(); + return false; } =20 static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index cf4676e52c..1c95f958fd 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -23,7 +23,6 @@ #include "target/arm/idau.h" #include "qapi/error.h" #include "cpu.h" -#include "cpu-sve.h" #include "cpregs.h" =20 #ifdef CONFIG_TCG @@ -826,40 +825,6 @@ static void arm_cpu_finalizefn(Object *obj) #endif } =20 -void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) -{ - Error *local_err =3D NULL; - -#ifdef TARGET_AARCH64 - if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { - if (!cpu_sve_finalize_features(cpu, &local_err)) { - error_propagate(errp, local_err); - return; - } - - /* - * KVM does not support modifications to this feature. - * We have not registered the cpu properties when KVM - * is in use, so the user will not be able to set them. - */ - if (tcg_enabled()) { - if (!cpu_pauth_finalize(cpu, &local_err)) { - error_propagate(errp, local_err); - return; - } - } - } -#endif /* TARGET_AARCH64 */ - - if (kvm_enabled()) { - kvm_arm_steal_time_finalize(cpu, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - } -} - static void arm_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -882,22 +847,22 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) return; } =20 - arm_cpu_finalize_features(cpu, &local_err); - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - return; - } - - if (arm_feature(env, ARM_FEATURE_AARCH64) && - cpu->has_vfp !=3D cpu->has_neon) { - /* - * This is an architectural requirement for AArch64; AArch32 is - * more flexible and permits VFP-no-Neon and Neon-no-VFP. - */ - error_setg(errp, - "AArch64 CPUs must have both VFP and Neon or neither"); - return; +#ifdef TARGET_AARCH64 + if (arm_feature(env, ARM_FEATURE_AARCH64)) { + if (!aarch64_cpu_finalize_features(cpu, errp)) { + return; + } + if (cpu->has_vfp !=3D cpu->has_neon) { + /* + * This is an architectural requirement for AArch64; AArch32 is + * more flexible and permits VFP-no-Neon and Neon-no-VFP. + */ + error_setg(errp, + "AArch64 CPUs must have both VFP and Neon or neithe= r"); + return; + } } +#endif /* TARGET_AARCH64 */ =20 if (!cpu->has_vfp) { uint64_t t; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 9bc5ddfc09..d67c0b1be4 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -22,6 +22,8 @@ #include "qapi/error.h" #include "qemu/qemu-print.h" #include "cpu.h" +#include "cpu-sve.h" +#include "tcg/cpu-pauth.h" #include "cpu-exceptions-aa64.h" #include "qemu/module.h" #include "sysemu/tcg.h" @@ -454,6 +456,29 @@ static gchar *aarch64_gdb_arch_name(CPUState *cs) return g_strdup("aarch64"); } =20 +bool aarch64_cpu_finalize_features(ARMCPU *cpu, Error **errp) +{ + if (!cpu_sve_finalize_features(cpu, errp)) { + return false; + } + if (tcg_enabled()) { + /* + * KVM does not support modifications to this feature. + * We have not registered the cpu properties when KVM + * is in use, so the user will not be able to set them. + */ + if (!cpu_pauth_finalize(cpu, errp)) { + return false; + } + } + if (kvm_enabled()) { + if (!kvm_arm_steal_time_finalize(cpu, errp)) { + return false; + } + } + return true; +} + static void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) { ARMCPU *cpu =3D ARM_CPU(cs); diff --git a/target/arm/kvm/kvm64.c b/target/arm/kvm/kvm64.c index b34642e74c..372957331b 100644 --- a/target/arm/kvm/kvm64.c +++ b/target/arm/kvm/kvm64.c @@ -677,7 +677,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *= ahcf) return true; } =20 -void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) +bool kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) { bool has_steal_time =3D kvm_arm_steal_time_supported(); =20 @@ -691,7 +691,7 @@ void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **e= rrp) if (!has_steal_time) { error_setg(errp, "'kvm-steal-time' cannot be enabled " "on this host"); - return; + return false; } else if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { /* * DEN0057A chapter 2 says "This specification only covers @@ -702,9 +702,10 @@ void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **= errp) */ error_setg(errp, "'kvm-steal-time' cannot be enabled " "for AArch32 guests"); - return; + return false; } } + return true; } =20 bool kvm_arm_aarch32_supported(void) diff --git a/target/arm/monitor.c b/target/arm/monitor.c index 0c72bf7c31..8a31c4dd04 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -184,9 +184,11 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(C= puModelExpansionType type, if (!err) { visit_check_struct(visitor, &err); } +#ifdef TARGET_AARCH64 if (!err) { - arm_cpu_finalize_features(ARM_CPU(obj), &err); + aarch64_cpu_finalize_features(ARM_CPU(obj), &err); } +#endif /* TARGET_AARCH64 */ visit_end_struct(visitor, NULL); visit_free(visitor); if (err) { @@ -195,7 +197,9 @@ CpuModelExpansionInfo *qmp_query_cpu_model_expansion(Cp= uModelExpansionType type, return NULL; } } else { - arm_cpu_finalize_features(ARM_CPU(obj), &error_abort); +#ifdef TARGET_AARCH64 + aarch64_cpu_finalize_features(ARM_CPU(obj), &error_abort); +#endif /* TARGET_AARCH64 */ } =20 expansion_info =3D g_new0(CpuModelExpansionInfo, 1); --=20 2.26.2