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Mon, 15 Mar 2021 21:42:30 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PULL 2/5] hw/intc: add goldfish-pic Date: Mon, 15 Mar 2021 21:42:23 +0100 Message-Id: <20210315204226.3481044-3-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210315204226.3481044-1-laurent@vivier.eu> References: <20210315204226.3481044-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:2XVZ7KG0V4S3m6FA5bLx1btb3/kU9IAu9uKrRdzGqjD96/fFglG WkoJ9gAXfVD5v4LME0B1mpWp4Y8IZbIelREEhaZOWbqNnr+/Vf63vrjwmifr8cJ5VVfHbod RHDwbvX1F+jKKU8sBfsKj3Foy1dGYf73WLAULOK/HaPJyN9gKVdGCaoArYneSkrBcvh67Oy YF4rsIyl95PRvmFVstxjg== X-UI-Out-Filterresults: notjunk:1;V03:K0:1ddkabmc0nA=:HHBCfDe4T8i6fq1XGkc8oA I/8puqTWlSYo3LeU5pi9ZD6115WwFuWbQM67wsYRMlck5kk337Ht4zauGMonw6h6y5kJCVG4F 9a6tns+Jr33pU1qilIMdqMY38ROSiNjHUUpT7ps9406hLFdXffsEgb0/1bkZYld4LSPyBe1Ek 0cnnsx2pMIsS9H6q2tktHYcOfeUGVp89dE2bcWfrlurPzk6vNN3yGjvl4qkUM/2rOzka4yxMv XSzMT9kOeg96IgX3BQ61gKM2Tv9i5LAVqhzl//PC6Rnz3Ft3kWZNAlSEFVla+Em0cWqDmcN0x lUl8IvyyHEASPp2g5hKgE/stmFrdpGK9EtH8NYvuNIqmBuNpN7c/LimzIKfzBYP2AIlHQbYOH luMg2MXy94/BJeNFblWbzKytR80KgmCG6XHd9bLEUd4CUZZzPCLgDpdKEiqRV Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=217.72.192.75; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Implement the goldfish pic device as defined in https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDF= ISH-VIRTUAL-HARDWARE.TXT Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210312214145.2936082-3-laurent@vivier.eu> --- include/hw/intc/goldfish_pic.h | 33 +++++ hw/intc/goldfish_pic.c | 219 +++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 3 + hw/intc/meson.build | 1 + hw/intc/trace-events | 8 ++ 5 files changed, 264 insertions(+) create mode 100644 include/hw/intc/goldfish_pic.h create mode 100644 hw/intc/goldfish_pic.c diff --git a/include/hw/intc/goldfish_pic.h b/include/hw/intc/goldfish_pic.h new file mode 100644 index 000000000000..ad13ab37fc3e --- /dev/null +++ b/include/hw/intc/goldfish_pic.h @@ -0,0 +1,33 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * Goldfish PIC + * + * (c) 2020 Laurent Vivier + * + */ + +#ifndef HW_INTC_GOLDFISH_PIC_H +#define HW_INTC_GOLDFISH_PIC_H + +#define TYPE_GOLDFISH_PIC "goldfish_pic" +OBJECT_DECLARE_SIMPLE_TYPE(GoldfishPICState, GOLDFISH_PIC) + +#define GOLDFISH_PIC_IRQ_NB 32 + +struct GoldfishPICState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + qemu_irq irq; + + uint32_t pending; + uint32_t enabled; + + /* statistics */ + uint64_t stats_irq_count[32]; + /* for tracing */ + uint8_t idx; +}; + +#endif diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c new file mode 100644 index 000000000000..e3b43a69f163 --- /dev/null +++ b/hw/intc/goldfish_pic.c @@ -0,0 +1,219 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * Goldfish PIC + * + * (c) 2020 Laurent Vivier + * + */ + +#include "qemu/osdep.h" +#include "hw/irq.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "migration/vmstate.h" +#include "monitor/monitor.h" +#include "qemu/log.h" +#include "trace.h" +#include "hw/intc/intc.h" +#include "hw/intc/goldfish_pic.h" + +/* registers */ + +enum { + REG_STATUS =3D 0x00, + REG_IRQ_PENDING =3D 0x04, + REG_IRQ_DISABLE_ALL =3D 0x08, + REG_DISABLE =3D 0x0c, + REG_ENABLE =3D 0x10, +}; + +static bool goldfish_pic_get_statistics(InterruptStatsProvider *obj, + uint64_t **irq_counts, + unsigned int *nb_irqs) +{ + GoldfishPICState *s =3D GOLDFISH_PIC(obj); + + *irq_counts =3D s->stats_irq_count; + *nb_irqs =3D ARRAY_SIZE(s->stats_irq_count); + return true; +} + +static void goldfish_pic_print_info(InterruptStatsProvider *obj, Monitor *= mon) +{ + GoldfishPICState *s =3D GOLDFISH_PIC(obj); + monitor_printf(mon, "goldfish-pic.%d: pending=3D0x%08x enabled=3D0x%08= x\n", + s->idx, s->pending, s->enabled); +} + +static void goldfish_pic_update(GoldfishPICState *s) +{ + if (s->pending & s->enabled) { + qemu_irq_raise(s->irq); + } else { + qemu_irq_lower(s->irq); + } +} + +static void goldfish_irq_request(void *opaque, int irq, int level) +{ + GoldfishPICState *s =3D opaque; + + trace_goldfish_irq_request(s, s->idx, irq, level); + + if (level) { + s->pending |=3D 1 << irq; + s->stats_irq_count[irq]++; + } else { + s->pending &=3D ~(1 << irq); + } + goldfish_pic_update(s); +} + +static uint64_t goldfish_pic_read(void *opaque, hwaddr addr, + unsigned size) +{ + GoldfishPICState *s =3D opaque; + uint64_t value =3D 0; + + switch (addr) { + case REG_STATUS: + /* The number of pending interrupts (0 to 32) */ + value =3D ctpop32(s->pending & s->enabled); + break; + case REG_IRQ_PENDING: + /* The pending interrupt mask */ + value =3D s->pending & s->enabled; + break; + default: + qemu_log_mask(LOG_UNIMP, + "%s: unimplemented register read 0x%02"HWADDR_PRIx"\= n", + __func__, addr); + break; + } + + trace_goldfish_pic_read(s, s->idx, addr, size, value); + + return value; +} + +static void goldfish_pic_write(void *opaque, hwaddr addr, + uint64_t value, unsigned size) +{ + GoldfishPICState *s =3D opaque; + + trace_goldfish_pic_write(s, s->idx, addr, size, value); + + switch (addr) { + case REG_IRQ_DISABLE_ALL: + s->enabled =3D 0; + s->pending =3D 0; + break; + case REG_DISABLE: + s->enabled &=3D ~value; + break; + case REG_ENABLE: + s->enabled |=3D value; + break; + default: + qemu_log_mask(LOG_UNIMP, + "%s: unimplemented register write 0x%02"HWADDR_PRIx"= \n", + __func__, addr); + break; + } + goldfish_pic_update(s); +} + +static const MemoryRegionOps goldfish_pic_ops =3D { + .read =3D goldfish_pic_read, + .write =3D goldfish_pic_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid.max_access_size =3D 4, + .impl.min_access_size =3D 4, + .impl.max_access_size =3D 4, +}; + +static void goldfish_pic_reset(DeviceState *dev) +{ + GoldfishPICState *s =3D GOLDFISH_PIC(dev); + int i; + + trace_goldfish_pic_reset(s, s->idx); + s->pending =3D 0; + s->enabled =3D 0; + + for (i =3D 0; i < ARRAY_SIZE(s->stats_irq_count); i++) { + s->stats_irq_count[i] =3D 0; + } +} + +static void goldfish_pic_realize(DeviceState *dev, Error **errp) +{ + GoldfishPICState *s =3D GOLDFISH_PIC(dev); + + trace_goldfish_pic_realize(s, s->idx); + + memory_region_init_io(&s->iomem, OBJECT(s), &goldfish_pic_ops, s, + "goldfish_pic", 0x24); +} + +static const VMStateDescription vmstate_goldfish_pic =3D { + .name =3D "goldfish_pic", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32(pending, GoldfishPICState), + VMSTATE_UINT32(enabled, GoldfishPICState), + VMSTATE_END_OF_LIST() + } +}; + +static void goldfish_pic_instance_init(Object *obj) +{ + SysBusDevice *dev =3D SYS_BUS_DEVICE(obj); + GoldfishPICState *s =3D GOLDFISH_PIC(obj); + + trace_goldfish_pic_instance_init(s); + + sysbus_init_mmio(dev, &s->iomem); + sysbus_init_irq(dev, &s->irq); + + qdev_init_gpio_in(DEVICE(obj), goldfish_irq_request, GOLDFISH_PIC_IRQ_= NB); +} + +static Property goldfish_pic_properties[] =3D { + DEFINE_PROP_UINT8("index", GoldfishPICState, idx, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static void goldfish_pic_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + InterruptStatsProviderClass *ic =3D INTERRUPT_STATS_PROVIDER_CLASS(oc); + + dc->reset =3D goldfish_pic_reset; + dc->realize =3D goldfish_pic_realize; + dc->vmsd =3D &vmstate_goldfish_pic; + ic->get_statistics =3D goldfish_pic_get_statistics; + ic->print_info =3D goldfish_pic_print_info; + device_class_set_props(dc, goldfish_pic_properties); +} + +static const TypeInfo goldfish_pic_info =3D { + .name =3D TYPE_GOLDFISH_PIC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .class_init =3D goldfish_pic_class_init, + .instance_init =3D goldfish_pic_instance_init, + .instance_size =3D sizeof(GoldfishPICState), + .interfaces =3D (InterfaceInfo[]) { + { TYPE_INTERRUPT_STATS_PROVIDER }, + { } + }, +}; + +static void goldfish_pic_register_types(void) +{ + type_register_static(&goldfish_pic_info); +} + +type_init(goldfish_pic_register_types) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index 66bf0b90b47a..186cb5daa0ff 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -67,3 +67,6 @@ config SIFIVE_CLINT =20 config SIFIVE_PLIC bool + +config GOLDFISH_PIC + bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 8df3656419e3..5fcb923dd13e 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -57,3 +57,4 @@ specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('x= ics_spapr.c', 'spapr_xi specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) +specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.= c')) diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 45ddaf48df8e..c9ab17234b44 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -239,3 +239,11 @@ xive_end_source_read(uint8_t end_blk, uint32_t end_idx= , uint64_t addr) "END 0x%x =20 # pnv_xive.c pnv_xive_ic_hw_trigger(uint64_t addr, uint64_t val) "@0x%"PRIx64" val=3D0x= %"PRIx64 + +# goldfish_pic.c +goldfish_irq_request(void *dev, int idx, int irq, int level) "pic: %p gold= fish-irq.%d irq: %d level: %d" +goldfish_pic_read(void *dev, int idx, unsigned int addr, unsigned int size= , uint64_t value) "pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%"= PRIx64 +goldfish_pic_write(void *dev, int idx, unsigned int addr, unsigned int siz= e, uint64_t value) "pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%= "PRIx64 +goldfish_pic_reset(void *dev, int idx) "pic: %p goldfish-irq.%d" +goldfish_pic_realize(void *dev, int idx) "pic: %p goldfish-irq.%d" +goldfish_pic_instance_init(void *dev) "pic: %p goldfish-irq" --=20 2.29.2