From nobody Mon Nov 17 03:41:20 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1615585397; cv=none; d=zohomail.com; s=zohoarc; b=jpnIslvp7kVC4LrLJ2XmKWct39Yp+2DRteU6E+j44TRdoLKjL88F5JcNmD/E1o5Za8OnmunjrdeFI+yHSB5+BcCteHBWJvlxg733By8h8qDuSRDKAPVisu4thmHwGUvDrplFW97bIrsh3dwQLhTjoWH0hd2dgJ5VUzkP290kIqk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615585397; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YJz7weH3J7KpD8YihuVL4lVj3RUKcEtuZ3m4Tch9yR8=; b=XlXlNW2NQut3Y7Toeo+d6tYS/HnZXSCyZGF9amm80qEiFmkrSY5ziRM2YCFlk6VxPYgC894RvWk1lx3d3ZBOYH6sx/QJGTAqDPiDoUGW/cchVmaaaKDLcHKDxanO2rk+wNPH8PTY1VO+/lCowG+B3w9HIxamzFoACJCkSqJL4Vk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615585397318501.49140480546214; Fri, 12 Mar 2021 13:43:17 -0800 (PST) Received: from localhost ([::1]:56140 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKpYy-0005AK-2h for importer@patchew.org; Fri, 12 Mar 2021 16:43:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:41426) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKpXo-0003r5-Oj for qemu-devel@nongnu.org; Fri, 12 Mar 2021 16:42:04 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:60153) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKpXk-0008C9-Lw for qemu-devel@nongnu.org; Fri, 12 Mar 2021 16:42:04 -0500 Received: from localhost.localdomain ([82.142.6.26]) by mrelayeu.kundenserver.de (mreue109 [212.227.15.183]) with ESMTPSA (Nemesis) id 1M2fDl-1lIvCZ1yD1-004CJE; Fri, 12 Mar 2021 22:41:52 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Subject: [PATCH v8 3/5] m68k: add an interrupt controller Date: Fri, 12 Mar 2021 22:41:43 +0100 Message-Id: <20210312214145.2936082-4-laurent@vivier.eu> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210312214145.2936082-1-laurent@vivier.eu> References: <20210312214145.2936082-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:INSxLxe5n1IRSLcxfSSCnBsXWLT5rMHgJ2dqryt9PD62O+T42JU Y/Ds0A9ZhIzW/JSXarmAiZLoD0n1P/b1AicGM3XaPiR1FLL2QMyMKLCJslDFGMtuw2j+G8f ZkVr/akHS3kjFXUQz/vHoBsDHX+coNG+yD+cB+Rsl5qPkbzepmcffoclmmpXwU9HMyQ0pff ltxUprFxFYemuQ9i1hHgw== X-UI-Out-Filterresults: notjunk:1;V03:K0:SQbeCl9fFtY=:gpYeN8qF7sq+fzxKZ0EEc7 6CkiIU2+MjPtJ9WDFZKMOrwv8lBOEdZywFkwe5ZY0kiiaAuc3JI93l7gbTJMraH7hVGO59XcJ ucLlC3I1/b3NpmBkD170jf4VnB5Id+6PF8FMy/Y6YyJPPOm6rIfBU4Abhjv2octLq3Nhibe8/ IgQrrpQX3K9JSlVu1VYUHok2A1396OCTTGpH+YHnIwIFLoxBySZtEq3Vg7BIYGX18iErmq+ck mtbIl18xzBVDYPWpPYKU59V0jNkP/viatl4+b3VRmoFCmss2fI3/4sF6EYvRrKiOGzLY84bC8 jiFfiIzkQrVcvhJ7VkIyWJ0NaaIvFz/pmlDpaDZfpbc2yVGKnnRuTS+air2GodNfKvpZ5aFTw SW2C7FjHAXkBHpHHNGdKE7MivIr7xXsI1IGScwJGL1qlWMvRUpIUrPFsEA8dewe4Oz+9e5UM3 sj/34+SYAQ== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=217.72.192.75; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" A (generic) copy of the GLUE device we already have for q800 to use with the m68k-virt machine. The q800 one would disappear in the future as q800 uses actually the djMEMC controller. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/intc/m68k_irqc.h | 41 +++++++++++++ hw/intc/m68k_irqc.c | 119 ++++++++++++++++++++++++++++++++++++ hw/intc/Kconfig | 3 + hw/intc/meson.build | 1 + 4 files changed, 164 insertions(+) create mode 100644 include/hw/intc/m68k_irqc.h create mode 100644 hw/intc/m68k_irqc.c diff --git a/include/hw/intc/m68k_irqc.h b/include/hw/intc/m68k_irqc.h new file mode 100644 index 000000000000..dbcfcfc2e000 --- /dev/null +++ b/include/hw/intc/m68k_irqc.h @@ -0,0 +1,41 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * QEMU Motorola 680x0 IRQ Controller + * + * (c) 2020 Laurent Vivier + * + */ + +#ifndef M68K_IRQC_H +#define M68K_IRQC_H + +#include "hw/sysbus.h" + +#define TYPE_M68K_IRQC "m68k-irq-controller" +#define M68K_IRQC(obj) OBJECT_CHECK(M68KIRQCState, (obj), \ + TYPE_M68K_IRQC) + +#define M68K_IRQC_AUTOVECTOR_BASE 25 + +enum { + M68K_IRQC_LEVEL_1 =3D 0, + M68K_IRQC_LEVEL_2, + M68K_IRQC_LEVEL_3, + M68K_IRQC_LEVEL_4, + M68K_IRQC_LEVEL_5, + M68K_IRQC_LEVEL_6, + M68K_IRQC_LEVEL_7, +}; +#define M68K_IRQC_LEVEL_NUM (M68K_IRQC_LEVEL_7 - M68K_IRQC_LEVEL_1 + 1) + +typedef struct M68KIRQCState { + SysBusDevice parent_obj; + + uint8_t ipr; + + /* statistics */ + uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM]; +} M68KIRQCState; + +#endif diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c new file mode 100644 index 000000000000..2133d2a698ab --- /dev/null +++ b/hw/intc/m68k_irqc.c @@ -0,0 +1,119 @@ +/* + * SPDX-License-Identifer: GPL-2.0-or-later + * + * QEMU Motorola 680x0 IRQ Controller + * + * (c) 2020 Laurent Vivier + * + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "migration/vmstate.h" +#include "monitor/monitor.h" +#include "hw/nmi.h" +#include "hw/intc/intc.h" +#include "hw/intc/m68k_irqc.h" + + +static bool m68k_irqc_get_statistics(InterruptStatsProvider *obj, + uint64_t **irq_counts, unsigned int *= nb_irqs) +{ + M68KIRQCState *s =3D M68K_IRQC(obj); + + *irq_counts =3D s->stats_irq_count; + *nb_irqs =3D ARRAY_SIZE(s->stats_irq_count); + return true; +} + +static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon) +{ + M68KIRQCState *s =3D M68K_IRQC(obj); + monitor_printf(mon, "m68k-irqc: ipr=3D0x%x\n", s->ipr); +} + +static void m68k_set_irq(void *opaque, int irq, int level) +{ + M68KIRQCState *s =3D opaque; + M68kCPU *cpu =3D M68K_CPU(first_cpu); + int i; + + if (level) { + s->ipr |=3D 1 << irq; + s->stats_irq_count[irq]++; + } else { + s->ipr &=3D ~(1 << irq); + } + + for (i =3D M68K_IRQC_LEVEL_7; i >=3D M68K_IRQC_LEVEL_1; i--) { + if ((s->ipr >> i) & 1) { + m68k_set_irq_level(cpu, i + 1, i + M68K_IRQC_AUTOVECTOR_BASE); + return; + } + } + m68k_set_irq_level(cpu, 0, 0); +} + +static void m68k_irqc_reset(DeviceState *d) +{ + M68KIRQCState *s =3D M68K_IRQC(d); + int i; + + s->ipr =3D 0; + for (i =3D 0; i < ARRAY_SIZE(s->stats_irq_count); i++) { + s->stats_irq_count[i] =3D 0; + } +} + +static void m68k_irqc_instance_init(Object *obj) +{ + qdev_init_gpio_in(DEVICE(obj), m68k_set_irq, M68K_IRQC_LEVEL_NUM); +} + +static void m68k_nmi(NMIState *n, int cpu_index, Error **errp) +{ + m68k_set_irq(n, M68K_IRQC_LEVEL_7, 1); +} + +static const VMStateDescription vmstate_m68k_irqc =3D { + .name =3D "m68k-irqc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(ipr, M68KIRQCState), + VMSTATE_END_OF_LIST() + } +}; + +static void m68k_irqc_class_init(ObjectClass *oc, void *data) + { + DeviceClass *dc =3D DEVICE_CLASS(oc); + NMIClass *nc =3D NMI_CLASS(oc); + InterruptStatsProviderClass *ic =3D INTERRUPT_STATS_PROVIDER_CLASS(oc); + + nc->nmi_monitor_handler =3D m68k_nmi; + dc->reset =3D m68k_irqc_reset; + dc->vmsd =3D &vmstate_m68k_irqc; + ic->get_statistics =3D m68k_irqc_get_statistics; + ic->print_info =3D m68k_irqc_print_info; +} + +static const TypeInfo m68k_irqc_type_info =3D { + .name =3D TYPE_M68K_IRQC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(M68KIRQCState), + .instance_init =3D m68k_irqc_instance_init, + .class_init =3D m68k_irqc_class_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_NMI }, + { TYPE_INTERRUPT_STATS_PROVIDER }, + { } + }, +}; + +static void q800_irq_register_types(void) +{ + type_register_static(&m68k_irqc_type_info); +} + +type_init(q800_irq_register_types); diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index 186cb5daa0ff..f4694088a483 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -70,3 +70,6 @@ config SIFIVE_PLIC =20 config GOLDFISH_PIC bool + +config M68K_IRQC + bool diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 5fcb923dd13e..1c299039f650 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -58,3 +58,4 @@ specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive= .c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.= c')) +specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) --=20 2.29.2