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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id m6sm7964994wrv.73.2021.03.12.05.51.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Mar 2021 05:51:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7YfKL+QT2RIAfcsCmY4W1T45mDb3n37lzR7TWySDUmM=; b=zYaff7ejN8izGBM31pRcTn27Vn5nIiFmwN5+LCtGF5c8Kf23mWbam8t3jKhGYGnXDv gfeL3yg+Pi4J+tfB1c4E8LuaiqLr1drTLie/5q6Z7h7VvbjFVN4EULY56uPu31QeIMeZ bi1/hkaRnGFr45SXUhRvrhRHleJ70epetd7I2NOOIy1nYlZ5KG8P4PHTMrBWRU+agyn7 urLeQ4YZTd9/utWxPXbhfbj/s6MpOEMsUrZNKDAsiPA7ZSnMTWq/8fiXB2UTR6YmKKw/ m8vrK/RvQ5PbBrsAQxO37cbA35jMRJEmCJDg2+nGqKWrBdtUf4aQVALvL8evLWE62fiM JrcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7YfKL+QT2RIAfcsCmY4W1T45mDb3n37lzR7TWySDUmM=; b=HgtmxWm/1LS5mnc3oNxRbSw3/I2OLTUnrIKMdZ1aFhDmHLrYewdK2woeSHd98JhuEX i/FqJnPTvIjWqFMF3cwADwL9JjKkmOsgs7xMYZ/2Ut9MX69cYuWSSvkNDOB3oO4NBtgw WD1cNV4lqKNU+UclSbPz9AzUeSVnIntYy2EzQ6vMQV8QBJcwkss9GEotmMw2xa0rEYAJ wEtlecRnlMUGHbX22PdDP1chgdTfHkb+PD269VPCvI30hxWh13zKpeYxwVHfN8p9rx5G 9au1eihC2OO1rS1FjelZzfav7YBv3hw0i/QtraGA5HGw17uJ01nftJ+YyEZJXrXZrLR7 agtA== X-Gm-Message-State: AOAM530qOIccKVwp82CXFGOpooWQPJI2m8bavfFeFMfleQ4NxwXqGZer jyTeWYBaFkjtU20Th8bhiEYdE8zchmefy0X+ X-Google-Smtp-Source: ABdhPJzaX8ddCPTDJH5dsYmBDj37pGu3jD+jJ8VZWxleS8f5g7zEbF36DEEvBrkIwsqeOomsTXEUSQ== X-Received: by 2002:adf:df10:: with SMTP id y16mr14191448wrl.372.1615557112129; Fri, 12 Mar 2021 05:51:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/39] target/arm: Update BRKA, BRKB, BRKN for PREDDESC Date: Fri, 12 Mar 2021 13:51:15 +0000 Message-Id: <20210312135140.1099-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210312135140.1099-1-peter.maydell@linaro.org> References: <20210312135140.1099-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Content-Type: text/plain; charset="utf-8" From: Richard Henderson Since b64ee454a4a0, all predicate operations should be using these field macros for predicates. Signed-off-by: Richard Henderson Message-id: 20210309155305.11301-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/sve_helper.c | 30 ++++++++++++++---------------- target/arm/translate-sve.c | 4 ++-- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index 224c767944c..8e0a5d30a53 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -2710,7 +2710,7 @@ static uint32_t do_zero(ARMPredicateReg *d, intptr_t = oprsz) void HELPER(sve_brkpa)(void *vd, void *vn, void *vm, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (last_active_pred(vn, vg, oprsz)) { compute_brk_z(vd, vm, vg, oprsz, true); } else { @@ -2721,7 +2721,7 @@ void HELPER(sve_brkpa)(void *vd, void *vn, void *vm, = void *vg, uint32_t HELPER(sve_brkpas)(void *vd, void *vn, void *vm, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (last_active_pred(vn, vg, oprsz)) { return compute_brks_z(vd, vm, vg, oprsz, true); } else { @@ -2732,7 +2732,7 @@ uint32_t HELPER(sve_brkpas)(void *vd, void *vn, void = *vm, void *vg, void HELPER(sve_brkpb)(void *vd, void *vn, void *vm, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (last_active_pred(vn, vg, oprsz)) { compute_brk_z(vd, vm, vg, oprsz, false); } else { @@ -2743,7 +2743,7 @@ void HELPER(sve_brkpb)(void *vd, void *vn, void *vm, = void *vg, uint32_t HELPER(sve_brkpbs)(void *vd, void *vn, void *vm, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (last_active_pred(vn, vg, oprsz)) { return compute_brks_z(vd, vm, vg, oprsz, false); } else { @@ -2753,56 +2753,55 @@ uint32_t HELPER(sve_brkpbs)(void *vd, void *vn, voi= d *vm, void *vg, =20 void HELPER(sve_brka_z)(void *vd, void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); compute_brk_z(vd, vn, vg, oprsz, true); } =20 uint32_t HELPER(sve_brkas_z)(void *vd, void *vn, void *vg, uint32_t pred_d= esc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); return compute_brks_z(vd, vn, vg, oprsz, true); } =20 void HELPER(sve_brkb_z)(void *vd, void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); compute_brk_z(vd, vn, vg, oprsz, false); } =20 uint32_t HELPER(sve_brkbs_z)(void *vd, void *vn, void *vg, uint32_t pred_d= esc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); return compute_brks_z(vd, vn, vg, oprsz, false); } =20 void HELPER(sve_brka_m)(void *vd, void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); compute_brk_m(vd, vn, vg, oprsz, true); } =20 uint32_t HELPER(sve_brkas_m)(void *vd, void *vn, void *vg, uint32_t pred_d= esc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); return compute_brks_m(vd, vn, vg, oprsz, true); } =20 void HELPER(sve_brkb_m)(void *vd, void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); compute_brk_m(vd, vn, vg, oprsz, false); } =20 uint32_t HELPER(sve_brkbs_m)(void *vd, void *vn, void *vg, uint32_t pred_d= esc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); return compute_brks_m(vd, vn, vg, oprsz, false); } =20 void HELPER(sve_brkn)(void *vd, void *vn, void *vg, uint32_t pred_desc) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; - + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (!last_active_pred(vn, vg, oprsz)) { do_zero(vd, oprsz); } @@ -2827,8 +2826,7 @@ static uint32_t predtest_ones(ARMPredicateReg *d, int= ptr_t oprsz, =20 uint32_t HELPER(sve_brkns)(void *vd, void *vn, void *vg, uint32_t pred_des= c) { - intptr_t oprsz =3D extract32(pred_desc, 0, SIMD_OPRSZ_BITS) + 2; - + intptr_t oprsz =3D FIELD_EX32(pred_desc, PREDDESC, OPRSZ); if (last_active_pred(vn, vg, oprsz)) { return predtest_ones(vd, oprsz, -1); } else { diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index cac8082156a..c0212e6b08a 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -2850,7 +2850,7 @@ static bool do_brk3(DisasContext *s, arg_rprr_s *a, TCGv_ptr n =3D tcg_temp_new_ptr(); TCGv_ptr m =3D tcg_temp_new_ptr(); TCGv_ptr g =3D tcg_temp_new_ptr(); - TCGv_i32 t =3D tcg_const_i32(vsz - 2); + TCGv_i32 t =3D tcg_const_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz)); =20 tcg_gen_addi_ptr(d, cpu_env, pred_full_reg_offset(s, a->rd)); tcg_gen_addi_ptr(n, cpu_env, pred_full_reg_offset(s, a->rn)); @@ -2884,7 +2884,7 @@ static bool do_brk2(DisasContext *s, arg_rpr_s *a, TCGv_ptr d =3D tcg_temp_new_ptr(); TCGv_ptr n =3D tcg_temp_new_ptr(); TCGv_ptr g =3D tcg_temp_new_ptr(); - TCGv_i32 t =3D tcg_const_i32(vsz - 2); + TCGv_i32 t =3D tcg_const_i32(FIELD_DP32(0, PREDDESC, OPRSZ, vsz)); =20 tcg_gen_addi_ptr(d, cpu_env, pred_full_reg_offset(s, a->rd)); tcg_gen_addi_ptr(n, cpu_env, pred_full_reg_offset(s, a->rn)); --=20 2.20.1