From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473760; cv=none; d=zohomail.com; s=zohoarc; b=VBRPKkjXjGl3IceCjvQwyCwwPp8igmcyAAw33bfYn0b+nOaSbSGxXBuWM6KmyboaflwzKAv2Z50euILGdSTsLyQd8HrOKnLagCzqPGzzDoSeyqsreg+fSPXLGHO9o2easOUcANw0o6aMVMfHhgCeeHC1/i2fDS+DwpyaLSLcNjA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473760; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Gdsri8NtLGIq10NLJyptLqzIl0zCgbJ5tQAy5aBqD2o=; b=NaoNTuwrfmVtTqwmNan9gSRvSeBwTrJ4p76TSyGq1vJKRLxWWPvU/GOgZKR2mdVb30E034Z4D19lREX027pzTBLrxYPc9CtxHGDpX4tLJlH7LhYz6MTo3IByNzCIEG1Owj1wLDEm5Ecn6eLRPt1cdvDjmQHFT6xnTWTYMaN3A2Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473760067234.41812024771127; Thu, 11 Mar 2021 06:42:40 -0800 (PST) Received: from localhost ([::1]:44714 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMWM-0004ty-1M for importer@patchew.org; Thu, 11 Mar 2021 09:42:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39432) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTs-0002zW-SP for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:04 -0500 Received: from mail-qk1-x735.google.com ([2607:f8b0:4864:20::735]:43906) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTr-00069J-4j for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:04 -0500 Received: by mail-qk1-x735.google.com with SMTP id b130so20745639qkc.10 for ; Thu, 11 Mar 2021 06:40:02 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Gdsri8NtLGIq10NLJyptLqzIl0zCgbJ5tQAy5aBqD2o=; b=zEQ/ApxMVC6i5ceftR5Lfwc4QvOVIhDxNlMRPhESeQVBc2u+E7jJdgGC3zN76rIGbK eHCKiiCW3IvgbYZ6FqP1qyJ8GQdZlhYQ2qsXthYvxQnsN9BRi3blCn5XzeVI3TM9rW/0 LpCkoewhl39CFSpcoj1pODctQD7MYTSQIDFM1oA2Mr4MXAKkd1KM8gAotjps5Qju3mIO ZAmHzZ+cKPvr9qQaV8tGmZwizDmO+Zc/3UdZ8ImvEpBSm8mJgW/CWmEQXi3FGNX5ramX dP9JX5FyudJkOhXOC1HPjRo9RPZtDrdNfGs8supTmW9lWuS2k605/zfJ86TuTXQWUcwQ GmrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Gdsri8NtLGIq10NLJyptLqzIl0zCgbJ5tQAy5aBqD2o=; b=e5k/gBOvgbzCVxGcXJnn+fRWFmWjvSBhpuFC3G7CjbxNAqkgXMkvOyNCSwSEjBh6WI x725d1VFY4ItBLQifUXxQxXoZHs/nk3idSh7rG+Ue6/U0PKA+gONQU3Rqkn/Ee8Aompv Dop8ugvENxB4TfDYVL8NZGsWs9XH7+xcs/bPGVsu0yjcG2+ZQpOR8IqpovGGFpk2J7Oh VdCVyAgfPdJGNbI1P+uSjoq7rSDVjqW6vBqcY/EK04EmTPXg5YZ+wRcwzgr2AkCxdT6k pB68yT3QhAHEW50Kj3gIET1TazVEY3Gn9myL9ntAazHvocU1v37wFovDXeU35TS1ySlI O00w== X-Gm-Message-State: AOAM5318EGivNR39N6FwHYvfBiXnRB4cxbq6JwgZX1IXcMhSRMuxAg0R jCfW1DVZtV8Jt8oEni3ZIxUSHo5TAmhsMlQA X-Google-Smtp-Source: ABdhPJx7s3E0gaWeUlB1sqAkDKLO1O9E6fjGm+k9/IWzzthdBeMi5x/dUVRZ2tcuu8/iocGFYRWcNg== X-Received: by 2002:a37:4d86:: with SMTP id a128mr7743491qkb.115.1615473602205; Thu, 11 Mar 2021 06:40:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 01/57] tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64 Date: Thu, 11 Mar 2021 08:39:02 -0600 Message-Id: <20210311143958.562625-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::735; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x735.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" These operations are always available under different names: INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove no code with the ifdef. Signed-off-by: Richard Henderson Reviewed-by: Stefan Weil Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 3ccd30c39c..6a0bdf028b 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -774,17 +774,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, continue; } break; -#if TCG_TARGET_HAS_ext32s_i64 case INDEX_op_ext32s_i64: -#endif case INDEX_op_ext_i32_i64: t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1); break; -#if TCG_TARGET_HAS_ext32u_i64 case INDEX_op_ext32u_i64: -#endif case INDEX_op_extu_i32_i64: t0 =3D *tb_ptr++; t1 =3D tci_read_r(regs, &tb_ptr); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473764; cv=none; d=zohomail.com; s=zohoarc; b=NN/5YRPqKzVc0JnDXgCRtVff/vlYtsNLQQLpE9xCiqu+quAva0+cZW1KNllD+I3OxlxzaZ4fHFc6LRyCayL7clPjOQnx7YqY7GO43H1dXjHE5hBAFnZFW4OBDLbu95Qi/e8+bQPD9fqFBJUa3C2PDxjd9YXPBI4c/p2vpXdsQKw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473764; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=HbTxBt2WPdzVO5wl5gS1nGoA2iunBjuWMOYCOEc7KuY=; b=T47jrB+p2w4HLh8LlzwxvlI2q+hC1bXhGUv3lpFD6bZ1lJrC/qaw8bFQCJfWdy45S88mW3mNFMgpgh8/CNADjQDCwdxZM4tBFQdkt1sNjimDRajUojAhD0oKZq7DyVXcinet9HFTYFg245lCCgSuHD+3WNbebWYYTa/s9JprrSo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473764785351.30511231863284; Thu, 11 Mar 2021 06:42:44 -0800 (PST) Received: from localhost ([::1]:45188 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMWR-000567-FD for importer@patchew.org; Thu, 11 Mar 2021 09:42:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39458) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTu-00030M-Qo for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:06 -0500 Received: from mail-qt1-x82d.google.com ([2607:f8b0:4864:20::82d]:38465) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTs-0006A6-Es for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:06 -0500 Received: by mail-qt1-x82d.google.com with SMTP id j7so1264344qtx.5 for ; Thu, 11 Mar 2021 06:40:04 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HbTxBt2WPdzVO5wl5gS1nGoA2iunBjuWMOYCOEc7KuY=; b=bwogEFAKXoqSrhKNhE3ulHVdj6Jx3yCepqcR650a5lSAswIMyIYo+q3NfGcvr8evIE yIbVrhyTh9uQESBVYLzcRebsOLsiAIUR1RwgDne2+GYwjyUX4m50gI4CPN8ctiy2dhyn mq+s2fUyWiKKfRc47X8FO1ZiWBbhPN1DUkivhgEBvVxmcHZOTWHYsFbECH+8Az/HPpEX ndNHEzlUuW+AnGeY9mEzv2HobG5V90qWL+dEkn5i42BLypsqwd7r50jXY/ELSjkYt/5N BSecFgMiOldEEf/LU2g13t6IqBrfw1kqKznn3rpduNwwwPKzBsE5FCm76o8sGqfXlhsd nTEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HbTxBt2WPdzVO5wl5gS1nGoA2iunBjuWMOYCOEc7KuY=; b=sT4FKmOwzWaEKLOFsGby4mD1VcemzcZk7kralkxVCqBQEZtj8sd1Jf6djDBh4pbmV9 oH9DaPJ2aXWSjY6tAueHNmqK2WLruk16FTd0xf4/SWSeweIbpNcHvNpGoPp/Fl2aQMUm 6Ut2d3OCRNBpSV3OUU69xUrSpDCiiskJKR2W2Mb+MwM7wCCIkMQecmgY0H7jzJBy+dIv xgagDXDbM8IFy8I0rC4xwL0qWcWeTfkNu2F2lBjlXltfmYPPj/iDpzd7loD/egWoicrv PdIF5y2zTZrquX66U1zlu1TbHGsf6HTGPF4AhnhkhWQAH7L4NxKD3JYoFru4nMGLsMmY ULtA== X-Gm-Message-State: AOAM532OWFaqjwgYqGF92SKk13X7+i/bIppwF8JQFl0p4OvoLH+INoPi ahiTut7Ds4XdltTuxAnmsZGsFs7r6z342/Wk X-Google-Smtp-Source: ABdhPJzZdH6zXRpF/1GEl5kk+rk1zC7+ggglR/hblAhsEEN36CNsc3A23SX+zXvE/WG0Fyyn3TJBFg== X-Received: by 2002:a05:622a:81:: with SMTP id o1mr7397178qtw.63.1615473603451; Thu, 11 Mar 2021 06:40:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 02/57] tcg/tci: Rename tci_read_r to tci_read_rval Date: Thu, 11 Mar 2021 08:39:03 -0600 Message-Id: <20210311143958.562625-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82d; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" In the next patches, we want to use tci_read_r to return the raw register number. So rename the existing function, which returns the register value, to tci_read_rval. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 192 +++++++++++++++++++++++++++--------------------------- 1 file changed, 96 insertions(+), 96 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 6a0bdf028b..6d6a5510da 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -119,7 +119,7 @@ static uint64_t tci_read_i64(const uint8_t **tb_ptr) =20 /* Read indexed register (native size) from bytecode. */ static tcg_target_ulong -tci_read_r(const tcg_target_ulong *regs, const uint8_t **tb_ptr) +tci_read_rval(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { tcg_target_ulong value =3D tci_read_reg(regs, **tb_ptr); *tb_ptr +=3D 1; @@ -131,15 +131,15 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_= t **tb_ptr) static uint64_t tci_read_r64(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { - uint32_t low =3D tci_read_r(regs, tb_ptr); - return tci_uint64(tci_read_r(regs, tb_ptr), low); + uint32_t low =3D tci_read_rval(regs, tb_ptr); + return tci_uint64(tci_read_rval(regs, tb_ptr), low); } #elif TCG_TARGET_REG_BITS =3D=3D 64 /* Read indexed register (64 bit) from bytecode. */ static uint64_t tci_read_r64(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { - return tci_read_r(regs, tb_ptr); + return tci_read_rval(regs, tb_ptr); } #endif =20 @@ -147,9 +147,9 @@ static uint64_t tci_read_r64(const tcg_target_ulong *re= gs, static target_ulong tci_read_ulong(const tcg_target_ulong *regs, const uint8_t **tb_ptr) { - target_ulong taddr =3D tci_read_r(regs, tb_ptr); + target_ulong taddr =3D tci_read_rval(regs, tb_ptr); #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - taddr +=3D (uint64_t)tci_read_r(regs, tb_ptr) << 32; + taddr +=3D (uint64_t)tci_read_rval(regs, tb_ptr) << 32; #endif return taddr; } @@ -365,8 +365,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, continue; case INDEX_op_setcond_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); condition =3D *tb_ptr++; tci_write_reg(regs, t0, tci_compare32(t1, t2, condition)); break; @@ -381,15 +381,15 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, #elif TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_setcond_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); condition =3D *tb_ptr++; tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); break; #endif CASE_32_64(mov) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1); break; case INDEX_op_tci_movi_i32: @@ -402,51 +402,51 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 CASE_32_64(ld8u) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); break; CASE_32_64(ld8s) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); break; CASE_32_64(ld16u) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); break; CASE_32_64(ld16s) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(int16_t *)(t1 + t2)); break; case INDEX_op_ld_i32: CASE_64(ld32u) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); break; CASE_32_64(st8) - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint8_t *)(t1 + t2) =3D t0; break; CASE_32_64(st16) - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint16_t *)(t1 + t2) =3D t0; break; case INDEX_op_st_i32: CASE_64(st32) - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint32_t *)(t1 + t2) =3D t0; break; @@ -455,38 +455,38 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 CASE_32_64(add) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 + t2); break; CASE_32_64(sub) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 - t2); break; CASE_32_64(mul) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 * t2); break; CASE_32_64(and) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 & t2); break; CASE_32_64(or) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 | t2); break; CASE_32_64(xor) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 ^ t2); break; =20 @@ -494,26 +494,26 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_div_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2); break; case INDEX_op_divu_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2); break; case INDEX_op_rem_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2); break; case INDEX_op_remu_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2); break; =20 @@ -521,41 +521,41 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_shl_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1 << (t2 & 31)); break; case INDEX_op_shr_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1 >> (t2 & 31)); break; case INDEX_op_sar_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1 >> (t2 & 31)); break; #if TCG_TARGET_HAS_rot_i32 case INDEX_op_rotl_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, rol32(t1, t2 & 31)); break; case INDEX_op_rotr_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, ror32(t1, t2 & 31)); break; #endif #if TCG_TARGET_HAS_deposit_i32 case INDEX_op_deposit_i32: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tmp16 =3D *tb_ptr++; tmp8 =3D *tb_ptr++; tmp32 =3D (((1 << tmp8) - 1) << tmp16); @@ -563,8 +563,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i32: - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); condition =3D *tb_ptr++; label =3D tci_read_label(&tb_ptr); if (tci_compare32(t0, t1, condition)) { @@ -602,64 +602,64 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, case INDEX_op_mulu2_i32: t0 =3D *tb_ptr++; t1 =3D *tb_ptr++; - t2 =3D tci_read_r(regs, &tb_ptr); - tmp64 =3D (uint32_t)tci_read_r(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); + tmp64 =3D (uint32_t)tci_read_rval(regs, &tb_ptr); tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64); break; #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 CASE_32_64(ext8s) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int8_t)t1); break; #endif #if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 CASE_32_64(ext16s) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int16_t)t1); break; #endif #if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64 CASE_32_64(ext8u) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint8_t)t1); break; #endif #if TCG_TARGET_HAS_ext16u_i32 || TCG_TARGET_HAS_ext16u_i64 CASE_32_64(ext16u) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint16_t)t1); break; #endif #if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 CASE_32_64(bswap16) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, bswap16(t1)); break; #endif #if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64 CASE_32_64(bswap32) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, bswap32(t1)); break; #endif #if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64 CASE_32_64(not) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, ~t1); break; #endif #if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64 CASE_32_64(neg) t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, -t1); break; #endif @@ -674,19 +674,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_ld32s_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(int32_t *)(t1 + t2)); break; case INDEX_op_ld_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); break; case INDEX_op_st_i64: - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); t2 =3D tci_read_s32(&tb_ptr); *(uint64_t *)(t1 + t2) =3D t0; break; @@ -695,26 +695,26 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_div_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int64_t)t1 / (int64_t)t2); break; case INDEX_op_divu_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint64_t)t1 / (uint64_t)t2); break; case INDEX_op_rem_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int64_t)t1 % (int64_t)t2); break; case INDEX_op_remu_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2); break; =20 @@ -722,41 +722,41 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_shl_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 << (t2 & 63)); break; case INDEX_op_shr_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, t1 >> (t2 & 63)); break; case INDEX_op_sar_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, ((int64_t)t1 >> (t2 & 63))); break; #if TCG_TARGET_HAS_rot_i64 case INDEX_op_rotl_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, rol64(t1, t2 & 63)); break; case INDEX_op_rotr_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, ror64(t1, t2 & 63)); break; #endif #if TCG_TARGET_HAS_deposit_i64 case INDEX_op_deposit_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); - t2 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); + t2 =3D tci_read_rval(regs, &tb_ptr); tmp16 =3D *tb_ptr++; tmp8 =3D *tb_ptr++; tmp64 =3D (((1ULL << tmp8) - 1) << tmp16); @@ -764,8 +764,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i64: - t0 =3D tci_read_r(regs, &tb_ptr); - t1 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); condition =3D *tb_ptr++; label =3D tci_read_label(&tb_ptr); if (tci_compare64(t0, t1, condition)) { @@ -777,19 +777,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, case INDEX_op_ext32s_i64: case INDEX_op_ext_i32_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (int32_t)t1); break; case INDEX_op_ext32u_i64: case INDEX_op_extu_i32_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, (uint32_t)t1); break; #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: t0 =3D *tb_ptr++; - t1 =3D tci_read_r(regs, &tb_ptr); + t1 =3D tci_read_rval(regs, &tb_ptr); tci_write_reg(regs, t0, bswap64(t1)); break; #endif @@ -896,7 +896,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, } break; case INDEX_op_qemu_st_i32: - t0 =3D tci_read_r(regs, &tb_ptr); + t0 =3D tci_read_rval(regs, &tb_ptr); taddr =3D tci_read_ulong(regs, &tb_ptr); oi =3D tci_read_i(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473886; cv=none; d=zohomail.com; s=zohoarc; b=Qgs+ybTBNAl2MZ4c4mHsWXdWFVx0wK3J4J3EmYPkAamObapaR8yW4fOw+o6a/JNt+CxmW3ZX9QFfE4MkHUWJjQut1cTtCkCpdz32UKZ/jNEPvUYULbgVGXVX4uz4Hyjh99NjuYgwnGMWYHSxTRHJcl0ALBFokJ24Eu4qZDtPT4Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473886; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=37vrLTjOf1a+ywG8JRaN/eT08mH7//Hhw6kYDqN5YOo=; b=Wkn4qsA3FUtDeGCylx0JYYlNwsVXfJia55VpBbDplNzzakDSTeCVKK4gUXPhmR8Js7VOs8lSNPYvDs10/Zdbdr6bSOtmopvZpPQlsbNgRvPMMSBz3Wh9sPSg2ZmD2dILqLkyxw4LpbPWb9DkJJ+0+0caRJgLeUVFcCD6iy/zETY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473886934993.1575482390763; Thu, 11 Mar 2021 06:44:46 -0800 (PST) Received: from localhost ([::1]:53576 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMYP-00007B-Mg for importer@patchew.org; Thu, 11 Mar 2021 09:44:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTw-000324-Ey for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:08 -0500 Received: from mail-qk1-x736.google.com ([2607:f8b0:4864:20::736]:38979) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTt-0006Av-FI for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:08 -0500 Received: by mail-qk1-x736.google.com with SMTP id g185so20786356qkf.6 for ; Thu, 11 Mar 2021 06:40:05 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=37vrLTjOf1a+ywG8JRaN/eT08mH7//Hhw6kYDqN5YOo=; b=dNG2YDn/1miDCPrYKmOuDh9d2GqYsi1XZoshQB8o/CbS0v6t2KhMapuhRKlce9bTZS Ms2AEB/UsFN1LY9z/X+HAa5OunK3/yb8tXH6UdyhB5evOLEDM9KKhz/pVHyYCzuxrQZP ZzzEnYNvisr6wEnbF1caHRYNn5J4RmzDdC8NHZUw/YsQzodhb8E3w/viTuF/N5EI+5Ob 9+QZXvNuQOAFwhG6p6lYH+MbJDBXdUwuYj4UVn8+I5Otb/2Dh74SPZ34+a+UycFMs11F d+yGmh1+wrU5iQMs8PSN4f399NM+mAAs/bKt8stl5YtB143QKPTTX+Ht0Pa152jbmi/A uMmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=37vrLTjOf1a+ywG8JRaN/eT08mH7//Hhw6kYDqN5YOo=; b=DZwKXsFMDZCiDWr2pK88QHHk8vqzRIrrPQmo/iPpaicjK8LTl4SvhtnfD9Xp4lH6GD 0eHrGFnEjGV/ef+26N3R85NShlTOSMr3vvXyDzfUKzuCn1oaVrG+gjD1zb24FIK2Voac 2X2xKTj+RWogXM2T707MWZ4v0J0m7S797YYu7Jl1jnmWEVJ0rfY+bZRXjk1c0wQtf2im QV5+S/NChTWr/A6LmdCn8hCtgqY7v8zfjJV4X7c5PEF18MQKeqtXHcs0Xrbf2iLg52zs v9KCLRQJtuaF33QOXhUeE8RVy1d9njDFOOjg5Yu6KlIWLWkb4ehlXyxAyEtwkZS3XJFc O/ww== X-Gm-Message-State: AOAM53366vSt4b0hYXQHqohpKmSlerj3N3kBy7VOZNZP1PpcsQ2/nCVA ERGsq7fdE/U7BRIo1J+CDp2drCkGcDqp02Op X-Google-Smtp-Source: ABdhPJzZxCC9H9AyJMeJE7wYWu2W+PDW7oThrgUYb5lPj8qYxrTEvK03YbRw4PwIAcZ6PqYe5kDhTw== X-Received: by 2002:a37:9c13:: with SMTP id f19mr7928505qke.31.1615473604548; Thu, 11 Mar 2021 06:40:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 03/57] tcg/tci: Split out tci_args_rrs Date: Thu, 11 Mar 2021 08:39:04 -0600 Message-Id: <20210311143958.562625-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::736; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x736.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Begin splitting out functions that do pure argument decode, without actually loading values from the register set. This means that decoding need not concern itself between input and output registers. We can assert that the register number is in range during decode, so that it is safe to simply dereference from regs[] later. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 111 ++++++++++++++++++++++++++++++++---------------------- 1 file changed, 67 insertions(+), 44 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 6d6a5510da..5acf5c38c3 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -83,6 +83,20 @@ static uint64_t tci_uint64(uint32_t high, uint32_t low) } #endif =20 +/* Read constant byte from bytecode. */ +static uint8_t tci_read_b(const uint8_t **tb_ptr) +{ + return *(tb_ptr[0]++); +} + +/* Read register number from bytecode. */ +static TCGReg tci_read_r(const uint8_t **tb_ptr) +{ + uint8_t regno =3D tci_read_b(tb_ptr); + tci_assert(regno < TCG_TARGET_NB_REGS); + return regno; +} + /* Read constant (native size) from bytecode. */ static tcg_target_ulong tci_read_i(const uint8_t **tb_ptr) { @@ -161,6 +175,23 @@ static tcg_target_ulong tci_read_label(const uint8_t *= *tb_ptr) return label; } =20 +/* + * Load sets of arguments all at once. The naming convention is: + * tci_args_ + * where arguments is a sequence of + * + * r =3D register + * s =3D signed ldst offset + */ + +static void tci_args_rrs(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, int32_t *i2) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *i2 =3D tci_read_s32(tb_ptr); +} + static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) { bool result =3D false; @@ -311,6 +342,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint8_t op_size =3D tb_ptr[1]; const uint8_t *old_code_ptr =3D tb_ptr; #endif + TCGReg r0, r1; tcg_target_ulong t0; tcg_target_ulong t1; tcg_target_ulong t2; @@ -325,6 +357,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint64_t v64; #endif TCGMemOpIdx oi; + int32_t ofs; + void *ptr; =20 /* Skip opcode and size entry. */ tb_ptr +=3D 2; @@ -401,54 +435,46 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, /* Load/store operations (32 bit). */ =20 CASE_32_64(ld8u) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint8_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(uint8_t *)ptr; break; CASE_32_64(ld8s) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(int8_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(int8_t *)ptr; break; CASE_32_64(ld16u) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint16_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(uint16_t *)ptr; break; CASE_32_64(ld16s) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(int16_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(int16_t *)ptr; break; case INDEX_op_ld_i32: CASE_64(ld32u) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(uint32_t *)ptr; break; CASE_32_64(st8) - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - *(uint8_t *)(t1 + t2) =3D t0; + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + *(uint8_t *)ptr =3D regs[r0]; break; CASE_32_64(st16) - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - *(uint16_t *)(t1 + t2) =3D t0; + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + *(uint16_t *)ptr =3D regs[r0]; break; case INDEX_op_st_i32: CASE_64(st32) - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - *(uint32_t *)(t1 + t2) =3D t0; + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + *(uint32_t *)ptr =3D regs[r0]; break; =20 /* Arithmetic operations (mixed 32/64 bit). */ @@ -673,22 +699,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, /* Load/store operations (64 bit). */ =20 case INDEX_op_ld32s_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(int32_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(int32_t *)ptr; break; case INDEX_op_ld_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - tci_write_reg(regs, t0, *(uint64_t *)(t1 + t2)); + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + regs[r0] =3D *(uint64_t *)ptr; break; case INDEX_op_st_i64: - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_s32(&tb_ptr); - *(uint64_t *)(t1 + t2) =3D t0; + tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + ptr =3D (void *)(regs[r1] + ofs); + *(uint64_t *)ptr =3D regs[r0]; break; =20 /* Arithmetic operations (64 bit). */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474113; cv=none; d=zohomail.com; s=zohoarc; b=MbITz7tV1j+NuPrAe2Hh3iv88znDrfSnfRH8y5p+qwIorf5Ujq2bFdk1qA7zIuLoyZR/HIpeir9zax+8U4jZHVTPiW3u3kGfPzETd5ZRYJySSiuTUDNrlX1GeEpvg4OQ+K1vDCOoYLljiqs0x7NJW9vjGD1yyhPc4TUBqzSuAMk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474113; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6sBjD/Gklksw/pC9kJWfSGVfQExpOAv9Sf85vKHjqp4=; b=n6OWXy2fjwMnmMwFXMmZH+VruXlZBWd4oXHK98xKSoEqijrklB8ucX8YyfWSS7ss/UOQCwpmaWCsRl1yy4ccqN6m7No8psjdoWCEZZY3dJXY7pi0Zz5XAxfLRjCdPUB5ZKgnjQv44Y+gQHJP9HbICoz7/2M9PUzgZ3DOuXx1JCw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474113304411.9823046914885; Thu, 11 Mar 2021 06:48:33 -0800 (PST) Received: from localhost ([::1]:34164 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMc3-00040R-Oa for importer@patchew.org; Thu, 11 Mar 2021 09:48:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39486) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTw-00032I-J6 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:08 -0500 Received: from mail-qk1-x72f.google.com ([2607:f8b0:4864:20::72f]:36367) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTu-0006Bh-LH for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:08 -0500 Received: by mail-qk1-x72f.google.com with SMTP id n79so20782517qke.3 for ; Thu, 11 Mar 2021 06:40:06 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6sBjD/Gklksw/pC9kJWfSGVfQExpOAv9Sf85vKHjqp4=; b=KUUVTIjErqZ5IMtgdbdq+s81Wp9hkUCyhtWHhaW8Zy/QB9ay7j/I9TX4S6ouGAmErg fzOwtgKFPtXM7sUCady0GQ1HCogDqNgI2lKyqfy/2qOqeqCiiTO/WuMjWTdSdRk4zUH+ 8CQkyTflUk/jkoAGqwmEFahQdhtuyry+7IFUSw/S+wLn2qLXAZqVYDJIA+yNst+84v5j uQFpuWfUBetATNn588cj9o5EZEoRbdv42aVf8iatS5faeHI2n/wmdibvhCMVs6b6ovAY /sEmdyTH1LIW7OLxC1iZoHDRXMhQqzBkX+u5n7v2F/zQhsZ8ZWvS+h35zjmT4kqU2uwn vXwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6sBjD/Gklksw/pC9kJWfSGVfQExpOAv9Sf85vKHjqp4=; b=bxAn5EWeWv8gQNbtTtDDJETuhskR30axLuvomM/EZ99l1gMmMJFKfcfCc0XgsE8GjA 6u9V42LkPbMl4ByqCI5wy22vO0gGwiNNLgYU3CYIPkP1hsBy2/W2IoRGv1Rsx3BoBMtC zyuCJETaxanXIR8zY9ChPztum8DOO361nKBWPQ59B8AqOyxA0OA5s38fGbuESQ/MFkQN GzftIl8KEKILT0kQp42Xm33cNz+WoYG58okRmLCJyImfhGqxX7CTQpCnht10ra8mSbpy P7H0jxA8D9nwX/iE/Gi+QNeEp8H0XVj5pAYnCxR7Wk8okgyG/jBIyvg//3QyhG2neOhH 8Hww== X-Gm-Message-State: AOAM5319MG/aBJXFV0lroStmFcsTHvX2itiRKm04nF3MAgcAjW8R/1Gz k9YAf35XuJFI2upwlqOlgr89E+sUiQh9UyJs X-Google-Smtp-Source: ABdhPJzVo2FjY7XXZGL/rEZ4E2w635YUM6PMLA/zqyNNeIq0Z3Nb89ThbBX4kpCxbOzITcjGAm59tA== X-Received: by 2002:a05:620a:133b:: with SMTP id p27mr8105211qkj.382.1615473605694; Thu, 11 Mar 2021 06:40:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 04/57] tcg/tci: Split out tci_args_rr Date: Thu, 11 Mar 2021 08:39:05 -0600 Message-Id: <20210311143958.562625-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72f; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 67 +++++++++++++++++++++++++------------------------------ 1 file changed, 31 insertions(+), 36 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 5acf5c38c3..e5aba3a9fa 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -184,6 +184,13 @@ static tcg_target_ulong tci_read_label(const uint8_t *= *tb_ptr) * s =3D signed ldst offset */ =20 +static void tci_args_rr(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); +} + static void tci_args_rrs(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, int32_t *i2) { @@ -422,9 +429,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif CASE_32_64(mov) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D regs[r1]; break; case INDEX_op_tci_movi_i32: t0 =3D *tb_ptr++; @@ -635,58 +641,50 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 CASE_32_64(ext8s) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int8_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (int8_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 CASE_32_64(ext16s) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int16_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (int16_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64 CASE_32_64(ext8u) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint8_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (uint8_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext16u_i32 || TCG_TARGET_HAS_ext16u_i64 CASE_32_64(ext16u) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint16_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (uint16_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 CASE_32_64(bswap16) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, bswap16(t1)); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D bswap16(regs[r1]); break; #endif #if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64 CASE_32_64(bswap32) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, bswap32(t1)); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D bswap32(regs[r1]); break; #endif #if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64 CASE_32_64(not) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, ~t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D ~regs[r1]; break; #endif #if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64 CASE_32_64(neg) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, -t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D -regs[r1]; break; #endif #if TCG_TARGET_REG_BITS =3D=3D 64 @@ -799,21 +797,18 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; case INDEX_op_ext32s_i64: case INDEX_op_ext_i32_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int32_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (int32_t)regs[r1]; break; case INDEX_op_ext32u_i64: case INDEX_op_extu_i32_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint32_t)t1); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D (uint32_t)regs[r1]; break; #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, bswap64(t1)); + tci_args_rr(&tb_ptr, &r0, &r1); + regs[r0] =3D bswap64(regs[r1]); break; #endif #endif /* TCG_TARGET_REG_BITS =3D=3D 64 */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473766; cv=none; d=zohomail.com; s=zohoarc; b=Zmy7yD746TVeildNrytqnUOXgWFXkm6rhK7Lwfhluwnf5OcwZVWAF/qkpIXQoiISlM0j40WoD3WRhQxQu/cGRA489SoBMedVj5QntsPfjFBVrduelVSd3eARDv3O5h8B6YXSN0BugbztrTAueQpKCdUOB1apxeRj8IqZWgCxc5E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473766; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=JTYpj8j1BDaPmAY+nQ2t8wqeA00FmJJ79xXvarenAZc=; b=nCYObJQkIReoQCAUsXKduoYvo5RXan7Tl99r1QUnstGopNEvvZDT9mO7iXL4GrDZi2iYQ73HwzabIn5z2++Yeo3ZdxBj80GHQaKUeKkH8Wths+RWfer7/k/pP+IRPD5SK7iSJ3sUH7N1u0uPF4LTzvgnSwK5hLN2gNlxxRllba4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473766739695.6503368169307; Thu, 11 Mar 2021 06:42:46 -0800 (PST) Received: from localhost ([::1]:45368 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMWS-0005Aa-Sr for importer@patchew.org; Thu, 11 Mar 2021 09:42:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTy-00034X-9V for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:10 -0500 Received: from mail-qt1-x836.google.com ([2607:f8b0:4864:20::836]:37815) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTw-0006Cm-0h for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:09 -0500 Received: by mail-qt1-x836.google.com with SMTP id f12so1265871qtq.4 for ; Thu, 11 Mar 2021 06:40:07 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JTYpj8j1BDaPmAY+nQ2t8wqeA00FmJJ79xXvarenAZc=; b=X8m8lbesjyIXrNYg85ChhA/GhauhMirBifsoPuU4u0qNsA/RFhJRZ9hfovf/4uPQ6t mTwWgrYD/+vONd/TWM5z9Qqt//oecAabCN8fTXm4KuJPIxk9Ql3n4DyFVKmGLQSLSx1L AivDhH6pMZ7q+tHbCbiVc+G7DU/qO+MzIyJ4qEi9wSox+zgdgrib29OV3FZR8I1UKf2x E3MWpNGlv75vUbAIjFI007pVG27fViYiTTYJNR6wHgmcgvkNNIV89XswUU/FMyOk7g+2 xN70x3dmT6QBsOmq5w24GIrGii4+t8YDl0N+YxpY5Fy1B4C5oDr3upsizIn0NL3qPL4t oDeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JTYpj8j1BDaPmAY+nQ2t8wqeA00FmJJ79xXvarenAZc=; b=fYSS36RYw8z0vmu+qWLR4vTodtzofwM8Oy/6rOcPUyg+8zW7kRYDXOj96q8S0chPZQ 3fPWzywyZouMzQuCa3+U1kZ4kgafOChmadHcYFK67/yaf3NDw1sxwUOL63vAF7zk6v0X MoxADlLlxZBR0xu0Y1N0tiE+puWbpv179bOy1WuJoovGn9Jw64obFqj+mZqno09KhFNI coM7HJrv7hue6WLyt/CZvwJVYs3InSph5BB3vZs66VQ5ICzKkeNK2GiAunsdkJaG99mD 9juG2cuxgFze0DL1Ep/TJvj5nUplNQNw5yOQQm3Rbu2I4GoS4Tw3SaLpWRidzV8gwxEk nw0Q== X-Gm-Message-State: AOAM533OhzVr2j4Ms+Pjo/1Ey1jAyMD+ALvCuKgAlV2HsuI32DgMKuN/ yyX4rZjPlzeItdmdZVyQFbxfb0rDZJ8Rx7Md X-Google-Smtp-Source: ABdhPJzghvzWMARL21njnYLuzlC+oYSvunZCsOTOWAeKvLd7APuypr9E0zbPD6ZsaS/EPhHD4dmpcw== X-Received: by 2002:ac8:3981:: with SMTP id v1mr7510924qte.183.1615473606870; Thu, 11 Mar 2021 06:40:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 05/57] tcg/tci: Split out tci_args_rrr Date: Thu, 11 Mar 2021 08:39:06 -0600 Message-Id: <20210311143958.562625-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::836; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x836.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 154 ++++++++++++++++++++---------------------------------- 1 file changed, 57 insertions(+), 97 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index e5aba3a9fa..1c879a2536 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -191,6 +191,14 @@ static void tci_args_rr(const uint8_t **tb_ptr, *r1 =3D tci_read_r(tb_ptr); } =20 +static void tci_args_rrr(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGReg *r2) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); +} + static void tci_args_rrs(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, int32_t *i2) { @@ -349,7 +357,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint8_t op_size =3D tb_ptr[1]; const uint8_t *old_code_ptr =3D tb_ptr; #endif - TCGReg r0, r1; + TCGReg r0, r1, r2; tcg_target_ulong t0; tcg_target_ulong t1; tcg_target_ulong t2; @@ -486,101 +494,71 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchS= tate *env, /* Arithmetic operations (mixed 32/64 bit). */ =20 CASE_32_64(add) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 + t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] + regs[r2]; break; CASE_32_64(sub) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 - t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] - regs[r2]; break; CASE_32_64(mul) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 * t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] * regs[r2]; break; CASE_32_64(and) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 & t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] & regs[r2]; break; CASE_32_64(or) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 | t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] | regs[r2]; break; CASE_32_64(xor) - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 ^ t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] ^ regs[r2]; break; =20 /* Arithmetic operations (32 bit). */ =20 case INDEX_op_div_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int32_t)t1 / (int32_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int32_t)regs[r1] / (int32_t)regs[r2]; break; case INDEX_op_divu_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint32_t)t1 / (uint32_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint32_t)regs[r1] / (uint32_t)regs[r2]; break; case INDEX_op_rem_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int32_t)t1 % (int32_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int32_t)regs[r1] % (int32_t)regs[r2]; break; case INDEX_op_remu_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint32_t)t1 % (uint32_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint32_t)regs[r1] % (uint32_t)regs[r2]; break; =20 /* Shift/rotate operations (32 bit). */ =20 case INDEX_op_shl_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint32_t)t1 << (t2 & 31)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint32_t)regs[r1] << (regs[r2] & 31); break; case INDEX_op_shr_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint32_t)t1 >> (t2 & 31)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint32_t)regs[r1] >> (regs[r2] & 31); break; case INDEX_op_sar_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int32_t)t1 >> (t2 & 31)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int32_t)regs[r1] >> (regs[r2] & 31); break; #if TCG_TARGET_HAS_rot_i32 case INDEX_op_rotl_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, rol32(t1, t2 & 31)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D rol32(regs[r1], regs[r2] & 31); break; case INDEX_op_rotr_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, ror32(t1, t2 & 31)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D ror32(regs[r1], regs[r2] & 31); break; #endif #if TCG_TARGET_HAS_deposit_i32 @@ -715,62 +693,44 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, /* Arithmetic operations (64 bit). */ =20 case INDEX_op_div_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int64_t)t1 / (int64_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int64_t)regs[r1] / (int64_t)regs[r2]; break; case INDEX_op_divu_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint64_t)t1 / (uint64_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint64_t)regs[r1] / (uint64_t)regs[r2]; break; case INDEX_op_rem_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (int64_t)t1 % (int64_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int64_t)regs[r1] % (int64_t)regs[r2]; break; case INDEX_op_remu_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, (uint64_t)t1 % (uint64_t)t2); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (uint64_t)regs[r1] % (uint64_t)regs[r2]; break; =20 /* Shift/rotate operations (64 bit). */ =20 case INDEX_op_shl_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 << (t2 & 63)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] << (regs[r2] & 63); break; case INDEX_op_shr_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, t1 >> (t2 & 63)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D regs[r1] >> (regs[r2] & 63); break; case INDEX_op_sar_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, ((int64_t)t1 >> (t2 & 63))); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D (int64_t)regs[r1] >> (regs[r2] & 63); break; #if TCG_TARGET_HAS_rot_i64 case INDEX_op_rotl_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, rol64(t1, t2 & 63)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D rol64(regs[r1], regs[r2] & 63); break; case INDEX_op_rotr_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tci_write_reg(regs, t0, ror64(t1, t2 & 63)); + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + regs[r0] =3D ror64(regs[r1], regs[r2] & 63); break; #endif #if TCG_TARGET_HAS_deposit_i64 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474320; cv=none; d=zohomail.com; s=zohoarc; b=Az1sObAL4TPKNGf8WOTh9gASKQk/SQeROdr1OQTaQNTzip8/UJpXr7bj+fe5U8I0iGlH9tAoBMrO47F5H7R2ZjTfVkJhtsHEQztZM2bdGCkrWFotNPj2c/yE5DF7jx0U52chN87mB8itug5IZ8YAML1wllsoRmgkM077tJP/wWA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474320; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=BT+fbUWdo2Z5pG47CxveBKKbFIzxyg6+zMffoyRH9Us=; b=KTNThJI9ZcPHaZ+gkg6A8uyJnkIrgB+ebYMgqsWRX54ksWxAfEeN95i6/QmvmubdBK9W6f7VFszUnH+yiCK972FkK1csb5VQXts0vgPGVI+sLvLJeWU3NSZ1yfmo2SRSSQxPKyqnJIN0HfEw8qTPz0iVjmDStA7hHbQr+i1RiPo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474320876658.1816717066519; Thu, 11 Mar 2021 06:52:00 -0800 (PST) Received: from localhost ([::1]:43106 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMfP-00087c-M1 for importer@patchew.org; Thu, 11 Mar 2021 09:51:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39530) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMTy-00034n-GL for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:10 -0500 Received: from mail-qv1-xf33.google.com ([2607:f8b0:4864:20::f33]:46713) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTw-0006DK-UV for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:10 -0500 Received: by mail-qv1-xf33.google.com with SMTP id j17so2636641qvo.13 for ; Thu, 11 Mar 2021 06:40:08 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BT+fbUWdo2Z5pG47CxveBKKbFIzxyg6+zMffoyRH9Us=; b=HcGHR5VoD/UgzvdOsZQn4apNdeY2RiSDLFDOxZmkvM2RilvTEF6yXBKYkC+ohFXAVz 2J2kn4hNd+pdjFy7Lld/33V4tOZpqdJNX5hTEWkhEJOr9+EtWIacnfTMs44hhR8+t+zC EeWRXRhZtq55gcnd6zjpkApQ348ulol0zZGrl7Zjl/3ognruZV1QJqO1IzzH9dlbQggl L94JwJf3IJ/TdhlJljvuLV6W5fnNpllnPYbXx56BS/66Ygk7yGEym7lhh+i90KQcE7kK Et1c3WDzvOKMzBuPy7lEi3mCbsDD7Nmr5CDU/tBkr+pvdSKeGILhq7QSmMrL2WlUUOIY zawA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BT+fbUWdo2Z5pG47CxveBKKbFIzxyg6+zMffoyRH9Us=; b=GSt2UCENY/97I0VK798wBQc0sRZenzKDStPN2eF+rJVSphVBo5730XllidtGy99eR7 OhM45v0keqLQumIoLdsnUNwrBn06Js4boOvnxCKL0TFtas7xsLHLtRwRufglhIUfhE6i 3SSCY5NN5+1SKRLgOaniQJzSRBp7ZDggendUN+QAZmJIp+z2T2FflsDf+z0tfIZYAaGm Qn+pTihyjPkV7oD+zryzwyn6eHsZEqGPFNLAWHenvc4qzXs94HXBHxFoYeeqM16oHXzU DvVcRT+ub+J1kPoGQkEUe9yKtqclgFOg5UgF4rOvHRoOA9X+Ak3iF9AMONAXo+wCRdcj 3Wlg== X-Gm-Message-State: AOAM531rkjo+69UwPlCokaMSaNibOtZpMEZ9Zx3T+BWd7nl1ZVpcZ7qK 4Jj0CpAk7fF6YSCAIX+CEZUsrTIixIMbfVND X-Google-Smtp-Source: ABdhPJxUR9kpt8W9AkrP/PN4uQLYn8djzm6Yl3LE6/bNu9kP7fwJRiGTnjZ7T4gjFirrG5hFRykFxg== X-Received: by 2002:a0c:8304:: with SMTP id j4mr7971134qva.18.1615473607935; Thu, 11 Mar 2021 06:40:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 06/57] tcg/tci: Split out tci_args_rrrc Date: Thu, 11 Mar 2021 08:39:07 -0600 Message-Id: <20210311143958.562625-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f33; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf33.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 1c879a2536..bdd2127ec8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -207,6 +207,15 @@ static void tci_args_rrs(const uint8_t **tb_ptr, *i2 =3D tci_read_s32(tb_ptr); } =20 +static void tci_args_rrrc(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *c3 =3D tci_read_b(tb_ptr); +} + static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) { bool result =3D false; @@ -413,11 +422,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tb_ptr =3D (uint8_t *)label; continue; case INDEX_op_setcond_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - condition =3D *tb_ptr++; - tci_write_reg(regs, t0, tci_compare32(t1, t2, condition)); + tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition); + regs[r0] =3D tci_compare32(regs[r1], regs[r2], condition); break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: @@ -429,11 +435,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, break; #elif TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_setcond_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - condition =3D *tb_ptr++; - tci_write_reg(regs, t0, tci_compare64(t1, t2, condition)); + tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition); + regs[r0] =3D tci_compare64(regs[r1], regs[r2], condition); break; #endif CASE_32_64(mov) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473892; cv=none; d=zohomail.com; s=zohoarc; b=dJjBrTxBYWowiSXs7BqnvVMYqaojZxGw8kzFA1XpAiP1NTPVIa1kx0nNOROh/ltKunu2JcGcuVzQTVMJcNEG8hvb9ERVMJ6q7u1UQ/iuxxlDQwB84/tEOaEH40u2l7Polickh4Yz1Ivtry82YTghowh+Uii6Akypd4KSyns26bE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473892; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=QO2Vfh3SDoVnZQbKSwcYrZxIMU26hsw0Q/rupUE+HGg=; b=OkkZnx7SB8mAPHO0BYZW+juRe9kToK7Q4c6HwGbihygRxt6+Ogkn4RMh9gpDVKj9F9olf2Z9jHONfTIm0UCxidUEJulcAJbPrtFpQz8mdlLkJkA2LNf3GvCdFsQypt31VD0juZHbx67kDiNaXD6z4ZC0foj/N8yc1rRfn9hy7ck= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473892688417.446975286727; Thu, 11 Mar 2021 06:44:52 -0800 (PST) Received: from localhost ([::1]:54068 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMYV-0000LP-MJ for importer@patchew.org; Thu, 11 Mar 2021 09:44:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39574) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMU0-000386-Q6 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:12 -0500 Received: from mail-qk1-x72d.google.com ([2607:f8b0:4864:20::72d]:42804) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTx-0006E0-VI for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:12 -0500 Received: by mail-qk1-x72d.google.com with SMTP id z190so20752035qka.9 for ; Thu, 11 Mar 2021 06:40:09 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QO2Vfh3SDoVnZQbKSwcYrZxIMU26hsw0Q/rupUE+HGg=; b=HOFlGWpxJz2UoRSGQpBrO9ob2TEXxH8nkyY+5hZSqIq+SvHUqVwlgg6v8R2ife76YM KeMx7cBp/mwIfR0hNPmrjdoUEDCXbMjbOVLS9kOLW8+16dVZh7qRXib0SAlV40pREBgG heI5HwtCi8KZsiW6kCB7i1XNQdMYdrAeoeQujao+foMwkvBzL3mJ3p8dbGBnrsKpDwbg VmcprOUGMVQoitHo8FV3x6/h+NzE/8Vn+j28CRW5k4LY59Uyrdc+5dO256afUBurDEp3 8aOS87CjkluvObgs91MLNgd6Q7F2fcU6MnMfojyCvnadwIa26FWjj1RFyNVdLLITgfie nEIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QO2Vfh3SDoVnZQbKSwcYrZxIMU26hsw0Q/rupUE+HGg=; b=CBN/6jomkpYwXCQWq9RT3LzWHK4aOQNQujdgUMHRNQUlMJBwJ4Yf4OP9F3PsMW43ZL 2xs/+uwmt9DutDZBaLfTajv0ONN6w4zTEHj83FG03qhn3wGeps5mWMJRYNfEkG0TqnAd eCE+33ksebAHxccXU0CpkPJvlFkK++lNZpMbmssYElsN9lhCO1K3rJXvZw7YVdDLzBc/ arOKljCcW/JJYK7jIjZJk0auEcpr+v2Lt8MBoH56f0bWAoBWd6kwDZ+9Orv9AN5i7C9I LO+vyUR9nRhK6VHx5WwpO3F6zqULrq5OZkWClg8JoIzKeFGJ7UiMZ/aYo1eMVSOjvpQH 03Ew== X-Gm-Message-State: AOAM532iJ9HXxtb4Nx+rMKuguJ/zxFqiZVv7a/B71fgzeYhSXOFsf58h 0bIBC/tDKHSebSZaqXQV8ICry1f/waxJfAv8 X-Google-Smtp-Source: ABdhPJyZo8JZdotWZ2y8rEEWkKjhw1ML3Ca6jno2wYV3JREg/Gchl79CpfjSlQ0UfeIO1LKPTOu4wA== X-Received: by 2002:a37:46c5:: with SMTP id t188mr8037260qka.47.1615473609093; Thu, 11 Mar 2021 06:40:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 07/57] tcg/tci: Split out tci_args_l Date: Thu, 11 Mar 2021 08:39:08 -0600 Message-Id: <20210311143958.562625-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72d; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index bdd2127ec8..6e9d482885 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -184,6 +184,11 @@ static tcg_target_ulong tci_read_label(const uint8_t *= *tb_ptr) * s =3D signed ldst offset */ =20 +static void tci_args_l(const uint8_t **tb_ptr, void **l0) +{ + *l0 =3D (void *)tci_read_label(tb_ptr); +} + static void tci_args_rr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1) { @@ -417,9 +422,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #endif break; case INDEX_op_br: - label =3D tci_read_label(&tb_ptr); + tci_args_l(&tb_ptr, &ptr); tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); - tb_ptr =3D (uint8_t *)label; + tb_ptr =3D ptr; continue; case INDEX_op_setcond_i32: tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474438; cv=none; d=zohomail.com; s=zohoarc; b=G0njVNduLGmp1EVWcIlrOfNq2cDK5Nss9+KmehIZxwzvG55xbrmBfX4qOiHuxp2YoJndHpNjIwPqoQX5JDrsGpQc49+yzlLfw5VVqsL2akKorBhs3NowrcWZgorF58kB9/1LDdhROwwptV4hFORbTMTzWU939fWSlnfhT9N3ek0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474438; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RxHyIf5IQ/iHhFCB4XIpWAKun69n1MIgbHeQ1l++JBg=; b=CI3dwynO25OFOOe7T6fS0PXLncG/ZN6uQBYYAd4uA16QZBXaHVGJCN+sOqaoSsH/3/ni8HEGyc+kxJy41rvuUO6b871UqCuqRT29FSOVNCYyWHXEW0q3cGbJkJlDM6V5uTwecDgi5CM+I10rHIkRKgf2SjAHTmwtbG4RODNGqDU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16154744384821017.8805808213518; Thu, 11 Mar 2021 06:53:58 -0800 (PST) Received: from localhost ([::1]:52036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMhI-0003Xu-Pz for importer@patchew.org; Thu, 11 Mar 2021 09:53:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39570) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMU0-00037u-Nb for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:12 -0500 Received: from mail-qk1-x72d.google.com ([2607:f8b0:4864:20::72d]:38650) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMTy-0006Ex-WF for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:12 -0500 Received: by mail-qk1-x72d.google.com with SMTP id f124so20770485qkj.5 for ; Thu, 11 Mar 2021 06:40:10 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RxHyIf5IQ/iHhFCB4XIpWAKun69n1MIgbHeQ1l++JBg=; b=OkynKqK7OqTuV7TUngpr9YL2Q0kPrZDrvFlHil1KqsiQLLXLF8J1AEQerXOzGaob0A WhttbDKvVOwOjymXCF7xQtvMCDu8Go8wWVQ7t9kDTlGhmsjHv8ew5vMev7Ai1RKPiRZr 6HP6RsmsjZL8deQrSYeRA/tthx/3uNWbLy/oMMqDaBQGlLTQRU06MDJIMHEjvSenx59Q VDHVdyOIZWh78im9m+GMJfcduZfDUJUHmT3ccCvaiU/jzbwf404idubQB5GQip18xWNO Sw6ISvUbw5mB6/7HNaZ3E2urX8F7ndQiaC2h6vnFFHWc4yegPfPhUPESsLY2BIkqLrcC HBeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RxHyIf5IQ/iHhFCB4XIpWAKun69n1MIgbHeQ1l++JBg=; b=Wg3m+uPLIA2mnWae+HKyzL2NJCFeOTJwMxm4cf13CwldxR8C+YXcCtb/gnj9sZ4i/j orY3jzEQkDEO3K9Xyv6j60PuCUhXiAbqd981O+WZBNjiNrkHCWdh3eEN5H2XMNej1oPG xuH7mDNdrhT9rBJnvkg2srTEbtc5wgPbn9gC+i1zWWkkBh+tYWJrV+UEApaBqW2XkS/Q /zyeIjQSeeUoc7xRXLJlnGZA3d9qh720rNC9ew/YemFHSulyrMNsI5mRYC5D2Cm0YCGu DAnEljdvniEGiPNuLGvWlNBXIuJVrj8fB65ABC0s1EdQH1lm672w2YilRSfYbhjBIEwH 0C5Q== X-Gm-Message-State: AOAM53177LIXrPpcCv7XpRCcgZ8FZqvGGx303NUNzCaBUX9Zwr+T/s99 h9t25Q6FdNx+Y0+G/J1slvkqcNCuszkRL75V X-Google-Smtp-Source: ABdhPJzDdlQKJzjl9OMf/4iQ0TsGsw8DzmErDZUwBQa0OYC98UrRpapfI6OQZBt0JiFoo/gAy1X+5Q== X-Received: by 2002:a37:b983:: with SMTP id j125mr7792349qkf.363.1615473610157; Thu, 11 Mar 2021 06:40:10 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 08/57] tcg/tci: Split out tci_args_rrrrrc Date: Thu, 11 Mar 2021 08:39:09 -0600 Message-Id: <20210311143958.562625-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72d; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 6e9d482885..558d03fd1b 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -221,6 +221,19 @@ static void tci_args_rrrc(const uint8_t **tb_ptr, *c3 =3D tci_read_b(tb_ptr); } =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 +static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, + TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *r3 =3D tci_read_r(tb_ptr); + *r4 =3D tci_read_r(tb_ptr); + *c5 =3D tci_read_b(tb_ptr); +} +#endif + static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) { bool result =3D false; @@ -383,7 +396,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint32_t tmp32; uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 - uint64_t v64; + TCGReg r3, r4; + uint64_t v64, T1, T2; #endif TCGMemOpIdx oi; int32_t ofs; @@ -432,11 +446,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: - t0 =3D *tb_ptr++; - tmp64 =3D tci_read_r64(regs, &tb_ptr); - v64 =3D tci_read_r64(regs, &tb_ptr); - condition =3D *tb_ptr++; - tci_write_reg(regs, t0, tci_compare64(tmp64, v64, condition)); + tci_args_rrrrrc(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &condition); + T1 =3D tci_uint64(regs[r2], regs[r1]); + T2 =3D tci_uint64(regs[r4], regs[r3]); + regs[r0] =3D tci_compare64(T1, T2, condition); break; #elif TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_setcond_i64: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474592; cv=none; d=zohomail.com; s=zohoarc; b=EIXG3jcOc3+ohbd+PzO9VhIiwzdfTZeFUgis2wuZrDqbBRvUXWC9JzaBtx5HilaGHTSFEmOznaFUbzq4gcYVJDokZNWWmhA9EGJ6BZDbkHzQQYatjvr3QBs5I0uGTcCSmH8G6iQm+cyda//e0W7BeJ2E6i/c8gHyaUey+ZZVtRE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474592; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=V1TX4A2lg1baFpq2pztWBLMIOT18SzH84zy/1htPZ+g=; b=Z5c6VW/XgogVV+DsgWrtPPyflwv09n4Q1OO9nBo1TCtV1Z7KEWRruIPnoxDbEAp4zWTZ7L3OTn91PmhHuRZCQoGF9X83jC+ITOSCdCAm7vRUbQKZdPUDQqwuRzRWiXlR4qubEujxgJWawsldMhFam2VSHti106/9g2T6ZB3rF+U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474592863234.1707936813957; Thu, 11 Mar 2021 06:56:32 -0800 (PST) Received: from localhost ([::1]:35616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMjn-00009r-Oy for importer@patchew.org; Thu, 11 Mar 2021 09:56:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39606) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMU2-00039E-29 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:18 -0500 Received: from mail-qt1-x82e.google.com ([2607:f8b0:4864:20::82e]:42606) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU0-0006FY-Cl for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:13 -0500 Received: by mail-qt1-x82e.google.com with SMTP id l13so1266966qtu.9 for ; Thu, 11 Mar 2021 06:40:11 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V1TX4A2lg1baFpq2pztWBLMIOT18SzH84zy/1htPZ+g=; b=mhg9/8rYlKkl/X4he2CwXENxgP4mwyPtzidCOl77UMEEYlRIfMRfBV+JM2L1Bi84Ya YIitD5ixE0OLYfPJakGhL73Vc42VhUUvekOFNF6nCJCGbhiSQu/NFRH5/YYxqkllue5v Ct3PaeJ1bgy5QY3FLHgN2TjmPaFBYCjhrUmJeddC3TlvQE2DxQ4MS+J9I6zCM9s7888s ETBhJW0wL1BeGfWJT+pqxph+i33TWm+tk8LgLsK9adra0XWbkypSSsmRM6CIVgvXxfOs XUf7EFZco9b5gtsA5NfSJgX7wD5TBcwub/ON0gG5EJCD1CSrwSmHqrSWr5IHWeIWuHEP L9xA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V1TX4A2lg1baFpq2pztWBLMIOT18SzH84zy/1htPZ+g=; b=XvYJjzEts2v/kUSmjl70LsN6kMfhSAcSwEw/soV0ALN5cjF3NNAt9yQx/C7oxm09Wg NTK5PmbHqpKq8PqxjpTUWEQ9+H85EwiRSqGNMGIR9+HlRS/WOWcVFuQ1wOArHuTEqZNT 0vBy06hXINrEBRxQIpm1CVAA5QartWt3DzPnGwrZbVu7e4o4SBv3ChfUpOJAL4D93EJg tT7wTCTCyAk28Rog98pmZJaotWGrjkILqIFyyGdVQcn75qP0q/DE4Y/UEef+FRM53rBQ HrXrffEGl3+USBhKp7uo/snmrwDmwb0AjVarwK7cxKrTzFAkjtpDV3KyUW9h++iW4UDd /Vkg== X-Gm-Message-State: AOAM532obulb2XBm/DFeUMyAbraAsFdM44xtKpsHEalhde+DxmzdqBux 2OVW43VyK/rDqVlTBn7y1RMCfKbr16X5kyzW X-Google-Smtp-Source: ABdhPJyY/EdrM/kigyJIpa7czCp+5rJeuD9U2y3Pc3VihUewzvtPkEUrC/yc9LWS7MvygbI2/BNM+Q== X-Received: by 2002:ac8:534a:: with SMTP id d10mr5727145qto.353.1615473611325; Thu, 11 Mar 2021 06:40:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 09/57] tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl Date: Thu, 11 Mar 2021 08:39:10 -0600 Message-Id: <20210311143958.562625-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82e; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 52 ++++++++++++++++++++++++++++++++-------------------- 1 file changed, 32 insertions(+), 20 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 558d03fd1b..c8df45ce28 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -212,6 +212,15 @@ static void tci_args_rrs(const uint8_t **tb_ptr, *i2 =3D tci_read_s32(tb_ptr); } =20 +static void tci_args_rrcl(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGCond *c2, void **l3) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *c2 =3D tci_read_b(tb_ptr); + *l3 =3D (void *)tci_read_label(tb_ptr); +} + static void tci_args_rrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) { @@ -222,6 +231,17 @@ static void tci_args_rrrc(const uint8_t **tb_ptr, } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 +static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, + TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *r3 =3D tci_read_r(tb_ptr); + *c4 =3D tci_read_b(tb_ptr); + *l5 =3D (void *)tci_read_label(tb_ptr); +} + static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) { @@ -388,7 +408,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tcg_target_ulong t0; tcg_target_ulong t1; tcg_target_ulong t2; - tcg_target_ulong label; TCGCond condition; target_ulong taddr; uint8_t tmp8; @@ -397,7 +416,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 TCGReg r3, r4; - uint64_t v64, T1, T2; + uint64_t T1, T2; #endif TCGMemOpIdx oi; int32_t ofs; @@ -594,13 +613,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; #endif case INDEX_op_brcond_i32: - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - condition =3D *tb_ptr++; - label =3D tci_read_label(&tb_ptr); - if (tci_compare32(t0, t1, condition)) { + tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); + if (tci_compare32(regs[r0], regs[r1], condition)) { tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); - tb_ptr =3D (uint8_t *)label; + tb_ptr =3D ptr; continue; } break; @@ -620,13 +636,12 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, tci_write_reg64(regs, t1, t0, tmp64); break; case INDEX_op_brcond2_i32: - tmp64 =3D tci_read_r64(regs, &tb_ptr); - v64 =3D tci_read_r64(regs, &tb_ptr); - condition =3D *tb_ptr++; - label =3D tci_read_label(&tb_ptr); - if (tci_compare64(tmp64, v64, condition)) { + tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr); + T1 =3D tci_uint64(regs[r1], regs[r0]); + T2 =3D tci_uint64(regs[r3], regs[r2]); + if (tci_compare64(T1, T2, condition)) { tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); - tb_ptr =3D (uint8_t *)label; + tb_ptr =3D ptr; continue; } break; @@ -766,13 +781,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; #endif case INDEX_op_brcond_i64: - t0 =3D tci_read_rval(regs, &tb_ptr); - t1 =3D tci_read_rval(regs, &tb_ptr); - condition =3D *tb_ptr++; - label =3D tci_read_label(&tb_ptr); - if (tci_compare64(t0, t1, condition)) { + tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); + if (tci_compare64(regs[r0], regs[r1], condition)) { tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); - tb_ptr =3D (uint8_t *)label; + tb_ptr =3D ptr; continue; } break; --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474120; cv=none; d=zohomail.com; s=zohoarc; b=lx7nGSPtN5jYQ6Fjy3e+hYBBGirDmht0KU231pdyJqAMx76lfzJSXUcgbbVz1mI2S956kw4+SnoDBKN+taufJUzqsLdL6a0qQ1gR7cpFlVWZ55dMsGl9CNhp1fkI5HYrekyOYVed6JAuc9BPqJmz0tlWYBM6/0eO9CwqS+VyOeg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474120; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=R2pchzDBkrNufC2Bz/6i9wxXtvGi5yfeV/PYKcIix9Y=; b=TdBJkTJ/uXVhBi+BSn4raWkn/mEKm1gDP1wsS4ME1G1ivZIXlbNzJSpFQ6NQ9WRGDRcyUo/FmNTiU05waPjhUig0N/yrKycxCm1uv1ltqToUCyaZaLZYZXHHWgLVjnxXE1DTJkBjpygD18EKIwFQuLkruzmyFkB/hz5DJPcPxLA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474120408326.06561904288617; Thu, 11 Mar 2021 06:48:40 -0800 (PST) Received: from localhost ([::1]:34692 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMcB-0004Da-5L for importer@patchew.org; Thu, 11 Mar 2021 09:48:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMU7-0003DL-Vt for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:20 -0500 Received: from mail-qt1-x82c.google.com ([2607:f8b0:4864:20::82c]:44941) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU1-0006HB-CK for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:19 -0500 Received: by mail-qt1-x82c.google.com with SMTP id m7so1265205qtq.11 for ; Thu, 11 Mar 2021 06:40:12 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R2pchzDBkrNufC2Bz/6i9wxXtvGi5yfeV/PYKcIix9Y=; b=QkaN8mFqNWGZfh4SUpTXCXyu8VVI018yVw7T6ZpHkx4Mu9H8jlTYs062eM9KPmj7RB /pDalmYWLIvImvOdqO1CqG5xlK41uxuLJa314JEJ5Cqp2hKQk6AKYHJHVZGmP1rdz3cS mUZdhdtg70qgdba216YQo72X3RH+MDe9rs1/UDQbH+JPiNxMDHlQIkWc3TyUi3k+/bzz FFCqLx6UVf2+r/ZFunpoPZMKGikvNDM+6FbljfT22OXJXPhUJv9Keqf9bZ9gesoaWnma ZPodD3w0LYoHPU2WbBntCfec8x1RTK6lKwkglw0yrBt6Q9Blo/iIZQcZz5sK7GSjty9G cLfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R2pchzDBkrNufC2Bz/6i9wxXtvGi5yfeV/PYKcIix9Y=; b=epY10ZIo6/eO70D31mnABRFkfg/BUUqCToTQFPh+fVR6jaNGr+7O2zkK0CAM1ubSag easfcIitqxbawPNYrCv0LDhqTahCSOG73/+FvckRNPmmc7D9gR+m0boFJYQLnv7+IEWE 6JyPqTbBIERlYhv18Rf0h1fzzf2J5dwiO42K4sgJVT7OzhtTbLeRWpgdle9PqRyrSOaX N8uwWfL+GBVrncw5Jvfcpq4U82unJ3f72AOYRP3/N/QJRUPuuD4Mqx6CM7aa5HQh1ExI 7iCCNZAwE/CPwHdHLcBsNIrxX9U5B15/Wthi3ea94JiKmaXNYoFNXc/QUIfZoF9LjS8C DQLw== X-Gm-Message-State: AOAM533NRUhBAQPj/W108PH6e8mtodY2mhccuuOU+xLNIArCdp3ZD941 3ktYYS/phWV8wu6+BCBX/LjWbqV84F1ijv80 X-Google-Smtp-Source: ABdhPJyMuL8zZYviYUaOb4GM+BctUzkrIE+9zcHvxweAQQCTD4WZRIe4d0UT891ZWhpCRIKTAbJUcg== X-Received: by 2002:a05:622a:3cf:: with SMTP id k15mr7736536qtx.368.1615473612432; Thu, 11 Mar 2021 06:40:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 10/57] tcg/tci: Split out tci_args_ri and tci_args_rI Date: Thu, 11 Mar 2021 08:39:11 -0600 Message-Id: <20210311143958.562625-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82c; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index c8df45ce28..cfbe039fa6 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -121,16 +121,6 @@ static int32_t tci_read_s32(const uint8_t **tb_ptr) return value; } =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 -/* Read constant (64 bit) from bytecode. */ -static uint64_t tci_read_i64(const uint8_t **tb_ptr) -{ - uint64_t value =3D *(const uint64_t *)(*tb_ptr); - *tb_ptr +=3D sizeof(value); - return value; -} -#endif - /* Read indexed register (native size) from bytecode. */ static tcg_target_ulong tci_read_rval(const tcg_target_ulong *regs, const uint8_t **tb_ptr) @@ -180,6 +170,8 @@ static tcg_target_ulong tci_read_label(const uint8_t **= tb_ptr) * tci_args_ * where arguments is a sequence of * + * i =3D immediate (uint32_t) + * I =3D immediate (tcg_target_ulong) * r =3D register * s =3D signed ldst offset */ @@ -196,6 +188,22 @@ static void tci_args_rr(const uint8_t **tb_ptr, *r1 =3D tci_read_r(tb_ptr); } =20 +static void tci_args_ri(const uint8_t **tb_ptr, + TCGReg *r0, tcg_target_ulong *i1) +{ + *r0 =3D tci_read_r(tb_ptr); + *i1 =3D tci_read_i32(tb_ptr); +} + +#if TCG_TARGET_REG_BITS =3D=3D 64 +static void tci_args_rI(const uint8_t **tb_ptr, + TCGReg *r0, tcg_target_ulong *i1) +{ + *r0 =3D tci_read_r(tb_ptr); + *i1 =3D tci_read_i(tb_ptr); +} +#endif + static void tci_args_rrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2) { @@ -481,9 +489,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, regs[r0] =3D regs[r1]; break; case INDEX_op_tci_movi_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_i32(&tb_ptr); - tci_write_reg(regs, t0, t1); + tci_args_ri(&tb_ptr, &r0, &t1); + regs[r0] =3D t1; break; =20 /* Load/store operations (32 bit). */ @@ -703,9 +710,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, #endif #if TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_tci_movi_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_i64(&tb_ptr); - tci_write_reg(regs, t0, t1); + tci_args_rI(&tb_ptr, &r0, &t1); + regs[r0] =3D t1; break; =20 /* Load/store operations (64 bit). */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474131; cv=none; d=zohomail.com; s=zohoarc; b=LuBdidDINM9u8PpWNNHlSL0HyPcrULnRjZc9RtGcDfUzflLpzUbQZODzreXPGuMs8LLjx4ww6vxwsG41w9FUhXuG7D9Q9eZQ/7+Tlov72LvZpzSDM2wxElIlvfi2SXqvtgSI5fW1WARma/IVh5EtgWLz8oNNPWBFvCXrkyEo7o4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474131; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9Vh7s6UroDOBSVmOQabkt7Snkgw14XUdmLA5IgFSZHM=; b=ieR8LWEkyYG1WnEoQoxCbQJNMUxAJq6TuvMMQRoyJZHBpC7Tj7Iaby1uLApOcZnhk8gjpyFxejbbatvA8T0/xv1nL7UhFyDgTp3X9Ew6/EzVHTQrkiU7Dl9OCK/WaGgFvN1Ov7ZHcPvsgx8xZsyxVUU1wlAKqtwg5ws4zwvWoLw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474131595387.18240510333453; Thu, 11 Mar 2021 06:48:51 -0800 (PST) Received: from localhost ([::1]:35124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMcL-0004Pl-JY for importer@patchew.org; Thu, 11 Mar 2021 09:48:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39744) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUB-0003IV-Pn for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:23 -0500 Received: from mail-qk1-x731.google.com ([2607:f8b0:4864:20::731]:45022) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU6-0006I2-0P for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:23 -0500 Received: by mail-qk1-x731.google.com with SMTP id 130so20748595qkh.11 for ; Thu, 11 Mar 2021 06:40:14 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Vh7s6UroDOBSVmOQabkt7Snkgw14XUdmLA5IgFSZHM=; b=vPz6sr4tsse06jHrHUvPJ2qtk2vcx9puREW2YrQqqK74fltO4BBEJL8CSbUX8/df3h aAjEm9SU3N3UcztnWSCugFYTMp2IANUjXV4MvUjq4lojw7QbcPLETOOpn/XmYwyu4Ou1 o71ZyVAEt1j0bAMhgj1WOBGqAnCCsZINKPmbNhcu0ByLDop+CJwAklci0B6Mm9f0zC/C L6e/e1hqiI+D+BaVHbfwG/x2zjYX5VLI+upq0fOFgKts6hurIRvoxjIVgJUY+RgQUXAJ T+0Ra2wn+JLa23JhW2ad1w2EJEyH6Mf5WAdHzCRlHmxstKEOEIqjueTu4LGiX019M8/Q hDkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Vh7s6UroDOBSVmOQabkt7Snkgw14XUdmLA5IgFSZHM=; b=k3fuhA7v4NO4FguGEBZo1nIyW12Mts3HPOwacDPVcrGvY2Et38A+Nwx35jqqZMyz7D Bp8IMRQzUlf0/O9gXJ4dRlOu3r0xqKz7h1G4ohTMkwuZjDOBlPQGn38/4by9nwJUs8d6 zaiU6H9etpPFtSfPv1S77DEJizKAKEGvjO4ltNpBnkeHbaTiGCaEz0JS113m0r0dvSYJ Ifrq+SmQdcoiGyaf9jg4fPDf9qwQwF+C/ab6XnUJHZXX//y51gU9JiKX2lbOtAcvDH4F 8lUpTjoMkzqGZ4Ty/LGeNzX3HwB7HFB1KSOXVeo9WiynhU8mrxaJWDRgM4eKibJ0qcEb p/cw== X-Gm-Message-State: AOAM532g8VxRaKWXQkwRYahlkrWtqK8T3VxrtAqK3tcpfSLuB97Kq6e7 FKwzlaVUfSDok6HR2Vnocd46VVmsTh9Z27nv X-Google-Smtp-Source: ABdhPJwBYh1BKruyoxYc1ELB5FPo1rlBzjtiGqcYb4nlXBu38Tez1juxpDFRFWSwrH3uSH4YCLlAVA== X-Received: by 2002:a37:30f:: with SMTP id 15mr8049887qkd.494.1615473613577; Thu, 11 Mar 2021 06:40:13 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 11/57] tcg/tci: Reuse tci_args_l for calls. Date: Thu, 11 Mar 2021 08:39:12 -0600 Message-Id: <20210311143958.562625-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x731.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index cfbe039fa6..066e27b492 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -435,30 +435,30 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 switch (opc) { case INDEX_op_call: - t0 =3D tci_read_i(&tb_ptr); + tci_args_l(&tb_ptr, &ptr); tci_tb_ptr =3D (uintptr_t)tb_ptr; #if TCG_TARGET_REG_BITS =3D=3D 32 - tmp64 =3D ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0), - tci_read_reg(regs, TCG_REG_R1), - tci_read_reg(regs, TCG_REG_R2), - tci_read_reg(regs, TCG_REG_R3), - tci_read_reg(regs, TCG_REG_R4), - tci_read_reg(regs, TCG_REG_R5), - tci_read_reg(regs, TCG_REG_R6), - tci_read_reg(regs, TCG_REG_R7), - tci_read_reg(regs, TCG_REG_R8), - tci_read_reg(regs, TCG_REG_R9), - tci_read_reg(regs, TCG_REG_R10), - tci_read_reg(regs, TCG_REG_R11)); + tmp64 =3D ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0= ), + tci_read_reg(regs, TCG_REG_R1), + tci_read_reg(regs, TCG_REG_R2), + tci_read_reg(regs, TCG_REG_R3), + tci_read_reg(regs, TCG_REG_R4), + tci_read_reg(regs, TCG_REG_R5), + tci_read_reg(regs, TCG_REG_R6), + tci_read_reg(regs, TCG_REG_R7), + tci_read_reg(regs, TCG_REG_R8), + tci_read_reg(regs, TCG_REG_R9), + tci_read_reg(regs, TCG_REG_R10), + tci_read_reg(regs, TCG_REG_R11)= ); tci_write_reg(regs, TCG_REG_R0, tmp64); tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32); #else - tmp64 =3D ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0), - tci_read_reg(regs, TCG_REG_R1), - tci_read_reg(regs, TCG_REG_R2), - tci_read_reg(regs, TCG_REG_R3), - tci_read_reg(regs, TCG_REG_R4), - tci_read_reg(regs, TCG_REG_R5)); + tmp64 =3D ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0= ), + tci_read_reg(regs, TCG_REG_R1), + tci_read_reg(regs, TCG_REG_R2), + tci_read_reg(regs, TCG_REG_R3), + tci_read_reg(regs, TCG_REG_R4), + tci_read_reg(regs, TCG_REG_R5)); tci_write_reg(regs, TCG_REG_R0, tmp64); #endif break; --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474325; cv=none; d=zohomail.com; s=zohoarc; b=Z/qZKjIOjaHO7QM6JSQPIhb1bk8Rp8W3HMNhavyl4uIKICaBLkw/woXSLxJAHVz83g6EhUxQ8HyrGj1Y2oAuVEgm/TV18trK9ujQraP7A3PAT6rJFBqFkRnbPoHTkmpv1Myp007gEFOujid8y8tg1tWQe3dDEkPPGhRvBgTC3TE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474325; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Cx+nFCxFv3Yh5ev57gtG/OnK3pXMi4fhwChTqjnm+qQ=; b=Ax/FvdfCE9f4RXXfzsC00dYreOtv++M/cg3hznvoekWXMQ5l7B21UjaaOu/dF9Q1OKIlNDSHXY5TOdQKiZwhK0amAg01LzooXj1yK9hVsZ/dE44H+sH1vTG21Y+Fhrp7/X+QtSdXMdfvBvIqEnedK6Jh6CvIpfB9jW7lOjJP9qk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474325576366.85219733660483; Thu, 11 Mar 2021 06:52:05 -0800 (PST) Received: from localhost ([::1]:43604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMfU-0008PE-H5 for importer@patchew.org; Thu, 11 Mar 2021 09:52:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39788) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUD-0003Lc-3D for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:25 -0500 Received: from mail-qt1-x82b.google.com ([2607:f8b0:4864:20::82b]:42604) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU7-0006IH-KQ for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:24 -0500 Received: by mail-qt1-x82b.google.com with SMTP id l13so1267144qtu.9 for ; Thu, 11 Mar 2021 06:40:15 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cx+nFCxFv3Yh5ev57gtG/OnK3pXMi4fhwChTqjnm+qQ=; b=LUa4LpkGyBaVasFH5DtoUt/db2sH2PotFJveGboAWuZaUXxeFu+QGX2DUhos6dkup5 sUqM5niYJPV+fTEwP3aQFimsWwQb/nBKsj8FisA5TqyG4gE0Nwl7/HjFugCxECHjdaKP oe6rVilqpSKaPcvBzLNPjJVV2Mt+Q0uUMrHTVEWG+0H6LFMaxwn54JkTURbOPqe74jto 8P+YYWPaPenAG7STo/2Klx5pplNAGkqk+Ofis7svMuYiIhKHrb5+3BjXs7hEkpyu7eis v728bORqRUAMGhOao8aiVp4ilQssGkhu5W/omvN4v1KgEH8IG7fnVlyMhkkJLivqcV5t EmaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cx+nFCxFv3Yh5ev57gtG/OnK3pXMi4fhwChTqjnm+qQ=; b=LqZ7q5TLgddGdyxlmUQvtX+0u7k3JXRlSonVi3ZK1bS1Tz8sl0wInjPpsy0vic7LpF ALkNZ8NxACm6QbwntsxMOJrMvzbxm9Lwfrd0CcSXuK6bIU0EFyRDqGxe7p5qDEhW7rPJ 46t2oPPykOPidX51bV9YGQgwTly/8fdozDRmegZvjftQllFHCI6DOpou5bin4QTjh7Kl vzQKFn5Kfi4VW9CstCdoayFRZeleumfqTMjOqYTQ0+B6ZGcZHBLTO7jvOoVKEq0hG7LA ZOuq1k3jjIHYfrwVEL+vrQ1h3WxpiictouC3fjz0WuOCHVX+B9nHdiXJMns6tnU1EcCN ipvQ== X-Gm-Message-State: AOAM531MScroXgfZoCjfYPgKkaxm2AfTYoNcLz+uolPXzTD+VjL/pqHa n0o42PrXPuoPKuFe8nUi7GPXBX8H8MlYNM++ X-Google-Smtp-Source: ABdhPJwYwnM9tesV2RvtcOKkWZ/bt7W6U4M25fkR08Z3nOhUqPInQPPfgIqcZl7gbd2ePpExMwf86w== X-Received: by 2002:ac8:6746:: with SMTP id n6mr7702190qtp.236.1615473614795; Thu, 11 Mar 2021 06:40:14 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 12/57] tcg/tci: Reuse tci_args_l for exit_tb Date: Thu, 11 Mar 2021 08:39:13 -0600 Message-Id: <20210311143958.562625-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82b; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Do not emit a uint64_t, but a tcg_target_ulong, aka uintptr_t. This reduces the size of the constant on 32-bit hosts. The assert for label !=3D NULL has to be removed because that is a valid value for exit_tb. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 13 ++++--------- tcg/tci/tcg-target.c.inc | 2 +- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 066e27b492..6fbbc48ecf 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -160,9 +160,7 @@ tci_read_ulong(const tcg_target_ulong *regs, const uint= 8_t **tb_ptr) =20 static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr) { - tcg_target_ulong label =3D tci_read_i(tb_ptr); - tci_assert(label !=3D 0); - return label; + return tci_read_i(tb_ptr); } =20 /* @@ -400,7 +398,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tcg_target_ulong regs[TCG_TARGET_NB_REGS]; long tcg_temps[CPU_TEMP_BUF_NLONGS]; uintptr_t sp_value =3D (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS); - uintptr_t ret =3D 0; =20 regs[TCG_AREG0] =3D (tcg_target_ulong)env; regs[TCG_REG_CALL_STACK] =3D sp_value; @@ -815,9 +812,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, /* QEMU specific operations. */ =20 case INDEX_op_exit_tb: - ret =3D *(uint64_t *)tb_ptr; - goto exit; - break; + tci_args_l(&tb_ptr, &ptr); + return (uintptr_t)ptr; + case INDEX_op_goto_tb: /* Jump address is aligned */ tb_ptr =3D QEMU_ALIGN_PTR_UP(tb_ptr, 4); @@ -975,6 +972,4 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, } tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); } -exit: - return ret; } diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index c79f9c32d8..ff8040510f 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -401,7 +401,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, =20 switch (opc) { case INDEX_op_exit_tb: - tcg_out64(s, args[0]); + tcg_out_i(s, args[0]); break; =20 case INDEX_op_goto_tb: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473900; cv=none; d=zohomail.com; s=zohoarc; b=Y4Tt5Hp4bv9Vp9jjpyu+FwdZLSH7I6m9z1eoUgX5dY2MzMM28vBcjcqa2UZcMMBwcYMZB6TybcHLt345BwcaqIzj5RYfr8+RNpyVpUouee65zP2l4nTApp65GiP1/8MUu9Qp0FfYbGcnCYqe9iwmVWBq9Dik/NcO/EGcD1vxR3o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473900; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tDBHUplRWlhhF0tIGzcFewPFwl6oh2HCB/aPTX+DVBc=; b=RXMJO9taWE4tBPOZVvZ7bxF3z8s10ntRu0zx33LYyVdEQVLLgy5rHnuIx46RTUShY/nmafU8YAHb6o+R/FJg5M28vl+AghPgcdDvWkq2IJN8J3Bm43eUmxOzmzH+gCBZ4Kz3fFl52wqUmBtD6f+ltns4l0bPPR0UINCDyp3Qtxs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473900728840.2205724044824; Thu, 11 Mar 2021 06:45:00 -0800 (PST) Received: from localhost ([::1]:54560 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMYb-0000ZM-AQ for importer@patchew.org; Thu, 11 Mar 2021 09:44:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39692) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMU9-0003EN-6U for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:21 -0500 Received: from mail-qt1-x830.google.com ([2607:f8b0:4864:20::830]:39436) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU7-0006IX-2F for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:20 -0500 Received: by mail-qt1-x830.google.com with SMTP id g24so1268066qts.6 for ; Thu, 11 Mar 2021 06:40:17 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tDBHUplRWlhhF0tIGzcFewPFwl6oh2HCB/aPTX+DVBc=; b=K23fPZWY01m1UBpz8VCVQrmX9mD9Ucoze/PjqgxmTBa++65AnevNa8TIMklSfACYLJ U1YLu/N5hVP9cG9xd05Z+7YTmildxAA6RSi9SaxgaX0tciWbu+NJR/5yeLnK9NwZD+nR F0oPCJJCXvgkNclqRButmUAs04VM1fmEZDVTqfvXuy3msIGa4C3ojUbCnZu8eRnaPWPa 6PIw6TAI0jfbzE4CwjPp87V5J2BuvPaJEYpGy1jLc4kkbmxJZMovsXjlezbC415sTlEJ qexFnsKoBuVxJTBCXPuaXh1gQQUD9gPpy2uYcMWB0VNRl7sXzJ2XLl46H8T9XjFNkxhZ wOXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tDBHUplRWlhhF0tIGzcFewPFwl6oh2HCB/aPTX+DVBc=; b=Svb9vMPx9JxTi5/YnbYrwloan3sL9kkSFnpCuCNs2ZjVMpW16y4O75ohWBPwfPet0C m4uzGE+mL+b7bqbOzkbmI7dg6FkMc/WlHKPsoTRPyJAo/M8PipjacTgqNE89nDmnbWrK 79Vj8W69jkjO+LKrVVMCi4Fx45M4UxVCwpDpAR0Vyasu1mP6dHcyEICVj74O1OId8kol OQBP6fGfeIPmEKyYgH/xcwNVT7vNfKz5qTjk1y3QEhEoAnwdLFRdyrsMgeDwRJQCPwz1 HJRYX4E/TJll+K8ouDeb+F/jDnaURZTFIrADpiw+SVciYflg5ehp2E/1y+2yA6rlHflG vCxw== X-Gm-Message-State: AOAM530pzqGp0Bqiqx0gKTrt3kW/NAvQ0PBiviBOOOB+i39OkPO9Mj5x BwzJ3MvE/YtgnBMN98ocgrNfRnap7anSBX3I X-Google-Smtp-Source: ABdhPJwnKqx6s3Z+Q9vPH7RtI7msYBiyNRPmxca0lmL09wHr084n8Dz3szvFCtqpx2qx7va0nZKfGQ== X-Received: by 2002:aed:3886:: with SMTP id k6mr6274889qte.167.1615473616277; Thu, 11 Mar 2021 06:40:16 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 13/57] tcg/tci: Reuse tci_args_l for goto_tb Date: Thu, 11 Mar 2021 08:39:14 -0600 Message-Id: <20210311143958.562625-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::830; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x830.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Convert to indirect jumps, as it's less complicated. Then we just have a pointer to the tb address at which the chain is stored, from which we read. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 11 +++-------- tcg/tci.c | 8 +++----- tcg/tci/tcg-target.c.inc | 13 +++---------- 3 files changed, 9 insertions(+), 23 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 9c0021a26f..9285c930a2 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -87,7 +87,7 @@ #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_goto_ptr 0 -#define TCG_TARGET_HAS_direct_jump 1 +#define TCG_TARGET_HAS_direct_jump 0 #define TCG_TARGET_HAS_qemu_st8_i32 0 =20 #if TCG_TARGET_REG_BITS =3D=3D 64 @@ -174,12 +174,7 @@ void tci_disas(uint8_t opc); =20 #define TCG_TARGET_HAS_MEMORY_BSWAP 1 =20 -static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jm= p_rx, - uintptr_t jmp_rw, uintptr_t ad= dr) -{ - /* patch the branch destination */ - qatomic_set((int32_t *)jmp_rw, addr - (jmp_rx + 4)); - /* no need to flush icache explicitly */ -} +/* not defined -- call should be eliminated at compile time */ +void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); =20 #endif /* TCG_TARGET_H */ diff --git a/tcg/tci.c b/tcg/tci.c index 6fbbc48ecf..3fe0831b33 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -816,13 +816,11 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, return (uintptr_t)ptr; =20 case INDEX_op_goto_tb: - /* Jump address is aligned */ - tb_ptr =3D QEMU_ALIGN_PTR_UP(tb_ptr, 4); - t0 =3D qatomic_read((int32_t *)tb_ptr); - tb_ptr +=3D sizeof(int32_t); + tci_args_l(&tb_ptr, &ptr); tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); - tb_ptr +=3D (int32_t)t0; + tb_ptr =3D *(void **)ptr; continue; + case INDEX_op_qemu_ld_i32: t0 =3D *tb_ptr++; taddr =3D tci_read_ulong(regs, &tb_ptr); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index ff8040510f..2c64b4f617 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -405,16 +405,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 case INDEX_op_goto_tb: - if (s->tb_jmp_insn_offset) { - /* Direct jump method. */ - /* Align for atomic patching and thread safety */ - s->code_ptr =3D QEMU_ALIGN_PTR_UP(s->code_ptr, 4); - s->tb_jmp_insn_offset[args[0]] =3D tcg_current_code_size(s); - tcg_out32(s, 0); - } else { - /* Indirect jump method. */ - TODO(); - } + tcg_debug_assert(s->tb_jmp_insn_offset =3D=3D 0); + /* indirect jump method. */ + tcg_out_i(s, (uintptr_t)(s->tb_jmp_target_addr + args[0])); set_jmp_reset_offset(s, args[0]); break; =20 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615473769; cv=none; d=zohomail.com; s=zohoarc; b=D5DwTxUjiJAi7H+RGbxwTd9F7L7BH1ziGMhusp9sUXKaitQgaXYbuK7rt+Wg0MYkgY+rE8Y+fpOZCtIvznP2gu4hKAVxP7tbq5m1lGwg/m5da+ATJYKKP47xrLkNPBPw5QU+WRwS3N2rEbOmYB4fZ+Gh8DjO3/XY1nXVAYHnjp0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615473769; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=E7uiPbIkaltXGyGrTOejJhAFYjDYkkPY5RpXmb9ap/U=; b=VgVTuSIzjk3Q4AmbY8EITFajhKoqtuiiuefYXPwxxO84AuphDIgjegMsVrGrzBfoHS5kfaQj/qgxpjTSkgsNJRdTsGGx1CUYMQoQaNwTbGueHHOrFqJGmB9Gi+9g6um1shpqXMapRO2YVpHRKcEgjVeJa605QTYmRG4+vtzjhJc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615473769297745.4023268289752; Thu, 11 Mar 2021 06:42:49 -0800 (PST) Received: from localhost ([::1]:45740 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMWW-0005Jc-8c for importer@patchew.org; Thu, 11 Mar 2021 09:42:48 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39724) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUA-0003Gh-CK for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:22 -0500 Received: from mail-qk1-x732.google.com ([2607:f8b0:4864:20::732]:33784) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU7-0006If-3N for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:22 -0500 Received: by mail-qk1-x732.google.com with SMTP id l4so20792862qkl.0 for ; Thu, 11 Mar 2021 06:40:18 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E7uiPbIkaltXGyGrTOejJhAFYjDYkkPY5RpXmb9ap/U=; b=Ei4nU4eiMdLD9kUWaJea7qgUG0qap+/UJrbMMFi15JjivBGLjw+NJ11r0BKc6OMLdJ Wlty0Z7RROHZBVz6Flh1MOw1jMl/TFle3H74G2MnYvnEXza1BjKVscRpSzDFLMZ/4JZL f/8sddvm3GYrL4JF9YFxsjBE3gtCR/5UPNbjWx1X0LzeJxLntMorxeiBImprPo/qt8t8 auw7fB9djpHxQ/F9WxlpRSyk47I4pL2jmOPHdAYxNSedFc4rbrzNdJU0fSGU6jpKZvR6 Uunwssb6ehkfKn27aEcKlNLuTClmML/mmjUR4Kw33fHadxM+igSIE8f+o6RFb4br9YoI h5CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E7uiPbIkaltXGyGrTOejJhAFYjDYkkPY5RpXmb9ap/U=; b=ek+/tEsN9BOvqw/nb9ZrpJBVIWR0QTrQ25yQaFN4HiNWHgImydWvdJiNGA/Snl+93Q 3YZddoaWG4m1Q7qRYyxrQTcE/M7Ad+dx/MHLvNVkx19cAlRta0nTgwQbwWZwcjYh3wmw eFSv19XR7jImmQP8VEUg4ohj0Qcaikk9eqlh832hpt8Q6C0/vAMa7Jzh7zx3iAXTJ1PG QWGdRX0vxroYwj9OOj0hSxR/7omk5Vg+GJClpNqqtbk/Fmmv60+SiPLej//f9YPuPz+/ 8z1nw9uqvhoPMWOOioFCfnPrj4EFqPsgVRZ7TDJ/R2TNnO50K2Amgz1bt4tkAdOuGP9x Vi3g== X-Gm-Message-State: AOAM530D7qHHHtIX6h94r9cmxRYc+myCrfagIalX7jjkeEuw8HEpvFxV THI+OZba2g9eAZ3o31u42030nWh+jhSZGLtZ X-Google-Smtp-Source: ABdhPJxwfcCnJvZ8HfdJ/Wtni+gfJtoEGFnvmqx3uAw2DwDjK9sIS3O5PH+ZQ1ehz7cHfLEaEH46Ug== X-Received: by 2002:a37:f518:: with SMTP id l24mr7720907qkk.118.1615473617774; Thu, 11 Mar 2021 06:40:17 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 14/57] tcg/tci: Split out tci_args_rrrrrr Date: Thu, 11 Mar 2021 08:39:15 -0600 Message-Id: <20210311143958.562625-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::732; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x732.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 3fe0831b33..8b38687d9a 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -258,6 +258,17 @@ static void tci_args_rrrrrc(const uint8_t **tb_ptr, TC= GReg *r0, TCGReg *r1, *r4 =3D tci_read_r(tb_ptr); *c5 =3D tci_read_b(tb_ptr); } + +static void tci_args_rrrrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, + TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *r3 =3D tci_read_r(tb_ptr); + *r4 =3D tci_read_r(tb_ptr); + *r5 =3D tci_read_r(tb_ptr); +} #endif =20 static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) @@ -420,7 +431,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint32_t tmp32; uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r3, r4; + TCGReg r3, r4, r5; uint64_t T1, T2; #endif TCGMemOpIdx oi; @@ -626,18 +637,16 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: - t0 =3D *tb_ptr++; - t1 =3D *tb_ptr++; - tmp64 =3D tci_read_r64(regs, &tb_ptr); - tmp64 +=3D tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t1, t0, tmp64); + tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + T1 =3D tci_uint64(regs[r3], regs[r2]); + T2 =3D tci_uint64(regs[r5], regs[r4]); + tci_write_reg64(regs, r1, r0, T1 + T2); break; case INDEX_op_sub2_i32: - t0 =3D *tb_ptr++; - t1 =3D *tb_ptr++; - tmp64 =3D tci_read_r64(regs, &tb_ptr); - tmp64 -=3D tci_read_r64(regs, &tb_ptr); - tci_write_reg64(regs, t1, t0, tmp64); + tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + T1 =3D tci_uint64(regs[r3], regs[r2]); + T2 =3D tci_uint64(regs[r5], regs[r4]); + tci_write_reg64(regs, r1, r0, T1 - T2); break; case INDEX_op_brcond2_i32: tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474329; cv=none; d=zohomail.com; s=zohoarc; b=WmnxphWKjLMjnamOiZjT+MxfkL/Cm9PJ/ufmynnlS7Vt3P/OMYjJFC3unpcUQuYfgoNIPpFTTtxYkOXX7aBFrAl0yJnCsRiVYUXtH7yDAXpPaGXWuRRjdeNFscXxTRbc4ylD53n4E14ZLZ1hjl7t6uM02gdRkKtWXc0AGMhO5T4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474329; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=tWt9l+M7f3QWN4u3GyxAdQRX+QI3GedTTpv25vEiGn4=; b=VIPgZ881Q7wi988IBBJ5nNt2KB8CIMT1IBm2WfthZOQXuMY8+v8kwUaoglRmn4nV9B4cNlvavu4V6QYUmuvx7FefXfvKQta2LNw2R5TyCXw4/EhsbpS6QW3Ey4sZd3x5YLeCTEKJ1TVEYuOkcoxeOeyHWQOEFtD5q3+XKw8/nCM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474329103114.7380340338367; Thu, 11 Mar 2021 06:52:09 -0800 (PST) Received: from localhost ([::1]:43966 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMfY-00007U-38 for importer@patchew.org; Thu, 11 Mar 2021 09:52:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39782) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUC-0003Kp-Om for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:24 -0500 Received: from mail-qk1-x72a.google.com ([2607:f8b0:4864:20::72a]:40806) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU8-0006Jh-PX for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:24 -0500 Received: by mail-qk1-x72a.google.com with SMTP id l132so20781125qke.7 for ; Thu, 11 Mar 2021 06:40:19 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tWt9l+M7f3QWN4u3GyxAdQRX+QI3GedTTpv25vEiGn4=; b=uncqWWaG4vFNjsTbWwBxi1WegtDF/Dcp8KM5CPWIRM6DXXMXCRBa7O33+P1ODJAPlU AEkRtcLi5MNvLj23S5y3PYpjeT4ANf6DTWmj64d5nMZWAJ1hnGBiRtbHrlgOju6/9XyI ulqkqTsOwDfPbuIljf4yZbxN/w/m43qA/e9P6fpDqPqM4Fqodfxr7FJoJo4cgYGY7uR8 x+yUXAgZ3WJRCoJPCoSHp1VM8IfQ0T+rfkW5ZeCTW1jw1ObljS7GTajfXMwLBOtdHumY RNsvmhRF6ZEy8RKVtdBziLUnkKd0vvTB3spi8d5s5ha71f0h9NVPiLtYwLcJJiq8NUWx UkFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tWt9l+M7f3QWN4u3GyxAdQRX+QI3GedTTpv25vEiGn4=; b=srX3GWQqVP1+pM2hBr4E/SFXNHfwyIILFSHxh31yTNUxUeqsba9KJT8N45myOya+Km qj/fg88ziedMltDChcQ+xsStnblj9eZ06hblgEqED/lPud2TT51F6tCgNiYTrUbaD3JK FOSLgyQTNOr3MhNqgBKmo/uZRtskpe8W+IN7wAsP4sJi2itfcr8nOJN9/uu01DJ7FQ4i ePzhaKiW5l8+JjJR4XHQ9j7jmhnDpQUjIsjCsNvqK5gxPLAydpjicqdmALX7HtengQjb pHnTr2ltTuAySFyIfRrMQ+mz4BoH0XX1GhS4CE/rBKch4qOs26F8aFbn5INGJ9/hUXPX 8o9g== X-Gm-Message-State: AOAM532YKtiwpuwcFi/x+E7108xPpewzPCDgwTR/RIHUvfShCUSNHpvW Cp0NK9h0Z7NedbGqA6qfthI4orf5uFtckKtM X-Google-Smtp-Source: ABdhPJydwTdWGrT35HHeslrULcxlL2yR3wxpVMKW1H9lPeCd1EaN8WY5frelFJ4rqAat0YXTFpxIXQ== X-Received: by 2002:ae9:e502:: with SMTP id w2mr8018921qkf.75.1615473619032; Thu, 11 Mar 2021 06:40:19 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 15/57] tcg/tci: Split out tci_args_rrrr Date: Thu, 11 Mar 2021 08:39:16 -0600 Message-Id: <20210311143958.562625-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72a; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 8b38687d9a..10f58e4f25 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -237,6 +237,15 @@ static void tci_args_rrrc(const uint8_t **tb_ptr, } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 +static void tci_args_rrrr(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *r3 =3D tci_read_r(tb_ptr); +} + static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5) { @@ -659,11 +668,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, } break; case INDEX_op_mulu2_i32: - t0 =3D *tb_ptr++; - t1 =3D *tb_ptr++; - t2 =3D tci_read_rval(regs, &tb_ptr); - tmp64 =3D (uint32_t)tci_read_rval(regs, &tb_ptr); - tci_write_reg64(regs, t1, t0, (uint32_t)t2 * tmp64); + tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); + tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]); break; #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474439; cv=none; d=zohomail.com; s=zohoarc; b=PR5hP9MZe/4qjkfSi82+anqzS9o6dHBJWbLvBO8lfW3a/Vh5svn0h3dXHovheKMgMlnFhZGLAqIuFuTyt23UdMJoLJaWz+NPP3ML8sPmgqUdEll7rCW2Ge3D7MgCN5S46uIhj2V1WJPd7tDG0EwHd7iJu8if7LNsr50bX4UNRlo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474439; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=e1N26oOEBH/mKZCKJR62A/M2uXOOm6+5WQ72+nFodnM=; b=UD0Ob/UEhiZzgp1vxKAJNxyUz2RIxW3nXqLd3PA0BumwBTtTzzorm3tSc+0rvx24j3vJVQUXrLhj/YBu8yhGYolqVvuJFMXrsY3ysdPQBB9W5YwHwCm5Ua0PU1AxgSXtBZZITonMamSSSF2mzhRbjyozhnIpNXtKZ/ojf23uw9g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474439478421.51195333220335; Thu, 11 Mar 2021 06:53:59 -0800 (PST) Received: from localhost ([::1]:52202 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMhK-0003dL-Bx for importer@patchew.org; Thu, 11 Mar 2021 09:53:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39798) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUD-0003N2-Ld for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:25 -0500 Received: from mail-qk1-x730.google.com ([2607:f8b0:4864:20::730]:34272) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMU9-0006LM-8L for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:25 -0500 Received: by mail-qk1-x730.google.com with SMTP id t4so20833401qkp.1 for ; Thu, 11 Mar 2021 06:40:20 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e1N26oOEBH/mKZCKJR62A/M2uXOOm6+5WQ72+nFodnM=; b=ecrEZu2JraY6CmgMXmq+4QskeBprQ4edgKb1i1MaEGHDBRDY3Pi0iKjoXjOfrkHWou ZxlGMfubWDaLEZQv3o2XR2TP1OW15bwLGC2esCSgqArz7tFZozD6AH0S/6sX3D8IWTCA Rm9KIWedywdauSiek15q/cR6N/8O4P6xoSyb/0wQJH8/WMwV0ODhJ9vk/Y4jIYJpzyC0 aQzpebN1fEadDedPodPwuKPlEXtdGq8zOKvXzhBkFSp8DdXHKoxTMIDqUzJaXA75FW/k 5L+mn3/j2dhfhA7c2I61HlaKoXgJiCotmOj9Ak5iUI+/K6ByXUEMw2uJf3rfYn94UXq8 l8GA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e1N26oOEBH/mKZCKJR62A/M2uXOOm6+5WQ72+nFodnM=; b=kUXQi6lKz+CBIhG34+bmcRwM1hx7T37D3C0EuoQhNFfFBX5y+kUe8tXiwaErTdo4p+ VOgxZm14NubCS1bjxquxczvJngzRtuKj+faV2Ib+9RyR0XFB2bMpisNlvhyNy23GhScV 8a8KA+gqWYEWYifrz6xm5oPkDSkV5SeM9BqqdDLKk9FHDpdVODWR1H5XF5la/tWYAjbq QUTOiHjAuhb4z8bqmyIwVBQL3+66u6I10+aEPRSTPooo3wqqzAJ50Tjf7v/aJ/7HNDvy qZDFzldFOmJwTiocv/p2Zk8S0VDbEOgqlo1kykIILl/NEi8s8/8nC1ATefnwZiYOiS7g evSg== X-Gm-Message-State: AOAM532HDVS0gc4dLSqZNLn0Pl9Qg08DYjRxo+hJc0bMjKLyoPPQaSt2 AaU63/vRgi3KBqLYuG2E0GuMka3XUSAXgHyq X-Google-Smtp-Source: ABdhPJwz5OMywvbQ0Ad2NZazS9b7e06yKY13S46ZjmSZHs3TlRnmJxJJJh2kaw0OhFy8MPknUVogFw== X-Received: by 2002:a37:a183:: with SMTP id k125mr7895349qke.332.1615473620188; Thu, 11 Mar 2021 06:40:20 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 16/57] tcg/tci: Clean up deposit operations Date: Thu, 11 Mar 2021 08:39:17 -0600 Message-Id: <20210311143958.562625-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::730; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x730.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Use the correct set of asserts during code generation. We do not require the first input to overlap the output; the existing interpreter already supported that. Split out tci_args_rrrbb in the translator. Use the deposit32/64 functions rather than inline expansion. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target-con-set.h | 1 - tcg/tci.c | 33 ++++++++++++++++----------------- tcg/tci/tcg-target.c.inc | 24 ++++++++++++++---------- 3 files changed, 30 insertions(+), 28 deletions(-) diff --git a/tcg/tci/tcg-target-con-set.h b/tcg/tci/tcg-target-con-set.h index f51b7bcb13..316730f32c 100644 --- a/tcg/tci/tcg-target-con-set.h +++ b/tcg/tci/tcg-target-con-set.h @@ -13,7 +13,6 @@ C_O0_I2(r, r) C_O0_I3(r, r, r) C_O0_I4(r, r, r, r) C_O1_I1(r, r) -C_O1_I2(r, 0, r) C_O1_I2(r, r, r) C_O1_I4(r, r, r, r, r) C_O2_I1(r, r, r) diff --git a/tcg/tci.c b/tcg/tci.c index 10f58e4f25..3ce2b72316 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -168,6 +168,7 @@ static tcg_target_ulong tci_read_label(const uint8_t **= tb_ptr) * tci_args_ * where arguments is a sequence of * + * b =3D immediate (bit position) * i =3D immediate (uint32_t) * I =3D immediate (tcg_target_ulong) * r =3D register @@ -236,6 +237,16 @@ static void tci_args_rrrc(const uint8_t **tb_ptr, *c3 =3D tci_read_b(tb_ptr); } =20 +static void tci_args_rrrbb(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, + TCGReg *r2, uint8_t *i3, uint8_t *i4) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *i3 =3D tci_read_b(tb_ptr); + *i4 =3D tci_read_b(tb_ptr); +} + #if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) @@ -432,11 +443,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, TCGReg r0, r1, r2; tcg_target_ulong t0; tcg_target_ulong t1; - tcg_target_ulong t2; TCGCond condition; target_ulong taddr; - uint8_t tmp8; - uint16_t tmp16; + uint8_t pos, len; uint32_t tmp32; uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 @@ -627,13 +636,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, #endif #if TCG_TARGET_HAS_deposit_i32 case INDEX_op_deposit_i32: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tmp16 =3D *tb_ptr++; - tmp8 =3D *tb_ptr++; - tmp32 =3D (((1 << tmp8) - 1) << tmp16); - tci_write_reg(regs, t0, (t1 & ~tmp32) | ((t2 << tmp16) & tmp32= )); + tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + regs[r0] =3D deposit32(regs[r1], pos, len, regs[r2]); break; #endif case INDEX_op_brcond_i32: @@ -789,13 +793,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, #endif #if TCG_TARGET_HAS_deposit_i64 case INDEX_op_deposit_i64: - t0 =3D *tb_ptr++; - t1 =3D tci_read_rval(regs, &tb_ptr); - t2 =3D tci_read_rval(regs, &tb_ptr); - tmp16 =3D *tb_ptr++; - tmp8 =3D *tb_ptr++; - tmp64 =3D (((1ULL << tmp8) - 1) << tmp16); - tci_write_reg(regs, t0, (t1 & ~tmp64) | ((t2 << tmp16) & tmp64= )); + tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + regs[r0] =3D deposit64(regs[r1], pos, len, regs[r2]); break; #endif case INDEX_op_brcond_i64: diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 2c64b4f617..640407b4a8 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -126,11 +126,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpco= de op) case INDEX_op_rotr_i64: case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: - return C_O1_I2(r, r, r); - case INDEX_op_deposit_i32: case INDEX_op_deposit_i64: - return C_O1_I2(r, 0, r); + return C_O1_I2(r, r, r); =20 case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: @@ -480,13 +478,19 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, break; =20 CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_debug_assert(args[3] <=3D UINT8_MAX); - tcg_out8(s, args[3]); - tcg_debug_assert(args[4] <=3D UINT8_MAX); - tcg_out8(s, args[4]); + { + TCGArg pos =3D args[3], len =3D args[4]; + TCGArg max =3D opc =3D=3D INDEX_op_deposit_i32 ? 32 : 64; + + tcg_debug_assert(pos < max); + tcg_debug_assert(pos + len <=3D max); + + tcg_out_r(s, args[0]); + tcg_out_r(s, args[1]); + tcg_out_r(s, args[2]); + tcg_out8(s, pos); + tcg_out8(s, len); + } break; =20 CASE_32_64(brcond) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474733; cv=none; d=zohomail.com; s=zohoarc; b=SGTGnlN1XqmqZt2KESPoUEebG+GaidfMZ87uE9eqoF9dHxCuPCY41vkRwAtZ6nCFVPWVbcCYCyJp3dpNOxa6/pmQvAUUIb6kp4VWBHCu+p02ZYFUdpkKz8QR9WHBEouuC9HCeiEKPIM+E8KNLx86Jmg8bG8DyDjpqSbmJi0orDQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474733; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=NtYy7CVHSUTsrLhd0g6enXEgT6j0TcJMSjVB1gNIEaI=; b=YRczxc6P/OmeaTrpWP2bvlgZO/rslUmS+ygq0EWNO6YaPMXbNF2O3qARPchiMLczI/dcfLc9fTchXCov0VhvFJ9Er4PKS9tYlqSC++LLdxcRJgLk84eH6olhJWmD1uaTZoKjxjHaJ0Ueofugd+i5R2ue70dQDtDGOhWqvORcovs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474733865639.9049492180563; Thu, 11 Mar 2021 06:58:53 -0800 (PST) Received: from localhost ([::1]:44386 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMm4-0003ub-OE for importer@patchew.org; Thu, 11 Mar 2021 09:58:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39802) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUD-0003Ni-RS for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:25 -0500 Received: from mail-qv1-xf2f.google.com ([2607:f8b0:4864:20::f2f]:42556) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUA-0006NI-8f for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:25 -0500 Received: by mail-qv1-xf2f.google.com with SMTP id 30so2635387qva.9 for ; Thu, 11 Mar 2021 06:40:21 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NtYy7CVHSUTsrLhd0g6enXEgT6j0TcJMSjVB1gNIEaI=; b=v2CJCwAYSkbIChPQ/aL+vZ9Vh4m+ODwgVhkrjXCsIKZpgkadg61BDJY7kcQjEt4U5e 2GoUFP44j2a5o6rkndxkF3lawr3GBulElbRIG9dbIDMonXNp0VOgI66o6cbcEeuyLwl/ Xl4HgQguFVMwP+ql9FBz3UYNeXWSzyKjiiEOYP9joAd5ulLyyTCSg9gYJC4vAlubepUm IrI4F6hWHEnQ493W1v0AOQKld0hmLPnuZdBzyYnGiC49VZcly8gwI6S1e0JxEPjApuzH Zpdg8wyRlt7cFqtOJGdlUa4AedNKyuSV3T75jHkU3q2e0n9O+4zXCgye5rBHWmeYPEqf HL6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NtYy7CVHSUTsrLhd0g6enXEgT6j0TcJMSjVB1gNIEaI=; b=nA4hMHybDloAjmSM1TrCHLx4cMW9ZPKQYQzMKtsvdb8INHlWfiWcm05G4tmYuK88BN M5ka3pqDzqocG9Htn9lj1E7G1j0fNXbpRUrgLnuyNwY4tVGCBOJT9n3YGJ+WAR6sE9ed m5QwZum/vgk2AmuCYKn+SE9p2wHxTjG+kPeYOYIc/o/oUDJf97LUoKru1TQclVCJNNYe 30JWYDRK8xF3FQobSJ61AHc0EPpd97sgaEGkyGtTyHScm6plRG25/YVbYvjfdwRg7IQw Vpv9A4lsGo61spSjMmh9eHOi4AHzNOnPysbD0/Ha/yhXRRjtJ0sbLc3wyMXr8vOyYYPf vLEg== X-Gm-Message-State: AOAM530FD/cxqfm2407zIsYdTBbrfQldn4/hCZmAWGfZLLrJIz0MEjsZ j2EhPvmUWxqoaekVxJWM2Fd1CDHvpFAYiA2v X-Google-Smtp-Source: ABdhPJya9DFfLF9vjW6wY4/LHI1r3E3xxdWA7mLZceO/nCzaY+n4IWLiHt7V5swPApsbLA+XHaodCQ== X-Received: by 2002:a05:6214:1103:: with SMTP id e3mr8069970qvs.12.1615473621378; Thu, 11 Mar 2021 06:40:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 17/57] tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits Date: Thu, 11 Mar 2021 08:39:18 -0600 Message-Id: <20210311143958.562625-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2f; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We are currently using the "natural" size routine, which uses 64-bits on a 64-bit host. The TCGMemOpIdx operand has 11 bits, so we can safely reduce to 32-bits. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 8 ++++---- tcg/tci/tcg-target.c.inc | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 3ce2b72316..583059f319 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -838,7 +838,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_qemu_ld_i32: t0 =3D *tb_ptr++; taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i(&tb_ptr); + oi =3D tci_read_i32(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { case MO_UB: tmp32 =3D qemu_ld_ub; @@ -875,7 +875,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, t1 =3D *tb_ptr++; } taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i(&tb_ptr); + oi =3D tci_read_i32(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { case MO_UB: tmp64 =3D qemu_ld_ub; @@ -924,7 +924,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_qemu_st_i32: t0 =3D tci_read_rval(regs, &tb_ptr); taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i(&tb_ptr); + oi =3D tci_read_i32(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { case MO_UB: qemu_st_b(t0); @@ -948,7 +948,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_qemu_st_i64: tmp64 =3D tci_read_r64(regs, &tb_ptr); taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i(&tb_ptr); + oi =3D tci_read_i32(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { case MO_UB: qemu_st_b(tmp64); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 640407b4a8..6c187a25cc 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -550,7 +550,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { tcg_out_r(s, *args++); } - tcg_out_i(s, *args++); + tcg_out32(s, *args++); break; =20 case INDEX_op_qemu_ld_i64: @@ -563,7 +563,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { tcg_out_r(s, *args++); } - tcg_out_i(s, *args++); + tcg_out32(s, *args++); break; =20 case INDEX_op_mb: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474447; cv=none; d=zohomail.com; s=zohoarc; b=TGAHGuCPeSj1fvUUR4YTnmSJpEKpxfyjwPFphjSoA6K54bg0tSPjTxAPZUIQvUdq4la7dYUUiZm222XeNGq5muDEmuyc/g+2T+tQ13XSfP5q6JxkpCzJAhmDJRZHnzAuSjUwOsaSTPqCDawjdZ2TKqPxPslFhwPYEn3cJ3fLsAM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474447; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=BGjOxn7oBYKM0brcxUQhOzUdPq+WpZr2L0yE6bqXqs8=; b=bTd7FXzH6a9Utpj+ZIqw1g20vnh4CfP5iLmym70k9d0zRcEOXA/nuwK81KPiZsWGZ5oE1nRv2oQOeTYxmZGUvV87e+N7iEUjLapGtePZCw/Uue9tGWCDBP8b6hFar8/K1/m54h+rBmhKzfGZ0qgN60V4PlFblFIFzCLllY1TpjA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474447434440.27877361027674; Thu, 11 Mar 2021 06:54:07 -0800 (PST) Received: from localhost ([::1]:52734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMhS-0003qf-6j for importer@patchew.org; Thu, 11 Mar 2021 09:54:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39824) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUE-0003QV-QP for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:26 -0500 Received: from mail-qt1-x82a.google.com ([2607:f8b0:4864:20::82a]:36425) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUB-0006Pp-VY for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:26 -0500 Received: by mail-qt1-x82a.google.com with SMTP id 6so1260023qty.3 for ; Thu, 11 Mar 2021 06:40:23 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BGjOxn7oBYKM0brcxUQhOzUdPq+WpZr2L0yE6bqXqs8=; b=AdxABiE5X+6R2j/4OAE958knatrfqErhDGt7NVlqC/ak3KfR+x1svpk6aMgJpjJSHk +GwE8AcChYeVKtaqVA9Im9RTOYeVycXZIpo1gZxg2KWYV4BRtFKg/eyAOcGSprTtPDBp m5jlsfLl+PyT5+f5o3EBqQxRqnMOvtwSLDilfisxDKm82OG0z4wklkhGgXPKMCAmZn2i SHHLQBDbt7gNnZ1uMbff8I8OpTwHgoZ7uMdiCBslQAzydh72XnBaP7JZJiluJuspo40K RAo1vgGpIUwkmAtaOrsTW01O+e+C4wvMPY0Ntb98ugJqmsFY88rLFvOPTzNPOLJt3eM2 dZRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BGjOxn7oBYKM0brcxUQhOzUdPq+WpZr2L0yE6bqXqs8=; b=NyX7wBNQK4PVVyF2YDY9+Pa6zXwhqZYJ148iXoQSLawy1mBmdtYs2M6Qg4eaX5bF2c as2ZOi+4Kt2dbFjwTFf3FqIItnT9BkTjqJOgmRpPc1qEODpZz91u4RCof8S/tVryCKrQ FiNS88AFaakVVBeDASPk3PWbn8BuyWZjOUZSLubxWuWQr0JFyUAJQJ0gQboI43ANUF0a FmnfLvQ/Iht307Lj7p4iaPMX8YhXK2EOrpQLlc72I6yYHiucalpm0ASCpcSCgUwI6xqw Sp0JE7fPGYJR4D/pCDT95mwYijgtu6wKdVFoqUdHzS5VGDps+sAS2E7b+iGvcQWVrxR9 se+A== X-Gm-Message-State: AOAM532Qd5U/Voj7FbeDxvMjyGY/IjgKPN16vLZcXCfYNXHK8bJcbE2C UPL/v2PNbBBNiTTO8p4GDKsCMZwyGiu0kvsJ X-Google-Smtp-Source: ABdhPJyopjomTYH+sZbcUzYBiZAQGleLslttrxWQhKUijAn83hDAYHqWAkN4O9bQxxEdsaM0vWJbsg== X-Received: by 2002:ac8:4e95:: with SMTP id 21mr7533677qtp.177.1615473622686; Thu, 11 Mar 2021 06:40:22 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 18/57] tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm} Date: Thu, 11 Mar 2021 08:39:19 -0600 Message-Id: <20210311143958.562625-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82a; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 147 ++++++++++++++++++++++++++++++------------------------ 1 file changed, 81 insertions(+), 66 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 583059f319..f6cc5a3ab0 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -66,22 +66,18 @@ tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg= _target_ulong value) regs[index] =3D value; } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, uint32_t low_index, uint64_t value) { tci_write_reg(regs, low_index, value); tci_write_reg(regs, high_index, value >> 32); } -#endif =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 /* Create a 64 bit value from two 32 bit values. */ static uint64_t tci_uint64(uint32_t high, uint32_t low) { return ((uint64_t)high << 32) + low; } -#endif =20 /* Read constant byte from bytecode. */ static uint8_t tci_read_b(const uint8_t **tb_ptr) @@ -121,43 +117,6 @@ static int32_t tci_read_s32(const uint8_t **tb_ptr) return value; } =20 -/* Read indexed register (native size) from bytecode. */ -static tcg_target_ulong -tci_read_rval(const tcg_target_ulong *regs, const uint8_t **tb_ptr) -{ - tcg_target_ulong value =3D tci_read_reg(regs, **tb_ptr); - *tb_ptr +=3D 1; - return value; -} - -#if TCG_TARGET_REG_BITS =3D=3D 32 -/* Read two indexed registers (2 * 32 bit) from bytecode. */ -static uint64_t tci_read_r64(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - uint32_t low =3D tci_read_rval(regs, tb_ptr); - return tci_uint64(tci_read_rval(regs, tb_ptr), low); -} -#elif TCG_TARGET_REG_BITS =3D=3D 64 -/* Read indexed register (64 bit) from bytecode. */ -static uint64_t tci_read_r64(const tcg_target_ulong *regs, - const uint8_t **tb_ptr) -{ - return tci_read_rval(regs, tb_ptr); -} -#endif - -/* Read indexed register(s) with target address from bytecode. */ -static target_ulong -tci_read_ulong(const tcg_target_ulong *regs, const uint8_t **tb_ptr) -{ - target_ulong taddr =3D tci_read_rval(regs, tb_ptr); -#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - taddr +=3D (uint64_t)tci_read_rval(regs, tb_ptr) << 32; -#endif - return taddr; -} - static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr) { return tci_read_i(tb_ptr); @@ -171,6 +130,7 @@ static tcg_target_ulong tci_read_label(const uint8_t **= tb_ptr) * b =3D immediate (bit position) * i =3D immediate (uint32_t) * I =3D immediate (tcg_target_ulong) + * m =3D immediate (TCGMemOpIdx) * r =3D register * s =3D signed ldst offset */ @@ -203,6 +163,14 @@ static void tci_args_rI(const uint8_t **tb_ptr, } #endif =20 +static void tci_args_rrm(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGMemOpIdx *m2) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *m2 =3D tci_read_i32(tb_ptr); +} + static void tci_args_rrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2) { @@ -237,6 +205,15 @@ static void tci_args_rrrc(const uint8_t **tb_ptr, *c3 =3D tci_read_b(tb_ptr); } =20 +static void tci_args_rrrm(const uint8_t **tb_ptr, + TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGMemOpIdx = *m3) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *m3 =3D tci_read_i32(tb_ptr); +} + static void tci_args_rrrbb(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, uint8_t *i3, uint8_t *i4) { @@ -247,6 +224,16 @@ static void tci_args_rrrbb(const uint8_t **tb_ptr, TCG= Reg *r0, TCGReg *r1, *i4 =3D tci_read_b(tb_ptr); } =20 +static void tci_args_rrrrm(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, + TCGReg *r2, TCGReg *r3, TCGMemOpIdx *m4) +{ + *r0 =3D tci_read_r(tb_ptr); + *r1 =3D tci_read_r(tb_ptr); + *r2 =3D tci_read_r(tb_ptr); + *r3 =3D tci_read_r(tb_ptr); + *m4 =3D tci_read_i32(tb_ptr); +} + #if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) @@ -440,8 +427,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint8_t op_size =3D tb_ptr[1]; const uint8_t *old_code_ptr =3D tb_ptr; #endif - TCGReg r0, r1, r2; - tcg_target_ulong t0; + TCGReg r0, r1, r2, r3; tcg_target_ulong t1; TCGCond condition; target_ulong taddr; @@ -449,7 +435,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, uint32_t tmp32; uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r3, r4, r5; + TCGReg r4, r5; uint64_t T1, T2; #endif TCGMemOpIdx oi; @@ -836,9 +822,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, continue; =20 case INDEX_op_qemu_ld_i32: - t0 =3D *tb_ptr++; - taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i32(&tb_ptr); + if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + taddr =3D regs[r1]; + } else { + tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + taddr =3D tci_uint64(regs[r2], regs[r1]); + } switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { case MO_UB: tmp32 =3D qemu_ld_ub; @@ -867,15 +857,20 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, default: g_assert_not_reached(); } - tci_write_reg(regs, t0, tmp32); + regs[r0] =3D tmp32; break; + case INDEX_op_qemu_ld_i64: - t0 =3D *tb_ptr++; - if (TCG_TARGET_REG_BITS =3D=3D 32) { - t1 =3D *tb_ptr++; + if (TCG_TARGET_REG_BITS =3D=3D 64) { + tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + taddr =3D regs[r1]; + } else if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + taddr =3D regs[r2]; + } else { + tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); + taddr =3D tci_uint64(regs[r3], regs[r2]); } - taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i32(&tb_ptr); switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { case MO_UB: tmp64 =3D qemu_ld_ub; @@ -916,39 +911,58 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, default: g_assert_not_reached(); } - tci_write_reg(regs, t0, tmp64); if (TCG_TARGET_REG_BITS =3D=3D 32) { - tci_write_reg(regs, t1, tmp64 >> 32); + tci_write_reg64(regs, r1, r0, tmp64); + } else { + regs[r0] =3D tmp64; } break; + case INDEX_op_qemu_st_i32: - t0 =3D tci_read_rval(regs, &tb_ptr); - taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i32(&tb_ptr); + if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + taddr =3D regs[r1]; + } else { + tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + taddr =3D tci_uint64(regs[r2], regs[r1]); + } + tmp32 =3D regs[r0]; switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { case MO_UB: - qemu_st_b(t0); + qemu_st_b(tmp32); break; case MO_LEUW: - qemu_st_lew(t0); + qemu_st_lew(tmp32); break; case MO_LEUL: - qemu_st_lel(t0); + qemu_st_lel(tmp32); break; case MO_BEUW: - qemu_st_bew(t0); + qemu_st_bew(tmp32); break; case MO_BEUL: - qemu_st_bel(t0); + qemu_st_bel(tmp32); break; default: g_assert_not_reached(); } break; + case INDEX_op_qemu_st_i64: - tmp64 =3D tci_read_r64(regs, &tb_ptr); - taddr =3D tci_read_ulong(regs, &tb_ptr); - oi =3D tci_read_i32(&tb_ptr); + if (TCG_TARGET_REG_BITS =3D=3D 64) { + tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + taddr =3D regs[r1]; + tmp64 =3D regs[r0]; + } else { + if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + taddr =3D regs[r2]; + } else { + tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); + taddr =3D tci_uint64(regs[r3], regs[r2]); + } + tmp64 =3D tci_uint64(regs[r1], regs[r0]); + } switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { case MO_UB: qemu_st_b(tmp64); @@ -975,6 +989,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, g_assert_not_reached(); } break; + case INDEX_op_mb: /* Ensure ordering for all kinds */ smp_mb(); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474563; cv=none; d=zohomail.com; s=zohoarc; b=BXgeOW/XBEO4HtOQiS+ZZsdjtORZTTrz//S2gJ47acSTy0rGW1RAP/2RpPMCEUunSKj8UnTL7KhiJyBISQYEcB++5Dt38zKU5Iqdc5ETRAbvH/OcMttXXxv9K1wLht2KAENE1M2cxZK/ET0PcwLtcwO9vKxxKKlFde/WcfGFpvY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474563; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=cto0meToeqhl4dng/D5GTO+M9plTBCVNCtbljoyaQQ8=; b=ETC4OyIzPoisU0ZHbigy141NpA0SF+e2PLCefdn9fnLc2rQse348jFfXcacD5A/wi4eXLxPazOQCvfyXlt60QVesHHHShY8v1rKpalAMOaXw4SUNIvc7lDV/2c5x6nmYJjK5uRjq+pUUivlVjSZ+F8o6Md/nQ0Czz7aSUhblqPg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474563062915.4475874766352; Thu, 11 Mar 2021 06:56:03 -0800 (PST) Received: from localhost ([::1]:33160 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMjJ-0007Vb-Rn for importer@patchew.org; Thu, 11 Mar 2021 09:56:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39844) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUF-0003SN-IZ for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:27 -0500 Received: from mail-qt1-x82d.google.com ([2607:f8b0:4864:20::82d]:40775) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUD-0006Qe-8G for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:27 -0500 Received: by mail-qt1-x82d.google.com with SMTP id r14so1262430qtt.7 for ; Thu, 11 Mar 2021 06:40:24 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cto0meToeqhl4dng/D5GTO+M9plTBCVNCtbljoyaQQ8=; b=hVZoQLATVz5KDqzQr+QxlFEHazpfyEYtOr1ikPMdPTW+6GlRcaf5U+nWXfbpesLs5W YUU95/OV1OS+WzsYfggc0X3+tx91+erv+C6nxq+nzZhd2kBRp1t8pet1IOrK28KE3be7 fDJ5+fcEzNC3WNWaVePmUQtFDhEPXk2jtt6+YSoezAa45SDypG1Nv4FXrPKBOqxbR9se PcUkZWXy8pkkntXiPWOYA5GZEsSBTLPnJc1myuQlMZmnz2FZxjQ4unbZ9XF+OQfClobm 0d0Dwdkv0Wb9Kbjw6e3t9toUMZxwhwF4gYY+WdHvO47oGLByQ64LrSLDqyaDFCT5qmvS r72A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cto0meToeqhl4dng/D5GTO+M9plTBCVNCtbljoyaQQ8=; b=i5xOsBe0Tx93EThqfjsAMIlWRMawpPcvY4MSQOnT9BlJ4iuLB4M3UVJI7KBPAnJtq3 5ytk3TURPosUanjskHUyccuDHmE4r4go7nHEfSmGU60G2qwA5lq+pVw3uvYSPpY2DPBi D6Gv3r/EVsh5TIvl+vzyDCh9jAL+/R8AE4EP90nrGklQ5NcfsU8Nv8s6szffsJq0lVq/ /llyKYrJ9VqqrPgSSsQcX745DGGw/Lv8mTHrOrRvNLQnX2Ao1JeNY51XATuyK6lDqVhw kiT5lpMOdxuREkU6uuXIG3F3Jcq4nzbOSOkBmaljSvc/HXR1yPLYdGIwDeH3ungmvULB Kmgg== X-Gm-Message-State: AOAM532ssW9M/2l0swGGrx05cIXMgj1Zfy4/o+Xa1cC8bVqq86tFuyp1 XtLvPZ4p8KO+zTwyqi4Vxt+G3Fm71A3TEsgw X-Google-Smtp-Source: ABdhPJzwU7pRq2GoAzx6yqlpn+qkcCHhCScH+cffCA8loGGkCA6Vv7218RyfJ6Sgtzn+JrKt2DjYnw== X-Received: by 2002:ac8:4918:: with SMTP id e24mr7586433qtq.79.1615473623860; Thu, 11 Mar 2021 06:40:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 19/57] tcg/tci: Hoist op_size checking into tci_args_* Date: Thu, 11 Mar 2021 08:39:20 -0600 Message-Id: <20210311143958.562625-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82d; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This performs the size check while reading the arguments, which means that we don't have to arrange for it to be done after the operation. Which tidies all of the branches. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 87 ++++++++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 73 insertions(+), 14 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index f6cc5a3ab0..6b63beea28 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -24,7 +24,7 @@ #if defined(CONFIG_DEBUG_TCG) # define tci_assert(cond) assert(cond) #else -# define tci_assert(cond) ((void)0) +# define tci_assert(cond) ((void)(cond)) #endif =20 #include "qemu-common.h" @@ -135,146 +135,217 @@ static tcg_target_ulong tci_read_label(const uint8_= t **tb_ptr) * s =3D signed ldst offset */ =20 +static void check_size(const uint8_t *start, const uint8_t **tb_ptr) +{ + const uint8_t *old_code_ptr =3D start - 2; + uint8_t op_size =3D old_code_ptr[1]; + tci_assert(*tb_ptr =3D=3D old_code_ptr + op_size); +} + static void tci_args_l(const uint8_t **tb_ptr, void **l0) { + const uint8_t *start =3D *tb_ptr; + *l0 =3D (void *)tci_read_label(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_ri(const uint8_t **tb_ptr, TCGReg *r0, tcg_target_ulong *i1) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *i1 =3D tci_read_i32(tb_ptr); + + check_size(start, tb_ptr); } =20 #if TCG_TARGET_REG_BITS =3D=3D 64 static void tci_args_rI(const uint8_t **tb_ptr, TCGReg *r0, tcg_target_ulong *i1) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *i1 =3D tci_read_i(tb_ptr); + + check_size(start, tb_ptr); } #endif =20 static void tci_args_rrm(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGMemOpIdx *m2) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *m2 =3D tci_read_i32(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrs(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, int32_t *i2) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *i2 =3D tci_read_s32(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGCond *c2, void **l3) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *c2 =3D tci_read_b(tb_ptr); *l3 =3D (void *)tci_read_label(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *c3 =3D tci_read_b(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrm(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGMemOpIdx = *m3) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *m3 =3D tci_read_i32(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrbb(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, uint8_t *i3, uint8_t *i4) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *i3 =3D tci_read_b(tb_ptr); *i4 =3D tci_read_b(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrrm(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGMemOpIdx *m4) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *r3 =3D tci_read_r(tb_ptr); *m4 =3D tci_read_i32(tb_ptr); + + check_size(start, tb_ptr); } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *r3 =3D tci_read_r(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *r3 =3D tci_read_r(tb_ptr); *c4 =3D tci_read_b(tb_ptr); *l5 =3D (void *)tci_read_label(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *r3 =3D tci_read_r(tb_ptr); *r4 =3D tci_read_r(tb_ptr); *c5 =3D tci_read_b(tb_ptr); + + check_size(start, tb_ptr); } =20 static void tci_args_rrrrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5) { + const uint8_t *start =3D *tb_ptr; + *r0 =3D tci_read_r(tb_ptr); *r1 =3D tci_read_r(tb_ptr); *r2 =3D tci_read_r(tb_ptr); *r3 =3D tci_read_r(tb_ptr); *r4 =3D tci_read_r(tb_ptr); *r5 =3D tci_read_r(tb_ptr); + + check_size(start, tb_ptr); } #endif =20 @@ -423,10 +494,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, =20 for (;;) { TCGOpcode opc =3D tb_ptr[0]; -#if defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) - uint8_t op_size =3D tb_ptr[1]; - const uint8_t *old_code_ptr =3D tb_ptr; -#endif TCGReg r0, r1, r2, r3; tcg_target_ulong t1; TCGCond condition; @@ -476,7 +543,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; case INDEX_op_br: tci_args_l(&tb_ptr, &ptr); - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); tb_ptr =3D ptr; continue; case INDEX_op_setcond_i32: @@ -629,9 +695,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_brcond_i32: tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); if (tci_compare32(regs[r0], regs[r1], condition)) { - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); tb_ptr =3D ptr; - continue; } break; #if TCG_TARGET_REG_BITS =3D=3D 32 @@ -652,7 +716,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, T1 =3D tci_uint64(regs[r1], regs[r0]); T2 =3D tci_uint64(regs[r3], regs[r2]); if (tci_compare64(T1, T2, condition)) { - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); tb_ptr =3D ptr; continue; } @@ -786,9 +849,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, case INDEX_op_brcond_i64: tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); if (tci_compare64(regs[r0], regs[r1], condition)) { - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); tb_ptr =3D ptr; - continue; } break; case INDEX_op_ext32s_i64: @@ -817,9 +878,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, =20 case INDEX_op_goto_tb: tci_args_l(&tb_ptr, &ptr); - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); tb_ptr =3D *(void **)ptr; - continue; + break; =20 case INDEX_op_qemu_ld_i32: if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { @@ -997,6 +1057,5 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, default: g_assert_not_reached(); } - tci_assert(tb_ptr =3D=3D old_code_ptr + op_size); } } --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474711; cv=none; d=zohomail.com; s=zohoarc; b=mCnYWaEgprrdWDs2tAQGoQGgGeyVIRIgyjUezkmc35IqiPg9aBvOOpmZRhZU5u8N7hgy5WrbXBmW31WWO3AtkUdVtJSvqV9oRPyOhg10WJoxQATH4xE67UkNHhfikUB+Luq+4BjCIGak1N9PlM8b0uFzVQcVelq1xdQmmCQ1lfA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474711; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7AU7AuzkprD1DzoX758oP/Mpq/Dm/wXzaoKexxvkWBk=; b=Elw+CGu8WWCly06zsPFnJe6Nt0bmLJyTHdZc+cNSKfBo6PzcTPM0+4RGnw0wn/oDZMzMW4/Jty6cVWWpHTijA5CKZ08fX4bPpk0r3q2fR5S4edetX1W6MIp4Ma/KSq4WtBVkxOVeL2VdaUVsS2w4wS2FrwCEBpG3jkfvZ/OC9ro= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474711039341.6860135987163; Thu, 11 Mar 2021 06:58:31 -0800 (PST) Received: from localhost ([::1]:42048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMlh-0002wy-RH for importer@patchew.org; Thu, 11 Mar 2021 09:58:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUG-0003Tm-4T for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:28 -0500 Received: from mail-qv1-xf2f.google.com ([2607:f8b0:4864:20::f2f]:39898) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUE-0006Rj-G0 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:27 -0500 Received: by mail-qv1-xf2f.google.com with SMTP id h13so2639416qvu.6 for ; Thu, 11 Mar 2021 06:40:25 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7AU7AuzkprD1DzoX758oP/Mpq/Dm/wXzaoKexxvkWBk=; b=taIYp6GIXruXuOpTyExN9I1E8oiXiNbd84BuAjb0FjXOEfOvweHULJEliy2i8YQKNI EBHe4ClPfcgdTzE6h/VrAmhme9vcaSqR3z+QWYuw8AEDh/sqOgPaFBqfaFM5B1zA50kc PkRi/uk1Wq4qdszcQYHBVpX82XpnrVuqVlaaQMHCAd4c7/UToKsj317BCCoJMXlhY2P2 /To33MGq6uL0kNgx8YBxqXMXLNcYJJTQ3m+wREAFBAd4fyE2kiKxbG5GUWW0/q8AHe88 wmWP5ClpEVbLW2OhkUR5Gmo/RYh74vFbsbKTu9pI0Mm1FNINKWgtN2ip4cxPA8eBeucL aR/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7AU7AuzkprD1DzoX758oP/Mpq/Dm/wXzaoKexxvkWBk=; b=IF478/8xGA7KPZqftMjH/YuUhrE1qLleDYPBThk3Ec+lSwlhGIGQWXD/ZQl2Lnr3nf S2ypWVJrd67fST4C/YostliZkQWh7T0QDbGx668grVgEJZnxz3NHWLz1xrDr4GFo/0Nw SifZdZ5+Sl1cDwv+SY4uCy6qnQQnNE2zdtuSqpKdGKY9+IchdNd4fku58snYv9gMz+7v BZoBQUVPZ9+h2lpHe6iKFFQsJU7GFgbBAfz4qedWAdwtlW9hT6XfEj9PhwI6h13gH0yJ Q/KOZDv/NrB2YwHzhsb5ls522CH5cH26O8L9ukBgNinGn3YdNe/1r+2SJJYjQ7hxh5WR kLGQ== X-Gm-Message-State: AOAM530KzeigyzUcLSEhkibWzRbJgNWxbpdRLEtCLcaHvrCNprwwm502 BLa2nUpUT4skzrxJaxBCyLz/KMl0kkgL2Bm2 X-Google-Smtp-Source: ABdhPJzKDTuNW4HQklq9XNBA8RJ7UQPmzStymYgwoujr8Wye2RrZds8DgMGQfEUZ0I5FwNCWe3gPeg== X-Received: by 2002:a05:6214:c27:: with SMTP id a7mr7756881qvd.54.1615473625345; Thu, 11 Mar 2021 06:40:25 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 20/57] tcg/tci: Remove tci_disas Date: Thu, 11 Mar 2021 08:39:21 -0600 Message-Id: <20210311143958.562625-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2f; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FUZZY_BITCOIN=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This function is unused. It's not even the disassembler, which is print_insn_tci, located in disas/tci.c. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 2 -- tcg/tci/tcg-target.c.inc | 10 ---------- 2 files changed, 12 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 9285c930a2..52af6d8bc5 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -163,8 +163,6 @@ typedef enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 #define TCG_TARGET_STACK_ALIGN 16 =20 -void tci_disas(uint8_t opc); - #define HAVE_TCG_QEMU_TB_EXEC =20 /* We could notice __i386__ or __s390x__ and reduce the barriers depending diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 6c187a25cc..7fb3b04eaf 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -253,16 +253,6 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int t= ype, return true; } =20 -#if defined(CONFIG_DEBUG_TCG_INTERPRETER) -/* Show current bytecode. Used by tcg interpreter. */ -void tci_disas(uint8_t opc) -{ - const TCGOpDef *def =3D &tcg_op_defs[opc]; - fprintf(stderr, "TCG %s %u, %u, %u\n", - def->name, def->nb_oargs, def->nb_iargs, def->nb_cargs); -} -#endif - /* Write value (native size). */ static void tcg_out_i(TCGContext *s, tcg_target_ulong v) { --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474121; cv=none; d=zohomail.com; s=zohoarc; b=dVq9m/u6XQHpm6NWqohhasis6m/XtzwvcFOEuw8cFMzAHOyhFBMNLcBP0qXbDuwcHG7mhNGlcUGuMl3An2vR15msV5DXjTi+idl8mL9oBzmzLihtxd44tQamQz+d6f44ppr4D4vXpo7JFgsMfNzBiq4TCArO9ngeeKzZQtD58CU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474121; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1adsCXNakT4Sw0RK0m41sRTU4LQBwfqTyYYxzb8c+ys=; b=VeD0YHhMIvHiq49qrWFkux2pXjw9akpI/Ttb8/f4/W8lFhyQZ7YcXGyVkVNIP089qyxxqfbfRcngqmx+6q+pH8onLAMUkyJ2fb3gncPfmEx5pXwJHOgfqDILsKozzBcPRRXbx2XHgkxgWM90YiuuMNqFUN19picBBZbhjj1fmyQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474121397115.85391200222318; Thu, 11 Mar 2021 06:48:41 -0800 (PST) Received: from localhost ([::1]:34752 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMcC-0004G1-8D for importer@patchew.org; Thu, 11 Mar 2021 09:48:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39904) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUN-0003cg-7r for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:35 -0500 Received: from mail-qt1-x82b.google.com ([2607:f8b0:4864:20::82b]:33542) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUF-0006TS-Qc for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:34 -0500 Received: by mail-qt1-x82b.google.com with SMTP id 94so1265222qtc.0 for ; Thu, 11 Mar 2021 06:40:27 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1adsCXNakT4Sw0RK0m41sRTU4LQBwfqTyYYxzb8c+ys=; b=cbdDvu0rT1KQF2pnlGFqeleTZNBo1YKXkFOn7GQ98QmiyXVU41bKLT0EpSG1QkE+pQ z70Uubn9PP74/CJxjRVRSJs64kf6KelwXI+MXWktv/zg59yBDhrd9ErCYPPan1HHQ6ua 68CfVTTakOvHQ5CvHOe5CJ/A5EUL2E3G6TYyVv3Dch5eeXwmeVM/XdzQkyHKl0HXLRet f8RIj/APWsUmI1G+wrl1uf9USNz19nW4va6dVoDhTAygKPpY3IBMbmjLeIainhLKkJfE k46Zk7Qg2K+dbbylw9qnl6ZGOnn9cIZG+b+ohwTvEGDC1JDob7PeHiUEkKsRx6J+hakI GZwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1adsCXNakT4Sw0RK0m41sRTU4LQBwfqTyYYxzb8c+ys=; b=Y1wP37l/CLzWNOKO3xjZZq8SLO4OUZuwoLfK7WPfr1a3NrzjJmzSYo/r59NkjlIs2A jzCv3sCI+PtbeWtKig8q/nLZFlincqMsQmhLjOGGdpZeztvQ9Apg/ilz9xMzZgDLgVYo /DetNJVniPys+SgcLYY/RoOHWkDo8gT4nweo6mFaqkWgWIIabr19rDB3K6iPZZC3FbCm 2ZO1hET1LwUO+YEIpBdDGgA6aQRPkhGlDbZrkf3x6UyJn5hP/xdcq/ZPCvS5FimPd5AK /mNTgK28XDofY+67xQYG6zavOIg1ChI6i9PwqQKl/nzYfX6mdgpXx2zZAMLHNQYrGCqe 9/LQ== X-Gm-Message-State: AOAM532EOuBFpqVzYTWAcKbkiaQFT5uZxayJ7JHeLhiZuCTQEDfG733z 5rwibfvGCJHLXVIqoPLSmYMsGHE5LDplNgzk X-Google-Smtp-Source: ABdhPJwduCnDrstGRpx/UHD+r14PTtVaMUMCqaPrYJ8kd183nuDXAkKV5iyLURTytpDsmcT4+SCyLA== X-Received: by 2002:ac8:6b57:: with SMTP id x23mr7238578qts.278.1615473626759; Thu, 11 Mar 2021 06:40:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 21/57] tcg/tci: Implement the disassembler properly Date: Thu, 11 Mar 2021 08:39:22 -0600 Message-Id: <20210311143958.562625-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82b; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Actually print arguments as opposed to simply the opcodes and, uselessly, the argument counts. Reuse all of the helpers developed as part of the interpreter. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 2 +- include/tcg/tcg-opc.h | 2 - disas/tci.c | 61 --------- tcg/tci.c | 283 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 284 insertions(+), 64 deletions(-) delete mode 100644 disas/tci.c diff --git a/meson.build b/meson.build index adeec153d9..fda86ab8ce 100644 --- a/meson.build +++ b/meson.build @@ -1943,7 +1943,7 @@ specific_ss.add(when: 'CONFIG_TCG', if_true: files( 'tcg/tcg-op.c', 'tcg/tcg.c', )) -specific_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('disas/tci.= c', 'tcg/tci.c')) +specific_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tcg/tci.c'= )) =20 subdir('backends') subdir('disas') diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index 900984c005..bbb0884af8 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -278,10 +278,8 @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) #ifdef TCG_TARGET_INTERPRETER /* These opcodes are only for use between the tci generator and interprete= r. */ DEF(tci_movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT) -#if TCG_TARGET_REG_BITS =3D=3D 64 DEF(tci_movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT) #endif -#endif =20 #undef TLADDR_ARGS #undef DATA64_ARGS diff --git a/disas/tci.c b/disas/tci.c deleted file mode 100644 index f1d6c6b469..0000000000 --- a/disas/tci.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Tiny Code Interpreter for QEMU - disassembler - * - * Copyright (c) 2011 Stefan Weil - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "qemu/osdep.h" -#include "qemu-common.h" -#include "disas/dis-asm.h" -#include "tcg/tcg.h" - -/* Disassemble TCI bytecode. */ -int print_insn_tci(bfd_vma addr, disassemble_info *info) -{ - int length; - uint8_t byte; - int status; - TCGOpcode op; - - status =3D info->read_memory_func(addr, &byte, 1, info); - if (status !=3D 0) { - info->memory_error_func(status, addr, info); - return -1; - } - op =3D byte; - - addr++; - status =3D info->read_memory_func(addr, &byte, 1, info); - if (status !=3D 0) { - info->memory_error_func(status, addr, info); - return -1; - } - length =3D byte; - - if (op >=3D tcg_op_defs_max) { - info->fprintf_func(info->stream, "illegal opcode %d", op); - } else { - const TCGOpDef *def =3D &tcg_op_defs[op]; - int nb_oargs =3D def->nb_oargs; - int nb_iargs =3D def->nb_iargs; - int nb_cargs =3D def->nb_cargs; - /* TODO: Improve disassembler output. */ - info->fprintf_func(info->stream, "%s\to=3D%d i=3D%d c=3D%d", - def->name, nb_oargs, nb_iargs, nb_cargs); - } - - return length; -} diff --git a/tcg/tci.c b/tcg/tci.c index 6b63beea28..41d73edc3a 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -1059,3 +1059,286 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArch= State *env, } } } + +/* + * Disassembler that matches the interpreter + */ + +static const char *str_r(TCGReg r) +{ + static const char regs[TCG_TARGET_NB_REGS][4] =3D { + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "env", "sp" + }; + + QEMU_BUILD_BUG_ON(TCG_AREG0 !=3D TCG_REG_R14); + QEMU_BUILD_BUG_ON(TCG_REG_CALL_STACK !=3D TCG_REG_R15); + + assert((unsigned)r < TCG_TARGET_NB_REGS); + return regs[r]; +} + +static const char *str_c(TCGCond c) +{ + static const char cond[16][8] =3D { + [TCG_COND_NEVER] =3D "never", + [TCG_COND_ALWAYS] =3D "always", + [TCG_COND_EQ] =3D "eq", + [TCG_COND_NE] =3D "ne", + [TCG_COND_LT] =3D "lt", + [TCG_COND_GE] =3D "ge", + [TCG_COND_LE] =3D "le", + [TCG_COND_GT] =3D "gt", + [TCG_COND_LTU] =3D "ltu", + [TCG_COND_GEU] =3D "geu", + [TCG_COND_LEU] =3D "leu", + [TCG_COND_GTU] =3D "gtu", + }; + + assert((unsigned)c < ARRAY_SIZE(cond)); + assert(cond[c][0] !=3D 0); + return cond[c]; +} + +/* Disassemble TCI bytecode. */ +int print_insn_tci(bfd_vma addr, disassemble_info *info) +{ + uint8_t buf[256]; + int length, status; + const TCGOpDef *def; + const char *op_name; + TCGOpcode op; + TCGReg r0, r1, r2, r3; +#if TCG_TARGET_REG_BITS =3D=3D 32 + TCGReg r4, r5; +#endif + tcg_target_ulong i1; + int32_t s2; + TCGCond c; + TCGMemOpIdx oi; + uint8_t pos, len; + void *ptr; + const uint8_t *tb_ptr; + + status =3D info->read_memory_func(addr, buf, 2, info); + if (status !=3D 0) { + info->memory_error_func(status, addr, info); + return -1; + } + op =3D buf[0]; + length =3D buf[1]; + + if (length < 2) { + info->fprintf_func(info->stream, "invalid length %d", length); + return 1; + } + + status =3D info->read_memory_func(addr + 2, buf + 2, length - 2, info); + if (status !=3D 0) { + info->memory_error_func(status, addr + 2, info); + return -1; + } + + def =3D &tcg_op_defs[op]; + op_name =3D def->name; + tb_ptr =3D buf + 2; + + switch (op) { + case INDEX_op_br: + case INDEX_op_call: + case INDEX_op_exit_tb: + case INDEX_op_goto_tb: + tci_args_l(&tb_ptr, &ptr); + info->fprintf_func(info->stream, "%-12s %p", op_name, ptr); + break; + + case INDEX_op_brcond_i32: + case INDEX_op_brcond_i64: + tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%p", + op_name, str_r(r0), str_r(r1), str_c(c), ptr); + break; + + case INDEX_op_setcond_i32: + case INDEX_op_setcond_i64: + tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &c); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", + op_name, str_r(r0), str_r(r1), str_r(r2), str_c= (c)); + break; + + case INDEX_op_tci_movi_i32: + tci_args_ri(&tb_ptr, &r0, &i1); + info->fprintf_func(info->stream, "%-12s %s,0x%" TCG_PRIlx "", + op_name, str_r(r0), i1); + break; + +#if TCG_TARGET_REG_BITS =3D=3D 64 + case INDEX_op_tci_movi_i64: + tci_args_rI(&tb_ptr, &r0, &i1); + info->fprintf_func(info->stream, "%-12s %s,0x%" TCG_PRIlx "", + op_name, str_r(r0), i1); + break; +#endif + + case INDEX_op_ld8u_i32: + case INDEX_op_ld8u_i64: + case INDEX_op_ld8s_i32: + case INDEX_op_ld8s_i64: + case INDEX_op_ld16u_i32: + case INDEX_op_ld16u_i64: + case INDEX_op_ld16s_i32: + case INDEX_op_ld16s_i64: + case INDEX_op_ld32u_i64: + case INDEX_op_ld32s_i64: + case INDEX_op_ld_i32: + case INDEX_op_ld_i64: + case INDEX_op_st8_i32: + case INDEX_op_st8_i64: + case INDEX_op_st16_i32: + case INDEX_op_st16_i64: + case INDEX_op_st32_i64: + case INDEX_op_st_i32: + case INDEX_op_st_i64: + tci_args_rrs(&tb_ptr, &r0, &r1, &s2); + info->fprintf_func(info->stream, "%-12s %s,%s,%d", + op_name, str_r(r0), str_r(r1), s2); + break; + + case INDEX_op_mov_i32: + case INDEX_op_mov_i64: + case INDEX_op_ext8s_i32: + case INDEX_op_ext8s_i64: + case INDEX_op_ext8u_i32: + case INDEX_op_ext8u_i64: + case INDEX_op_ext16s_i32: + case INDEX_op_ext16s_i64: + case INDEX_op_ext16u_i32: + case INDEX_op_ext32s_i64: + case INDEX_op_ext32u_i64: + case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: + case INDEX_op_bswap16_i32: + case INDEX_op_bswap16_i64: + case INDEX_op_bswap32_i32: + case INDEX_op_bswap32_i64: + case INDEX_op_bswap64_i64: + case INDEX_op_not_i32: + case INDEX_op_not_i64: + case INDEX_op_neg_i32: + case INDEX_op_neg_i64: + tci_args_rr(&tb_ptr, &r0, &r1); + info->fprintf_func(info->stream, "%-12s %s,%s", + op_name, str_r(r0), str_r(r1)); + break; + + case INDEX_op_add_i32: + case INDEX_op_add_i64: + case INDEX_op_sub_i32: + case INDEX_op_sub_i64: + case INDEX_op_mul_i32: + case INDEX_op_mul_i64: + case INDEX_op_and_i32: + case INDEX_op_and_i64: + case INDEX_op_or_i32: + case INDEX_op_or_i64: + case INDEX_op_xor_i32: + case INDEX_op_xor_i64: + case INDEX_op_div_i32: + case INDEX_op_div_i64: + case INDEX_op_rem_i32: + case INDEX_op_rem_i64: + case INDEX_op_divu_i32: + case INDEX_op_divu_i64: + case INDEX_op_remu_i32: + case INDEX_op_remu_i64: + case INDEX_op_shl_i32: + case INDEX_op_shl_i64: + case INDEX_op_shr_i32: + case INDEX_op_shr_i64: + case INDEX_op_sar_i32: + case INDEX_op_sar_i64: + case INDEX_op_rotl_i32: + case INDEX_op_rotl_i64: + case INDEX_op_rotr_i32: + case INDEX_op_rotr_i64: + tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + info->fprintf_func(info->stream, "%-12s %s,%s,%s", + op_name, str_r(r0), str_r(r1), str_r(r2)); + break; + + case INDEX_op_deposit_i32: + case INDEX_op_deposit_i64: + tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%d,%d", + op_name, str_r(r0), str_r(r1), str_r(r2), pos, = len); + break; + +#if TCG_TARGET_REG_BITS =3D=3D 32 + case INDEX_op_setcond2_i32: + tci_args_rrrrrc(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &c); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", + op_name, str_r(r0), str_r(r1), str_r(r2), + str_r(r3), str_r(r4), str_c(c)); + break; + + case INDEX_op_brcond2_i32: + tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &c, &ptr); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%p", + op_name, str_r(r0), str_r(r1), + str_r(r2), str_r(r3), str_c(c), ptr); + break; + + case INDEX_op_mulu2_i32: + tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", + op_name, str_r(r0), str_r(r1), + str_r(r2), str_r(r3)); + break; + + case INDEX_op_add2_i32: + case INDEX_op_sub2_i32: + tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", + op_name, str_r(r0), str_r(r1), str_r(r2), + str_r(r3), str_r(r4), str_r(r5)); + break; +#endif + + case INDEX_op_qemu_ld_i64: + case INDEX_op_qemu_st_i64: + len =3D DIV_ROUND_UP(64, TCG_TARGET_REG_BITS); + goto do_qemu_ldst; + case INDEX_op_qemu_ld_i32: + case INDEX_op_qemu_st_i32: + len =3D 1; + do_qemu_ldst: + len +=3D DIV_ROUND_UP(TARGET_LONG_BITS, TCG_TARGET_REG_BITS); + switch (len) { + case 2: + tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + info->fprintf_func(info->stream, "%-12s %s,%s,%x", + op_name, str_r(r0), str_r(r1), oi); + break; + case 3: + tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%x", + op_name, str_r(r0), str_r(r1), str_r(r2), o= i); + break; + case 4: + tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%x", + op_name, str_r(r0), str_r(r1), + str_r(r2), str_r(r3), oi); + break; + default: + g_assert_not_reached(); + } + break; + + default: + info->fprintf_func(info->stream, "illegal opcode %d", op); + break; + } + + return length; +} --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474815; cv=none; d=zohomail.com; s=zohoarc; b=ZlTSxHSU7FZJycSUQVbyN8Q+njdbHZ+w5TBU++s3DGynzRraNz4Z5XKsWk/XGxNHELu85y6oZzPCftklfwckgjk+Tv8DDdZStDjDcKCxrlavcTdH7wLGx9xQD9cD3RhmLQoxUzI9CwLpkY5So+wb38b7JqDtpbwl4ieji4vPlnE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474815; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=gmwGO0qEHYSo9Z61qij4y5Ji4Cvw+K/34YSzYTurmeE=; b=dEgh/t8a0es1d1sye9FQauIKNave8pfHTM2YOGW3Rxv8QOQ+9Nrjzoy386eONEYlqxDW0sfxAtStYzmRsTPntaaavkw+etZ7OoEYhM8g7t6O/vstwfQ0fd2Hw/joSiPkODENGTzseL7tnvQ4H/TF2NR69qQypJNwNH9BO+4AqKw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161547481455912.314343270651193; Thu, 11 Mar 2021 07:00:14 -0800 (PST) Received: from localhost ([::1]:50654 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMnL-0006Th-E7 for importer@patchew.org; Thu, 11 Mar 2021 10:00:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39892) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUM-0003aw-Kn for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:34 -0500 Received: from mail-qk1-x72e.google.com ([2607:f8b0:4864:20::72e]:34272) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUG-0006V5-SF for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:34 -0500 Received: by mail-qk1-x72e.google.com with SMTP id t4so20833893qkp.1 for ; Thu, 11 Mar 2021 06:40:28 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gmwGO0qEHYSo9Z61qij4y5Ji4Cvw+K/34YSzYTurmeE=; b=Bn+cX3Svf+VwJQHQZmrHRctkBzE//rCk1cjeCkMjbpwY/5T17rEkbTaLJKzOkUkdxH QrQOLmUJpnX7PcuyLZaTQlSNmo7VAuoi9KAsjbW1fcOqW8NlbYq0Fz05RIuA15qjkUIj h+ZiI0oiDYhHInP2V5TR9EqSAWD8sXXb6Jd7ilTWf4AYuxdh54Eywis+WQJuY7vbZ48A 5DoRW0vBX4fR3QVMECen4K5Y54NwtUn+7IH5wijygQWNsjvQBqqishYICI2CGPQ2p88B d6gr1oKhtcCtDJHn9ADhrlyn3AaAtI+c5QkSRGvF37ToLRovKZzjBSks+x5fWY0Zf90s /bbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gmwGO0qEHYSo9Z61qij4y5Ji4Cvw+K/34YSzYTurmeE=; b=bjeOAAXsmnPe8/t/AzscTtGCl6iqqU0qoEkfo4sc3uoIPUxCq+N7cCqkS3B7T3rYta P4RfriWDURHtXluQmiH+ntGpOs14hDUDoNJFsUaN2i2pdXoJTTWemw/QmFOU3r4qURdC I0nvRD5UZfyS0Fj4Gmh03gRViTeXx3Icnl8+cRDHELOXd2cT7DeW4XYZxmRbX/E66x3A tOet/+haesVS5ek8W0QSqxylqpwJY6ck42/jICEmtZmTv4HVKJ95xW4qk9JGlxgL2OG1 +ABX7EsxlKby8hlSOQQmwDgf6SrNggLquolc+zJTzuLwQKxwInxYi1IBDS4GjLu7aAjn 9aRw== X-Gm-Message-State: AOAM530wwKtWpwsjSwh5dllfT+vx1ThNd7wLDNGf/M4QUM9m2rIREDGX QbEQ/ywxxy3rH2vBwf7xhE1BH3+f4qnXMapu X-Google-Smtp-Source: ABdhPJxG457/V/GwW9BCyyfRKeEy7QIwjH6sV/PSefPmBVZTYrTmOB3SYtH20npGKYHYzJXjkN6tpg== X-Received: by 2002:a37:9e88:: with SMTP id h130mr8051791qke.301.1615473627843; Thu, 11 Mar 2021 06:40:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 22/57] tcg: Build ffi data structures for helpers Date: Thu, 11 Mar 2021 08:39:23 -0600 Message-Id: <20210311143958.562625-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We will shortly use libffi for tci, as that is the only portable way of calling arbitrary functions. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 9 +- include/exec/helper-ffi.h | 115 +++++++++++++++++++++++++ include/exec/helper-tcg.h | 24 ++++-- target/hppa/helper.h | 2 + target/i386/ops_sse_header.h | 6 ++ target/m68k/helper.h | 1 + target/ppc/helper.h | 3 + tcg/tcg.c | 20 +++++ tests/docker/dockerfiles/fedora.docker | 1 + 9 files changed, 172 insertions(+), 9 deletions(-) create mode 100644 include/exec/helper-ffi.h diff --git a/meson.build b/meson.build index fda86ab8ce..e16b890546 100644 --- a/meson.build +++ b/meson.build @@ -1943,7 +1943,14 @@ specific_ss.add(when: 'CONFIG_TCG', if_true: files( 'tcg/tcg-op.c', 'tcg/tcg.c', )) -specific_ss.add(when: 'CONFIG_TCG_INTERPRETER', if_true: files('tcg/tci.c'= )) + +if get_option('tcg_interpreter') + libffi =3D dependency('libffi', version: '>=3D3.0', + static: enable_static, method: 'pkg-config', + required: true) + specific_ss.add(libffi) + specific_ss.add(files('tcg/tci.c')) +endif =20 subdir('backends') subdir('disas') diff --git a/include/exec/helper-ffi.h b/include/exec/helper-ffi.h new file mode 100644 index 0000000000..3af1065af3 --- /dev/null +++ b/include/exec/helper-ffi.h @@ -0,0 +1,115 @@ +/* + * Helper file for declaring TCG helper functions. + * This one defines data structures private to tcg.c. + */ + +#ifndef HELPER_FFI_H +#define HELPER_FFI_H 1 + +#include "exec/helper-head.h" + +#define dh_ffitype_i32 &ffi_type_uint32 +#define dh_ffitype_s32 &ffi_type_sint32 +#define dh_ffitype_int &ffi_type_sint +#define dh_ffitype_i64 &ffi_type_uint64 +#define dh_ffitype_s64 &ffi_type_sint64 +#define dh_ffitype_f16 &ffi_type_uint32 +#define dh_ffitype_f32 &ffi_type_uint32 +#define dh_ffitype_f64 &ffi_type_uint64 +#ifdef TARGET_LONG_BITS +# if TARGET_LONG_BITS =3D=3D 32 +# define dh_ffitype_tl &ffi_type_uint32 +# else +# define dh_ffitype_tl &ffi_type_uint64 +# endif +#endif +#define dh_ffitype_ptr &ffi_type_pointer +#define dh_ffitype_cptr &ffi_type_pointer +#define dh_ffitype_void &ffi_type_void +#define dh_ffitype_noreturn &ffi_type_void +#define dh_ffitype_env &ffi_type_pointer +#define dh_ffitype(t) glue(dh_ffitype_, t) + +#define DEF_HELPER_FLAGS_0(NAME, FLAGS, ret) \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 0, \ + }; + +#define DEF_HELPER_FLAGS_1(NAME, FLAGS, ret, t1) \ + static ffi_type *glue(cif_args_,NAME)[1] =3D { dh_ffitype(t1) }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 1, = \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_2(NAME, FLAGS, ret, t1, t2) \ + static ffi_type *glue(cif_args_,NAME)[2] =3D { \ + dh_ffitype(t1), dh_ffitype(t2) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 2, \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_3(NAME, FLAGS, ret, t1, t2, t3) \ + static ffi_type *glue(cif_args_,NAME)[3] =3D { \ + dh_ffitype(t1), dh_ffitype(t2), dh_ffitype(t3) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 3, \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_4(NAME, FLAGS, ret, t1, t2, t3, t4) \ + static ffi_type *glue(cif_args_,NAME)[4] =3D { \ + dh_ffitype(t1), dh_ffitype(t2), dh_ffitype(t3), dh_ffitype(t4) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 4, = \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_5(NAME, FLAGS, ret, t1, t2, t3, t4, t5) \ + static ffi_type *glue(cif_args_,NAME)[5] =3D { \ + dh_ffitype(t1), dh_ffitype(t2), dh_ffitype(t3), \ + dh_ffitype(t4), dh_ffitype(t5) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 5, = \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_6(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6) \ + static ffi_type *glue(cif_args_,NAME)[6] =3D { \ + dh_ffitype(t1), dh_ffitype(t2), dh_ffitype(t3), \ + dh_ffitype(t4), dh_ffitype(t5), dh_ffitype(t6) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 6, = \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \ + static ffi_type *glue(cif_args_,NAME)[7] =3D { \ + dh_ffitype(t1), dh_ffitype(t2), dh_ffitype(t3), \ + dh_ffitype(t4), dh_ffitype(t5), dh_ffitype(t6), dh_ffitype(t7) \ + }; \ + static ffi_cif glue(cif_,NAME) =3D { \ + .rtype =3D dh_ffitype(ret), .nargs =3D 7, = \ + .arg_types =3D glue(cif_args_,NAME), \ + }; + +#include "helper.h" +#include "trace/generated-helpers.h" +#include "tcg-runtime.h" + +#undef DEF_HELPER_FLAGS_0 +#undef DEF_HELPER_FLAGS_1 +#undef DEF_HELPER_FLAGS_2 +#undef DEF_HELPER_FLAGS_3 +#undef DEF_HELPER_FLAGS_4 +#undef DEF_HELPER_FLAGS_5 +#undef DEF_HELPER_FLAGS_6 +#undef DEF_HELPER_FLAGS_7 + +#endif /* HELPER_FFI_H */ diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h index 27870509a2..a71b848576 100644 --- a/include/exec/helper-tcg.h +++ b/include/exec/helper-tcg.h @@ -10,50 +10,57 @@ to get all the macros expanded first. */ #define str(s) #s =20 +#ifdef CONFIG_TCG_INTERPRETER +# define DO_CIF(NAME) .cif =3D &cif_##NAME, +#else +# define DO_CIF(NAME) +#endif + #define DEF_HELPER_FLAGS_0(NAME, FLAGS, ret) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) }, =20 #define DEF_HELPER_FLAGS_1(NAME, FLAGS, ret, t1) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) }, =20 #define DEF_HELPER_FLAGS_2(NAME, FLAGS, ret, t1, t2) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) }, =20 #define DEF_HELPER_FLAGS_3(NAME, FLAGS, ret, t1, t2, t3) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) }, =20 #define DEF_HELPER_FLAGS_4(NAME, FLAGS, ret, t1, t2, t3, t4) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) }, =20 #define DEF_HELPER_FLAGS_5(NAME, FLAGS, ret, t1, t2, t3, t4, t5) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ | dh_sizemask(t5, 5) }, =20 #define DEF_HELPER_FLAGS_6(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) }, =20 #define DEF_HELPER_FLAGS_7(NAME, FLAGS, ret, t1, t2, t3, t4, t5, t6, t7) \ - { .func =3D HELPER(NAME), .name =3D str(NAME), .flags =3D FLAGS, \ + { .func =3D HELPER(NAME), DO_CIF(NAME) .name =3D str(NAME), \ + .flags =3D FLAGS | dh_callflag(ret), \ .sizemask =3D dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ | dh_sizemask(t5, 5) | dh_sizemask(t6, 6) | dh_sizemask(t7, 7) }, @@ -64,6 +71,7 @@ #include "plugin-helpers.h" =20 #undef str +#undef DO_CIF #undef DEF_HELPER_FLAGS_0 #undef DEF_HELPER_FLAGS_1 #undef DEF_HELPER_FLAGS_2 diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 2d483aab58..35c612f09d 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -1,9 +1,11 @@ #if TARGET_REGISTER_BITS =3D=3D 64 # define dh_alias_tr i64 # define dh_is_64bit_tr 1 +# define dh_ffitype_tr dh_ffitype_i64 #else # define dh_alias_tr i32 # define dh_is_64bit_tr 0 +# define dh_ffitype_tr dh_ffitype_i32 #endif #define dh_ctype_tr target_ureg #define dh_is_signed_tr 0 diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h index 6c0c849347..cae50f77eb 100644 --- a/target/i386/ops_sse_header.h +++ b/target/i386/ops_sse_header.h @@ -27,13 +27,19 @@ #define dh_alias_Reg ptr #define dh_alias_ZMMReg ptr #define dh_alias_MMXReg ptr + #define dh_ctype_Reg Reg * #define dh_ctype_ZMMReg ZMMReg * #define dh_ctype_MMXReg MMXReg * + #define dh_is_signed_Reg dh_is_signed_ptr #define dh_is_signed_ZMMReg dh_is_signed_ptr #define dh_is_signed_MMXReg dh_is_signed_ptr =20 +#define dh_ffitype_Reg dh_ffitype_ptr +#define dh_ffitype_ZMMReg dh_ffitype_ptr +#define dh_ffitype_MMXReg dh_ffitype_ptr + DEF_HELPER_3(glue(psrlw, SUFFIX), void, env, Reg, Reg) DEF_HELPER_3(glue(psraw, SUFFIX), void, env, Reg, Reg) DEF_HELPER_3(glue(psllw, SUFFIX), void, env, Reg, Reg) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 77808497a9..672c99d5de 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -18,6 +18,7 @@ DEF_HELPER_4(cas2l_parallel, void, env, i32, i32, i32) #define dh_alias_fp ptr #define dh_ctype_fp FPReg * #define dh_is_signed_fp dh_is_signed_ptr +#define dh_ffitype_fp dh_ffitype_ptr =20 DEF_HELPER_3(exts32, void, env, fp, s32) DEF_HELPER_3(extf32, void, env, fp, f32) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 6a4dccf70c..bbd4700064 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -108,10 +108,12 @@ DEF_HELPER_FLAGS_1(ftsqrt, TCG_CALL_NO_RWG_SE, i32, i= 64) #define dh_alias_avr ptr #define dh_ctype_avr ppc_avr_t * #define dh_is_signed_avr dh_is_signed_ptr +#define dh_ffitype_avr dh_ffitype_ptr =20 #define dh_alias_vsr ptr #define dh_ctype_vsr ppc_vsr_t * #define dh_is_signed_vsr dh_is_signed_ptr +#define dh_ffitype_vsr dh_ffitype_ptr =20 DEF_HELPER_3(vavgub, void, avr, avr, avr) DEF_HELPER_3(vavguh, void, avr, avr, avr) @@ -696,6 +698,7 @@ DEF_HELPER_3(store_601_batu, void, env, i32, tl) #define dh_alias_fprp ptr #define dh_ctype_fprp ppc_fprp_t * #define dh_is_signed_fprp dh_is_signed_ptr +#define dh_ffitype_fprp dh_ffitype_ptr =20 DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp) DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp) diff --git a/tcg/tcg.c b/tcg/tcg.c index 2991112829..6382112215 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -66,6 +66,10 @@ #include "exec/log.h" #include "sysemu/sysemu.h" =20 +#ifdef CONFIG_TCG_INTERPRETER +#include +#endif + /* Forward declarations for functions declared in tcg-target.c.inc and used here. */ static void tcg_target_init(TCGContext *s); @@ -1082,6 +1086,9 @@ void tcg_pool_reset(TCGContext *s) =20 typedef struct TCGHelperInfo { void *func; +#ifdef CONFIG_TCG_INTERPRETER + ffi_cif *cif; +#endif const char *name; unsigned flags; unsigned sizemask; @@ -1089,6 +1096,10 @@ typedef struct TCGHelperInfo { =20 #include "exec/helper-proto.h" =20 +#ifdef CONFIG_TCG_INTERPRETER +#include "exec/helper-ffi.h" +#endif + static const TCGHelperInfo all_helpers[] =3D { #include "exec/helper-tcg.h" }; @@ -1136,6 +1147,15 @@ void tcg_context_init(TCGContext *s) (gpointer)&all_helpers[i]); } =20 +#ifdef CONFIG_TCG_INTERPRETER + for (i =3D 0; i < ARRAY_SIZE(all_helpers); ++i) { + ffi_cif *cif =3D all_helpers[i].cif; + ffi_status ok =3D ffi_prep_cif(cif, FFI_DEFAULT_ABI, cif->nargs, + cif->rtype, cif->arg_types); + tcg_debug_assert(ok =3D=3D FFI_OK); + } +#endif + tcg_target_init(s); process_op_defs(s); =20 diff --git a/tests/docker/dockerfiles/fedora.docker b/tests/docker/dockerfi= les/fedora.docker index 915fdc1845..8140fe67b2 100644 --- a/tests/docker/dockerfiles/fedora.docker +++ b/tests/docker/dockerfiles/fedora.docker @@ -32,6 +32,7 @@ ENV PACKAGES \ libcurl-devel \ libepoxy-devel \ libfdt-devel \ + libffi-devel \ libiscsi-devel \ libjpeg-devel \ libpmem-devel \ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474737; cv=none; d=zohomail.com; s=zohoarc; b=jtPckY2fIxSUEVS/LOf/cbG1SRsqtJdAkFJsBg/hk6Wo1/PsB48DMD4Ao5UXZpCSh2RMauYxbo81LVnhB6kcuJzA9sE6vkcTmSbVl9pX9MHXDpw/GRGW63rLBXKo9h/56un1YMpA73Yh1T+Z0QFdcH8kD3GMPtpAvXomvX3kDw8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474737; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=gGw3KxVq5Tq8weV/0bnuBl/4JXq/wSN4ULQQQb9LWe0=; b=ngcgvin7SpzHDl8Sq4sfPQSa0+aSOc7MRsv3iaXRVgxJxCUDWc191Cfw4OY11lMZeHKWfjtj4zLnZB9saj3uL1fMgdg+6cW3WuGtEdvNahfP+t6yFJQRccrkOgElrIWUrjAG+u1/M4jrtYz+Cy+KQMIEzNZlXYSJt//5KheM0Cs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474737767383.7306565930287; Thu, 11 Mar 2021 06:58:57 -0800 (PST) Received: from localhost ([::1]:44580 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMm7-0003zP-J0 for importer@patchew.org; Thu, 11 Mar 2021 09:58:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39918) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUO-0003ff-E3 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:36 -0500 Received: from mail-qv1-xf36.google.com ([2607:f8b0:4864:20::f36]:38716) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUL-0006Vm-OU for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:36 -0500 Received: by mail-qv1-xf36.google.com with SMTP id t5so2638812qvs.5 for ; Thu, 11 Mar 2021 06:40:29 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gGw3KxVq5Tq8weV/0bnuBl/4JXq/wSN4ULQQQb9LWe0=; b=tDk+ycSfxG1/3pn9soSW62rSZBbhD2aQx/G5jHCCoc3GrVJyXu7JvL7YiojbRIaHVX hoy25P3mQthzHrXtr478UzJ04CIC7ccmCHZkHjo9kL9hjzyAwptCF5aDMHvyUXndVf3K vgTzaX+vbnPC4iX2AGoEQvWEszyXOe/BZmVPMJ5iwy5bJ0HEhyNNw0B2EyKMKKfqdgZu rDIakF/8D4KU97I2zecNLLfGFdSRtiSkt6NhM23tfYw6fQji8kQ1zZuXRRBj12Kjvx/B FfjiW7wt4bmOU8YDWuxlZfG3GDxKF3CKy1m38bHefziKbMqrgBgyYMOFVOcdMzkr+xrN hEVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gGw3KxVq5Tq8weV/0bnuBl/4JXq/wSN4ULQQQb9LWe0=; b=IpFLdMVB48Mbe5SF9fgkqCChmJOvUwRUN/y8X0Y2xyIvk8GnOlYEvg+uUWsuaqMwBB 1MSTfoV/Abf/77sJ5T+TrlkAleIgygpPDuv+b6fH67um+s8CgNOQ54JrFl6K+BEOjyBY 6xYyuodD+MVZFbeMbNE+vox7xbwwzB4XbkmvKyZLE1vMy2bfzKOk516WYI3p4ZFX9vBP WQA5EjoSnX1ciYCBjS5rfBZzwiIazuBwjbu9Dc0dWfsLyVtHbHvQTr+tfP7DaycpVr21 Xt99vGxEBFJZGfjosE74zzP9GtFxdFpCuInfylBhUEymsdT5O25hIheC750Hl+SPqsYd kPmQ== X-Gm-Message-State: AOAM533j7+TXBFD3SDR/yShRPVgobb331DO+cyb1ZB/aJxXRKAHNEWA9 S72lbJjPJeucz5bBLf4Tl6Tm5TOXk4xpIwxW X-Google-Smtp-Source: ABdhPJx4mdPdaDj8qx5AtMGJHETC9dze0WU/IgjQuX2qRp3/kRdRZVbtU3zhBE3DhtUZ6F/RughrpA== X-Received: by 2002:a05:6214:f69:: with SMTP id iy9mr7799637qvb.15.1615473629055; Thu, 11 Mar 2021 06:40:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 23/57] tcg/tci: Use ffi for calls Date: Thu, 11 Mar 2021 08:39:24 -0600 Message-Id: <20210311143958.562625-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f36; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This requires adjusting where arguments are stored. Place them on the stack at left-aligned positions. Adjust the stack frame to be at entirely positive offsets. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/tcg/tcg.h | 1 + tcg/tci/tcg-target.h | 2 +- tcg/tcg.c | 72 ++++++++++++-------- tcg/tci.c | 138 +++++++++++++++++++++++---------------- tcg/tci/tcg-target.c.inc | 50 +++++++------- 5 files changed, 150 insertions(+), 113 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 0f0695e90d..e5573a9877 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -53,6 +53,7 @@ #define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS)) =20 #define CPU_TEMP_BUF_NLONGS 128 +#define TCG_STATIC_FRAME_SIZE (CPU_TEMP_BUF_NLONGS * sizeof(long)) =20 /* Default target word size to pointer size. */ #ifndef TCG_TARGET_REG_BITS diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 52af6d8bc5..4df10e2e83 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -161,7 +161,7 @@ typedef enum { =20 /* Used for function call generation. */ #define TCG_TARGET_CALL_STACK_OFFSET 0 -#define TCG_TARGET_STACK_ALIGN 16 +#define TCG_TARGET_STACK_ALIGN 8 =20 #define HAVE_TCG_QEMU_TB_EXEC =20 diff --git a/tcg/tcg.c b/tcg/tcg.c index 6382112215..92aec0d238 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -208,6 +208,18 @@ static size_t tree_size; static TCGRegSet tcg_target_available_regs[TCG_TYPE_COUNT]; static TCGRegSet tcg_target_call_clobber_regs; =20 +typedef struct TCGHelperInfo { + void *func; +#ifdef CONFIG_TCG_INTERPRETER + ffi_cif *cif; +#endif + const char *name; + unsigned flags; + unsigned sizemask; +} TCGHelperInfo; + +static GHashTable *helper_table; + #if TCG_TARGET_INSN_UNIT_SIZE =3D=3D 1 static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t= v) { @@ -1084,16 +1096,6 @@ void tcg_pool_reset(TCGContext *s) s->pool_current =3D NULL; } =20 -typedef struct TCGHelperInfo { - void *func; -#ifdef CONFIG_TCG_INTERPRETER - ffi_cif *cif; -#endif - const char *name; - unsigned flags; - unsigned sizemask; -} TCGHelperInfo; - #include "exec/helper-proto.h" =20 #ifdef CONFIG_TCG_INTERPRETER @@ -1103,7 +1105,6 @@ typedef struct TCGHelperInfo { static const TCGHelperInfo all_helpers[] =3D { #include "exec/helper-tcg.h" }; -static GHashTable *helper_table; =20 static int indirect_reg_alloc_order[ARRAY_SIZE(tcg_target_reg_alloc_order)= ]; static void process_op_defs(TCGContext *s); @@ -2081,25 +2082,38 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int na= rgs, TCGTemp **args) =20 real_args =3D 0; for (i =3D 0; i < nargs; i++) { - int is_64bit =3D sizemask & (1 << (i+1)*2); - if (TCG_TARGET_REG_BITS < 64 && is_64bit) { -#ifdef TCG_TARGET_CALL_ALIGN_ARGS - /* some targets want aligned 64 bit args */ - if (real_args & 1) { - op->args[pi++] =3D TCG_CALL_DUMMY_ARG; - real_args++; - } + bool is_64bit =3D sizemask & (1 << (i+1)*2); + bool want_align =3D false; + +#if defined(CONFIG_TCG_INTERPRETER) + /* + * Align all arguments, so that they land in predictable places + * for passing off to ffi_call. + */ + want_align =3D true; +#elif defined(TCG_TARGET_CALL_ALIGN_ARGS) + /* Some targets want aligned 64 bit args */ + want_align =3D is_64bit; #endif - /* If stack grows up, then we will be placing successive - arguments at lower addresses, which means we need to - reverse the order compared to how we would normally - treat either big or little-endian. For those arguments - that will wind up in registers, this still works for - HPPA (the only current STACK_GROWSUP target) since the - argument registers are *also* allocated in decreasing - order. If another such target is added, this logic may - have to get more complicated to differentiate between - stack arguments and register arguments. */ + + if (TCG_TARGET_REG_BITS < 64 && want_align && (real_args & 1)) { + op->args[pi++] =3D TCG_CALL_DUMMY_ARG; + real_args++; + } + + if (TCG_TARGET_REG_BITS < 64 && is_64bit) { + /* + * If stack grows up, then we will be placing successive + * arguments at lower addresses, which means we need to + * reverse the order compared to how we would normally + * treat either big or little-endian. For those arguments + * that will wind up in registers, this still works for + * HPPA (the only current STACK_GROWSUP target) since the + * argument registers are *also* allocated in decreasing + * order. If another such target is added, this logic may + * have to get more complicated to differentiate between + * stack arguments and register arguments. + */ #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TCG_TARGET_STACK_GROWSUP) op->args[pi++] =3D temp_arg(args[i] + 1); op->args[pi++] =3D temp_arg(args[i]); diff --git a/tcg/tci.c b/tcg/tci.c index 41d73edc3a..5718fc42a6 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -18,6 +18,13 @@ */ =20 #include "qemu/osdep.h" +#include "qemu-common.h" +#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */ +#include "exec/cpu_ldst.h" +#include "tcg/tcg-op.h" +#include "qemu/compiler.h" +#include + =20 /* Enable TCI assertions only when debugging TCG (and without NDEBUG defin= ed). * Without assertions, the interpreter runs much faster. */ @@ -27,36 +34,8 @@ # define tci_assert(cond) ((void)(cond)) #endif =20 -#include "qemu-common.h" -#include "tcg/tcg.h" /* MAX_OPC_PARAM_IARGS */ -#include "exec/cpu_ldst.h" -#include "tcg/tcg-op.h" -#include "qemu/compiler.h" - -#if MAX_OPC_PARAM_IARGS !=3D 6 -# error Fix needed, number of supported input arguments changed! -#endif -#if TCG_TARGET_REG_BITS =3D=3D 32 -typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong); -#else -typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong, - tcg_target_ulong, tcg_target_ulong); -#endif - __thread uintptr_t tci_tb_ptr; =20 -static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg = index) -{ - tci_assert(index < TCG_TARGET_NB_REGS); - return regs[index]; -} - static void tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) { @@ -131,6 +110,7 @@ static tcg_target_ulong tci_read_label(const uint8_t **= tb_ptr) * i =3D immediate (uint32_t) * I =3D immediate (tcg_target_ulong) * m =3D immediate (TCGMemOpIdx) + * n =3D immediate (call return length) * r =3D register * s =3D signed ldst offset */ @@ -151,6 +131,16 @@ static void tci_args_l(const uint8_t **tb_ptr, void **= l0) check_size(start, tb_ptr); } =20 +static void tci_args_nl(const uint8_t **tb_ptr, uint8_t *n0, void **l1) +{ + const uint8_t *start =3D *tb_ptr; + + *n0 =3D tci_read_b(tb_ptr); + *l1 =3D (void *)tci_read_label(tb_ptr); + + check_size(start, tb_ptr); +} + static void tci_args_rr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1) { @@ -474,6 +464,7 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCG= Cond condition) # define CASE_64(x) #endif =20 + /* Interpret pseudo code in tb. */ /* * Disable CFI checks. @@ -485,11 +476,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, { const uint8_t *tb_ptr =3D v_tb_ptr; tcg_target_ulong regs[TCG_TARGET_NB_REGS]; - long tcg_temps[CPU_TEMP_BUF_NLONGS]; - uintptr_t sp_value =3D (uintptr_t)(tcg_temps + CPU_TEMP_BUF_NLONGS); + uint64_t stack[(TCG_STATIC_CALL_ARGS_SIZE + TCG_STATIC_FRAME_SIZE) + / sizeof(uint64_t)]; + void *call_slots[TCG_STATIC_CALL_ARGS_SIZE / sizeof(uint64_t)]; =20 regs[TCG_AREG0] =3D (tcg_target_ulong)env; - regs[TCG_REG_CALL_STACK] =3D sp_value; + regs[TCG_REG_CALL_STACK] =3D (uintptr_t)stack; + call_slots[0] =3D NULL; tci_assert(tb_ptr); =20 for (;;) { @@ -514,33 +507,60 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 switch (opc) { case INDEX_op_call: - tci_args_l(&tb_ptr, &ptr); + /* + * We are passed a pointer to the TCGHelperInfo, which contains + * the function pointer followed by the ffi_cif pointer. + */ + tci_args_nl(&tb_ptr, &len, &ptr); + + /* Helper functions may need to access the "return address" */ tci_tb_ptr =3D (uintptr_t)tb_ptr; -#if TCG_TARGET_REG_BITS =3D=3D 32 - tmp64 =3D ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0= ), - tci_read_reg(regs, TCG_REG_R1), - tci_read_reg(regs, TCG_REG_R2), - tci_read_reg(regs, TCG_REG_R3), - tci_read_reg(regs, TCG_REG_R4), - tci_read_reg(regs, TCG_REG_R5), - tci_read_reg(regs, TCG_REG_R6), - tci_read_reg(regs, TCG_REG_R7), - tci_read_reg(regs, TCG_REG_R8), - tci_read_reg(regs, TCG_REG_R9), - tci_read_reg(regs, TCG_REG_R10), - tci_read_reg(regs, TCG_REG_R11)= ); - tci_write_reg(regs, TCG_REG_R0, tmp64); - tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32); -#else - tmp64 =3D ((helper_function)ptr)(tci_read_reg(regs, TCG_REG_R0= ), - tci_read_reg(regs, TCG_REG_R1), - tci_read_reg(regs, TCG_REG_R2), - tci_read_reg(regs, TCG_REG_R3), - tci_read_reg(regs, TCG_REG_R4), - tci_read_reg(regs, TCG_REG_R5)); - tci_write_reg(regs, TCG_REG_R0, tmp64); -#endif + + /* + * Set up the ffi_avalue array once, delayed until now + * because many TB's do not make any calls. In tcg_gen_callN, + * we arranged for every real argument to be "left-aligned" + * in each 64-bit slot. + */ + if (call_slots[0] =3D=3D NULL) { + for (int i =3D 0; i < ARRAY_SIZE(call_slots); ++i) { + call_slots[i] =3D &stack[i]; + } + } + + /* + * Call the helper function. Any result winds up + * "left-aligned" in the stack[0] slot. + */ + { + void **pptr =3D ptr; + ffi_call(pptr[1], pptr[0], stack, call_slots); + } + switch (len) { + case 0: /* void */ + break; + case 1: /* uint32_t */ + /* + * Note that libffi has an odd special case in that it will + * always widen an integral result to ffi_arg. + */ + if (sizeof(ffi_arg) =3D=3D 4) { + regs[TCG_REG_R0] =3D *(uint32_t *)stack; + break; + } + /* fall through */ + case 2: /* uint64_t */ + if (TCG_TARGET_REG_BITS =3D=3D 32) { + tci_write_reg64(regs, TCG_REG_R1, TCG_REG_R0, stack[0]= ); + } else { + regs[TCG_REG_R0] =3D stack[0]; + } + break; + default: + g_assert_not_reached(); + } break; + case INDEX_op_br: tci_args_l(&tb_ptr, &ptr); tb_ptr =3D ptr; @@ -1145,13 +1165,17 @@ int print_insn_tci(bfd_vma addr, disassemble_info *= info) =20 switch (op) { case INDEX_op_br: - case INDEX_op_call: case INDEX_op_exit_tb: case INDEX_op_goto_tb: tci_args_l(&tb_ptr, &ptr); info->fprintf_func(info->stream, "%-12s %p", op_name, ptr); break; =20 + case INDEX_op_call: + tci_args_nl(&tb_ptr, &len, &ptr); + info->fprintf_func(info->stream, "%-12s %d,%p", op_name, len, ptr= ); + break; + case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 7fb3b04eaf..8d75482546 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -192,23 +192,8 @@ static const int tcg_target_reg_alloc_order[] =3D { # error Fix needed, number of supported input arguments changed! #endif =20 -static const int tcg_target_call_iarg_regs[] =3D { - TCG_REG_R0, - TCG_REG_R1, - TCG_REG_R2, - TCG_REG_R3, - TCG_REG_R4, - TCG_REG_R5, -#if TCG_TARGET_REG_BITS =3D=3D 32 - /* 32 bit hosts need 2 * MAX_OPC_PARAM_IARGS registers. */ - TCG_REG_R6, - TCG_REG_R7, - TCG_REG_R8, - TCG_REG_R9, - TCG_REG_R10, - TCG_REG_R11, -#endif -}; +/* No call arguments via registers. All will be stored on the "stack". */ +static const int tcg_target_call_iarg_regs[] =3D { }; =20 static const int tcg_target_call_oarg_regs[] =3D { TCG_REG_R0, @@ -292,8 +277,9 @@ static void tci_out_label(TCGContext *s, TCGLabel *labe= l) static void stack_bounds_check(TCGReg base, target_long offset) { if (base =3D=3D TCG_REG_CALL_STACK) { - tcg_debug_assert(offset < 0); - tcg_debug_assert(offset >=3D -(CPU_TEMP_BUF_NLONGS * sizeof(long))= ); + tcg_debug_assert(offset >=3D 0); + tcg_debug_assert(offset < (TCG_STATIC_CALL_ARGS_SIZE + + TCG_STATIC_FRAME_SIZE)); } } =20 @@ -360,11 +346,25 @@ static void tcg_out_movi(TCGContext *s, TCGType type, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 -static inline void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) +static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) { uint8_t *old_code_ptr =3D s->code_ptr; + const TCGHelperInfo *info; + uint8_t which; + + info =3D g_hash_table_lookup(helper_table, (gpointer)arg); + if (info->cif->rtype =3D=3D &ffi_type_void) { + which =3D 0; + } else if (info->cif->rtype->size =3D=3D 4) { + which =3D 1; + } else { + tcg_debug_assert(info->cif->rtype->size =3D=3D 8); + which =3D 2; + } tcg_out_op_t(s, INDEX_op_call); - tcg_out_i(s, (uintptr_t)arg); + tcg_out8(s, which); + tcg_out_i(s, (uintptr_t)info); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 @@ -629,11 +629,9 @@ static void tcg_target_init(TCGContext *s) s->reserved_regs =3D 0; tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); =20 - /* We use negative offsets from "sp" so that we can distinguish - stores that might pretend to be call arguments. */ - tcg_set_frame(s, TCG_REG_CALL_STACK, - -CPU_TEMP_BUF_NLONGS * sizeof(long), - CPU_TEMP_BUF_NLONGS * sizeof(long)); + /* The call arguments come first, followed by the temp storage. */ + tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, + TCG_STATIC_FRAME_SIZE); } =20 /* Generate global QEMU prologue and epilogue code. */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474859; cv=none; d=zohomail.com; s=zohoarc; b=iOTkQJPm13t1V9rOzdIowUhe2IccBO/4hK87Yr1KLuEKxEjcaoWQH7c+/1cI3gw51KEMEUB33SQtPGgLB1tUBeVA0PhN8o2GqAmRjf+yuctlnntxzhQ+Legzv6LJ5EUqszteR7aDWK/fZZfkDE8DRkxWo3IvJKlgXjxjB01P6L0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474859; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=YQBNB7jLXwaZJSYBL0BvoU6n3wPE6zwxayv+Hpeg13U=; b=j8IelgmgmH34HAy3FtK7UIlos02obcmBoX3UBv+rkaeR9HfDIWFLyCZ0yXB6JK09SI3gPn0ftMM+/sr+6/VQJJW5ylyMQrqhMwFEi4P+qv+Dab6cUEkjG/BYLeB4oafCzJ//lx+i62O6QojBq1Y8VB2xyqXdJkrM0aLy0LiUfuY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474859851825.2824775700933; Thu, 11 Mar 2021 07:00:59 -0800 (PST) Received: from localhost ([::1]:53086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMo5-0007XD-5J for importer@patchew.org; Thu, 11 Mar 2021 10:00:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39912) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUN-0003dG-FY for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:35 -0500 Received: from mail-qk1-x733.google.com ([2607:f8b0:4864:20::733]:45027) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUL-0006Vs-PF for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:35 -0500 Received: by mail-qk1-x733.google.com with SMTP id 130so20749632qkh.11 for ; Thu, 11 Mar 2021 06:40:30 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YQBNB7jLXwaZJSYBL0BvoU6n3wPE6zwxayv+Hpeg13U=; b=XyYsQi8Sl5M1QLZWcju+fpxXdo8vmpu858SeXAAqQaZisBMQGhbEDDkdCbEUr2SF4C /xrda1VgQ8wDEqiH/Jn3gDTqiTW//l/a7iaL4P4vHLatGNKJomhmzaJ0DQv7NKL7BZjt /Cp4Jtc5srrqz1p1Aze/9wYIlo3gLV4nrF9eIiYNy/Y2I9I1N9mp37+7wDgEBod9crJe WknLO9Cz11RFOCxukRPRLP9xtGFJLudCSkQF2N+V1OfLHx1bD/qZ73kntx9Y6DmtgOg5 nLeKtQiIEWwewxQIQ3pRD4BG/YGGjF5Qty3EUOmdWxjf7uWpQICJ6ESXj5Tj9SXX/Xz5 FMSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YQBNB7jLXwaZJSYBL0BvoU6n3wPE6zwxayv+Hpeg13U=; b=IgmRZUF3aIyxJLY28pDJfU1BaEF5CtiRXDn5yFr0NreKBNc5Xq/4kg/4ypx9FyQe/x SuCbrxmME0Ign0zjLAqSEy0O4ZJfvqPuuQsiQsWlvqSU53i5WKoXG7aLEs9vOr9bYxyE Prqf55moZsBVl7rU6SZwhEl/ejh4HShYW9hH6ha8A6mZVU85r+Q8/D1imPFtAAY5cu+d xMUsZ1KSjAjQl1lEMMLny2+QR2CQe4nedQJhG60cVwHV/B9EVioDAcuPhDxJhMiJi9+9 ukuyvlbdkfugGXu8scEOH5zapgd1wadYAT79gpvppY8nW03dsmNEWibLLFq/w6Dm8VvD 5jaw== X-Gm-Message-State: AOAM530IaerMKlDZJj1oodn7wOtlRA5K/Z/queVA/zyci7JIFHCNT4ub Zb6v8L10Yp26FsVhFo449cO/M+WbnXoQlvJq X-Google-Smtp-Source: ABdhPJzEGk83eFQa/QO1dH1QtgE+Y4Jm9zlzB5Vl2Tu3M2z+MGDlpUjI/uIpY+8Pc2/Fi5SZfzijOg== X-Received: by 2002:a05:620a:798:: with SMTP id 24mr7908872qka.493.1615473630257; Thu, 11 Mar 2021 06:40:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 24/57] tcg/tci: Improve tcg_target_call_clobber_regs Date: Thu, 11 Mar 2021 08:39:25 -0600 Message-Id: <20210311143958.562625-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::733; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x733.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The current setting is much too pessimistic. Indicating only the one or two registers that are actually assigned after a call should avoid unnecessary movement between the register array and the stack array. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 8d75482546..4dae09deda 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -623,8 +623,14 @@ static void tcg_target_init(TCGContext *s) tcg_target_available_regs[TCG_TYPE_I32] =3D BIT(TCG_TARGET_NB_REGS) - = 1; /* Registers available for 64 bit operations. */ tcg_target_available_regs[TCG_TYPE_I64] =3D BIT(TCG_TARGET_NB_REGS) - = 1; - /* TODO: Which registers should be set here? */ - tcg_target_call_clobber_regs =3D BIT(TCG_TARGET_NB_REGS) - 1; + /* + * The interpreter "registers" are in the local stack frame and + * cannot be clobbered by the called helper functions. However, + * the interpreter assumes a 64-bit return value and assigns to + * the return value registers. + */ + tcg_target_call_clobber_regs =3D + MAKE_64BIT_MASK(TCG_REG_R0, 64 / TCG_TARGET_REG_BITS); =20 s->reserved_regs =3D 0; tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474593; cv=none; d=zohomail.com; s=zohoarc; b=fieR3mHFHf/QCNG24rHxXDZ3oWRZCD4Gu3ivtyqse+Sb58zmqkjasKtuVjx+Duxcy4SRnx6Jc2rFzVtUhGzg+/96wUVwCgZDwyjM8rD23EvyQNoyhic/7RHv7clt9DI4yDJiPYymWouDPdgGIOAN95VfDRnLRyCkkaYsIgwSBe8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474593; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LAWykP8xawhD0n2LEjnvxt6U+It9ZnMCGaTxxtC6jn0=; b=efeqqWpiYwosgq0ae4SX3ypQlKW9kVwXTYrdsmVxK0geuMo0qv0KWPdgtT0kKpDX2y6wYEKC9udAceiEUtjofGOUGjKTRGOuFThapBNmkF5PfBGd1eZ16SrPeMe8YsWCbmH1siY3BOmfwBqKFChZfn+npzguHdDzlXtRQfU8+iY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474593459708.7443240148118; Thu, 11 Mar 2021 06:56:33 -0800 (PST) Received: from localhost ([::1]:35698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMjo-0000Dt-Br for importer@patchew.org; Thu, 11 Mar 2021 09:56:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39916) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUO-0003eh-1P for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:36 -0500 Received: from mail-qk1-x732.google.com ([2607:f8b0:4864:20::732]:41577) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUL-0006Vw-PU for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:35 -0500 Received: by mail-qk1-x732.google.com with SMTP id x10so20776230qkm.8 for ; Thu, 11 Mar 2021 06:40:31 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LAWykP8xawhD0n2LEjnvxt6U+It9ZnMCGaTxxtC6jn0=; b=oNlNtMSCDmzuODVHYxXWDmhLsQ5EpnXZaj/Q5XduNTVYHm1J7xS6wNnDXvXkqt3Uwa JN9FL4Nueyr9AiMp/+ZLY3N3tjo0dxavsse5YGaPyVIJzJZ+47OIQR5ckLVQvcKf25R+ kaxKYcAd9PtNZ1qlU8pxq8jcg5gkTAM64CwZOMawkJIGm5UMJrHFp48GsY2b7IZwYKva BwGcb8J/N1nU4I0wTHP/Zz2zFJ4KpH9+UEwqsUDaVpxRsS03ghX1j3IAdd6Vm7d6M+1U QBTO1sF5dTMH9mEl8py20S9SQM3EoyfpY2jDSFtUmMOXAKD5ERGih2oRc4AZ7TjBAXQ9 MzqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LAWykP8xawhD0n2LEjnvxt6U+It9ZnMCGaTxxtC6jn0=; b=ZAcVz0xT8q5YLEyVL2wTmIg4XcDwDoJd03X6A/93olprJ0HyTl1FNy5+xwj3iU1G3d PCsEAvadSvDRxv8b8Vh2Xg2tqfdlwCcjLVZZd6M77R6erTbQD9OqCo6HmZGE0QCa2gf8 tt5x5Yo5WF6K7GzEavu5V4M1RXyP8+ULsGUz5gUvqusPbixcTFBLm+MrRn26udxMb+41 d82y0uG3TpyjW+SWGmbYABzQ+AuNuw0Iy1EzzWY4zraSQt6G2GGEHnApV6byb5LDKK9p b/Hdqa0om0StbmC8lamUTZ0FHp7hSqzZ/hPGxILtTCqRMJqmBeh6tcTA2J8JZWsDaumV 0iOg== X-Gm-Message-State: AOAM531+DCriCviLuK9pbJM7cEll+vGpMIZlx3VhP1klqytGHVY968Mo xbUxp5DlUKJMF5uLhW8SwIm7jd1rlqkBQQ9R X-Google-Smtp-Source: ABdhPJxylS51BSaE7IXSkyvupk1M7UpkZ4Z5DnsTjJgge79dPuoKyLlbgfLqY41ZZLm6nEyBqN0NEg== X-Received: by 2002:a37:8703:: with SMTP id j3mr7631455qkd.308.1615473631433; Thu, 11 Mar 2021 06:40:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 25/57] tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_order Date: Thu, 11 Mar 2021 08:39:26 -0600 Message-Id: <20210311143958.562625-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::732; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x732.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" As the only call-clobbered regs for TCI, these should receive the least priority. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 4dae09deda..53edc50a3b 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -170,8 +170,6 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcod= e op) } =20 static const int tcg_target_reg_alloc_order[] =3D { - TCG_REG_R0, - TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, TCG_REG_R4, @@ -186,6 +184,8 @@ static const int tcg_target_reg_alloc_order[] =3D { TCG_REG_R13, TCG_REG_R14, TCG_REG_R15, + TCG_REG_R1, + TCG_REG_R0, }; =20 #if MAX_OPC_PARAM_IARGS !=3D 6 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475026; cv=none; d=zohomail.com; s=zohoarc; b=fSr1uxNvIb//AZEyPqxWkqeXSJhXARZ/TFzMGy21yHfz78X9LaceJQwNNnT21IxJNpH+kOWx9TVrbzEm9WUBP1DStqWPdpCGUxmMvTYwDfCuJkjolq3CKpOf1Y4aHjYBe0f7WHeq11Q/V1E7BTohWCj0Yzva7eT47OD/Xqiw4j8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475026; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=akuogNqTsRbdFKyineyOU7+0wNNNt+eZ2/k7lVk1LqY=; b=P5xP7odtO7Wnv8zdf7Kquan8l6mpgXUZD+J5cZ6KKRz85aMHEBXI46vGOx1JVInk3ctKU+EZxReDhzOPGOERAHUSzLBQKo6HV8KzdXT80VfcwHRt9bPrjGv6Jn8Qd/UXtQ4CHWJmmlhqrPHPHb5Vh8cbCUELR2/cduC/X5zPiso= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475026478871.866981541442; Thu, 11 Mar 2021 07:03:46 -0800 (PST) Received: from localhost ([::1]:33516 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMqm-0003C4-Nk for importer@patchew.org; Thu, 11 Mar 2021 10:03:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39954) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUU-0003kL-IA for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:47 -0500 Received: from mail-qk1-x731.google.com ([2607:f8b0:4864:20::731]:40816) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUR-0006ZJ-TP for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:42 -0500 Received: by mail-qk1-x731.google.com with SMTP id l132so20782345qke.7 for ; Thu, 11 Mar 2021 06:40:38 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=akuogNqTsRbdFKyineyOU7+0wNNNt+eZ2/k7lVk1LqY=; b=TD5sfoMwi9HZhVYVL7CLcKKqV8L3KdWO9Ksz0SMPKl+40jJ6Te6T5zO2NzHQOQCktB 3VOhmm26xnS42PnrA5dYwE0tthinuW/o8AWlY21cmcobspgGfRkKAzjPIeRSu+pkvcof WB4us0s4p8InsJ6zWwSIbpa7sW8Sc8wQMOh/UzoAXAa03Di9qvU2hW6ZC0zBppha4RJG O9s8YCuVbXuJ+4bRL0e4tn+U18yiEXTsmtibsFxy2FukXyiamEYMHYKOLreHacvpiK/g 9IBu/OdQyRvUcx9Q3kxEinYPbT1PE5RnXg/il/fuz4nIaRlmk7DF2pKPaXNn6VdXQj1D Wuyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=akuogNqTsRbdFKyineyOU7+0wNNNt+eZ2/k7lVk1LqY=; b=j7od8BOFUFx4MYQRLcjeyj/GuLyO8GiiGMEplB/2Ux84Hy+cDJQgsPI5NFvdiTr5HS isF+4C0QHLNz4IodVjsKmGb8YbBbOKr8Axu39Pss61jivbducDDLtgpm5/UhsxLZPqHo bT8yHNeqQvh9QfaCVr5Ra1yU0huFN4OXULU1JP06VK+jbxpSi+fKbq25dOyEZutZ+iZt 4tMZ3XAJo50SfaCQ1uma1eEl+X7AUwQeqxTeauO9qHRIiSKrD1iDSgbdkX0EAlQGG9EH R+v8lD/QV2ra6mS+8wWPOfITfrFGaJP6zeWkIB3X4pj4iH33noUOrOz8pr8zk2Iks29y CYSw== X-Gm-Message-State: AOAM530ZAHxOb4YxY80RYIYa0yPxeqYRV/wscBFgo+xwuO1RbD3vBJrN ZPXXv3ekCyK9hT+dUZXLLBbSjPZRu+H4rbMk X-Google-Smtp-Source: ABdhPJzTsen1qpQ/qiS2T02Sm4J80Sy4LVad3FhUz8q9NiIk4AwGOaGL+swi+CLSz774/ACBgJ3fnw== X-Received: by 2002:a37:8c1:: with SMTP id 184mr165437qki.472.1615473632630; Thu, 11 Mar 2021 06:40:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 26/57] tcg/tci: Push opcode emit into each case Date: Thu, 11 Mar 2021 08:39:27 -0600 Message-Id: <20210311143958.562625-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x731.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We're about to split out bytecode output into helpers, but we can't do that one at a time if tcg_out_op_t is being done outside of the switch. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 35 ++++++++++++++++++++++++++++++++--- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 53edc50a3b..050d514853 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -385,40 +385,48 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, { uint8_t *old_code_ptr =3D s->code_ptr; =20 - tcg_out_op_t(s, opc); - switch (opc) { case INDEX_op_exit_tb: + tcg_out_op_t(s, opc); tcg_out_i(s, args[0]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_goto_tb: tcg_debug_assert(s->tb_jmp_insn_offset =3D=3D 0); /* indirect jump method. */ + tcg_out_op_t(s, opc); tcg_out_i(s, (uintptr_t)(s->tb_jmp_target_addr + args[0])); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; set_jmp_reset_offset(s, args[0]); break; =20 case INDEX_op_br: + tcg_out_op_t(s, opc); tci_out_label(s, arg_label(args[0])); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(setcond) + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out8(s, args[3]); /* condition */ + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: /* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */ + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out_r(s, args[3]); tcg_out_r(s, args[4]); tcg_out8(s, args[5]); /* condition */ + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; #endif =20 @@ -436,10 +444,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, CASE_64(st32) CASE_64(st) stack_bounds_check(args[1], args[2]); + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_debug_assert(args[2] =3D=3D (int32_t)args[2]); tcg_out32(s, args[2]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(add) @@ -462,12 +472,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, CASE_32_64(divu) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(rem) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(remu) /* Optional (TCG_TARGET_HAS_div_*). */ + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ + tcg_out_op_t(s, opc); { TCGArg pos =3D args[3], len =3D args[4]; TCGArg max =3D opc =3D=3D INDEX_op_deposit_i32 ? 32 : 64; @@ -481,13 +494,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out8(s, pos); tcg_out8(s, len); } + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(brcond) + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out8(s, args[2]); /* condition */ tci_out_label(s, arg_label(args[3])); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ @@ -503,48 +519,59 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */ CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */ CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */ + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out_r(s, args[3]); tcg_out_r(s, args[4]); tcg_out_r(s, args[5]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; case INDEX_op_brcond2_i32: + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out_r(s, args[3]); tcg_out8(s, args[4]); /* condition */ tci_out_label(s, arg_label(args[5])); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; case INDEX_op_mulu2_i32: + tcg_out_op_t(s, opc); tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); tcg_out_r(s, args[2]); tcg_out_r(s, args[3]); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; #endif =20 case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_st_i32: + tcg_out_op_t(s, opc); tcg_out_r(s, *args++); tcg_out_r(s, *args++); if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { tcg_out_r(s, *args++); } tcg_out32(s, *args++); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: + tcg_out_op_t(s, opc); tcg_out_r(s, *args++); if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_out_r(s, *args++); @@ -554,9 +581,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_out_r(s, *args++); } tcg_out32(s, *args++); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_mb: + tcg_out_op_t(s, opc); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ @@ -565,7 +595,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, default: tcg_abort(); } - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg= 1, --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475147; cv=none; d=zohomail.com; s=zohoarc; b=H0Nxio0nvBgs7TxBAcA8ln9sY9jQK3Tjimh3Vt+4wdaOumFvNYK+dTYf55ZlSVJc8N7mcGIGzVJ+h8yq/qcRVUwbsLccJIyBmT47QiXWkZ/wk8uIDoZsIX+rzoRK+LKcPwyDGhIGCKoWih3Ky7gOSM7DCHQ5PFJn2xkiXa4dobI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475147; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=r51gde6XQroUTuOp18Wacrk/m6aRKZagEOpI8SD7K0E=; b=KnEeRETrUkMdvBZTGIkBV3UWOOIx6x+VYwGb8MQzJ5lM4R4pubaIaH/zpmqRquK61aSezen+E3dEWb2lDMtAog6FUORUF6W5Tn+TyPscj18OjvLc7vI2JYV/tAn9S3I1nUbIfu6kdd0gnF9DcQMW10S0tL+8kPILH30BR1RXrrE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161547514749058.77643097155726; Thu, 11 Mar 2021 07:05:47 -0800 (PST) Received: from localhost ([::1]:53116 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMo5-0007Y8-K7 for importer@patchew.org; Thu, 11 Mar 2021 10:00:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40006) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUa-0003la-6J for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:50 -0500 Received: from mail-qk1-x735.google.com ([2607:f8b0:4864:20::735]:41581) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUS-0006Zx-9m for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:43 -0500 Received: by mail-qk1-x735.google.com with SMTP id x10so20776691qkm.8 for ; Thu, 11 Mar 2021 06:40:39 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r51gde6XQroUTuOp18Wacrk/m6aRKZagEOpI8SD7K0E=; b=J9yt/Z/4gdHNHp8hCuRVEoLsOKs/es7tBUbo3ECj9pTlUqgneNaMRkgxb57H85QouJ juFkMOLS6ojBFW7MybsUZdWa/RjcIseBZgClQeBD06eTSEP4xvL/8KvNfUm1VYsZ+7MY dhwe1yIRwkvHoats1rC0rl4bsbpoppCrDeVaD9WCHbfLgc4n8cojeafD0SjrZ1SbCYuT W+OJc4xZjZs6VHM2y4shamwF9rH4YzNbXkLkDHT1zfGTVlSJoSSyMG0G1c2/xMbYPgs4 NCeIgoSEObDHA7zHfkIKwcCNR5Q9/0ylviaHPKAUV1SC19cGdOXtdhFHEl0W1iw2RLO3 WggA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r51gde6XQroUTuOp18Wacrk/m6aRKZagEOpI8SD7K0E=; b=CRPMS4de00q9scw1bacqTyNlKx3XBed2EpY3I5nB90OfdXSvjqS98J4J/SYjzae76B T6RqHjK/sBMDuK1XhkpCSMC5n8MG1tRHyRXr8xF2OHn2v6foB/LthBPF8cp51wH9HHag jbPNJwqYrcnOTSEiEBrwpXRryeF9ZBIJRa1tVU7Cm7xZts7FpSM871iHOIG6LejJq2q8 xLA8N6Oqbt/3eMclYhz+GjYMam7pzw+PuHERX9cqDLytgCTL0U4DYyASJns5l/d2C5L0 WCRpasiaT/LE408K7UDXIT1nueNUhrd8GU+MazzWHnHlCBUxuGeEsurA37AjpJrziBIf Myxw== X-Gm-Message-State: AOAM5304b+4xSLMiSUiKBLgMOV0d+pe3RflpAHj1YULL879txjq9nheS 34pLN9pKOHSe8z1yAu2Q0+k4Hlqzx8sMZhPV X-Google-Smtp-Source: ABdhPJx9rrFC7GYc4sEZpZgQkth3N6W+FC1OPDF724ZIyv8e6gpMQ9K0ZofFv09XwffbjdNOlA4GJw== X-Received: by 2002:a05:620a:1593:: with SMTP id d19mr7562338qkk.83.1615473639073; Thu, 11 Mar 2021 06:40:39 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 27/57] tcg/tci: Split out tcg_out_op_rrs Date: Thu, 11 Mar 2021 08:39:28 -0600 Message-Id: <20210311143958.562625-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::735; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x735.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 84 +++++++++++++++++++--------------------- 1 file changed, 39 insertions(+), 45 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 050d514853..707f801099 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -283,32 +283,38 @@ static void stack_bounds_check(TCGReg base, target_lo= ng offset) } } =20 -static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg= 1, - intptr_t arg2) +static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, intptr_t i2) { uint8_t *old_code_ptr =3D s->code_ptr; =20 - stack_bounds_check(arg1, arg2); - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_op_t(s, INDEX_op_ld_i32); - tcg_out_r(s, ret); - tcg_out_r(s, arg1); - tcg_out32(s, arg2); - } else { - tcg_debug_assert(type =3D=3D TCG_TYPE_I64); -#if TCG_TARGET_REG_BITS =3D=3D 64 - tcg_out_op_t(s, INDEX_op_ld_i64); - tcg_out_r(s, ret); - tcg_out_r(s, arg1); - tcg_debug_assert(arg2 =3D=3D (int32_t)arg2); - tcg_out32(s, arg2); -#else - TODO(); -#endif - } + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_debug_assert(i2 =3D=3D (int32_t)i2); + tcg_out32(s, i2); + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, + intptr_t offset) +{ + stack_bounds_check(base, offset); + switch (type) { + case TCG_TYPE_I32: + tcg_out_op_rrs(s, INDEX_op_ld_i32, val, base, offset); + break; +#if TCG_TARGET_REG_BITS =3D=3D 64 + case TCG_TYPE_I64: + tcg_out_op_rrs(s, INDEX_op_ld_i64, val, base, offset); + break; +#endif + default: + g_assert_not_reached(); + } +} + static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg ar= g) { uint8_t *old_code_ptr =3D s->code_ptr; @@ -444,12 +450,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, CASE_64(st32) CASE_64(st) stack_bounds_check(args[1], args[2]); - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_debug_assert(args[2] =3D=3D (int32_t)args[2]); - tcg_out32(s, args[2]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrs(s, opc, args[0], args[1], args[2]); break; =20 CASE_32_64(add) @@ -597,29 +598,22 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, } } =20 -static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg= 1, - intptr_t arg2) +static void tcg_out_st(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, + intptr_t offset) { - uint8_t *old_code_ptr =3D s->code_ptr; - - stack_bounds_check(arg1, arg2); - if (type =3D=3D TCG_TYPE_I32) { - tcg_out_op_t(s, INDEX_op_st_i32); - tcg_out_r(s, arg); - tcg_out_r(s, arg1); - tcg_out32(s, arg2); - } else { - tcg_debug_assert(type =3D=3D TCG_TYPE_I64); + stack_bounds_check(base, offset); + switch (type) { + case TCG_TYPE_I32: + tcg_out_op_rrs(s, INDEX_op_st_i32, val, base, offset); + break; #if TCG_TARGET_REG_BITS =3D=3D 64 - tcg_out_op_t(s, INDEX_op_st_i64); - tcg_out_r(s, arg); - tcg_out_r(s, arg1); - tcg_out32(s, arg2); -#else - TODO(); + case TCG_TYPE_I64: + tcg_out_op_rrs(s, INDEX_op_st_i64, val, base, offset); + break; #endif + default: + g_assert_not_reached(); } - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475178; cv=none; d=zohomail.com; s=zohoarc; b=amFKpThmD9O8Ajp1175KgoTy9IkW2qfnzIOt5XV6ul8ZIMS9zvHHrGJN7v8O/PEg5WJpcj7zJ1L5O6nLGgUpfH1WetOMniZImlLx2Bz09U3wWwtn1J39opPm4y64xa7JUAfWNQB3CD3atJedqniQuf6goAjBWwJDsj/VNjEoI+w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475178; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EsUj7sq9+NLQtwJZ+3yHUWsYmpE8j3VuEo3uruSYCgE=; b=K0iMWdwPvvRfFaHR2S6e2wGholYAoJ+zbrXO1e0YpvggdNKANmAc8FH9l2OV8KbfsUV/DPT08DthePDwcIMoMU6dNktAuQUjrCHQabZ72SQ/5YhkbfH+55VQDNqJLjuABIaNFDhQhVTww1CDd8UlZNVyXHlI41MUlJFyoERrZf4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475178606845.362705627193; Thu, 11 Mar 2021 07:06:18 -0800 (PST) Received: from localhost ([::1]:42166 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMtF-0006vT-ME for importer@patchew.org; Thu, 11 Mar 2021 10:06:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40010) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUa-0003lc-5p for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:50 -0500 Received: from mail-qk1-x72f.google.com ([2607:f8b0:4864:20::72f]:34276) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUS-0006bE-V4 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:47 -0500 Received: by mail-qk1-x72f.google.com with SMTP id t4so20834686qkp.1 for ; Thu, 11 Mar 2021 06:40:40 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EsUj7sq9+NLQtwJZ+3yHUWsYmpE8j3VuEo3uruSYCgE=; b=py20UqvxhJh+FIvFAI9mq3TUgusl0xUuCs3JDi+FVDIiVBLMS01JIpPcrT5wim3RTQ OVQgmnOoBpDItKkmOyU6l5hBdIuJTNQIxDDXhAZqXCqvtaMo4lZGXS/php3Yjpv/pje/ mLVCbhAWMNpwD2prMnyZPBnZjiT+0N1jhkVQJ1HXrmNsQzZQ2Ic/s/96Wr1Xfd8q41aX u9JPXsRWT9DF0j+Le/Ip550k8G2+ccriJZ6lfuofAzrZyitZkDFL5gdYN4KVFpdVkqZL HENfREZCUFQVmcYXDHoh6IU/CHBI+184+5k7tAJtRsGTo1m36xbI1rbTf63jwuqGdecy /DLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EsUj7sq9+NLQtwJZ+3yHUWsYmpE8j3VuEo3uruSYCgE=; b=RPXnJ3KP3EBILF69GeJcvFtsjwQwhdbB6PgQuoJKiN6exsNJieO7+i8efdWl+EF+0H qFZThNtfbTDys9L/tJg/3acluAXOD0MMzuVLo+aa4Phqj3fU9h4wgLnocsiOqH3eD9qz md4OmPKXCcJiAn80UXyYHTcdgbgfvaioZQQq/UQ2Uv510YzTF4qCl55HPjReBU585srm x6MmOIp24TRdXFBbkBI3lPV9nqNXQg2Ef1sU7356AviutyNVE/iuXFC/8V0EY+tXKTL/ j+f4WHXnU3G0km/4sn5hqQzL1yDmZpxCaw5IgUHQxTjKrawbRRcHzJ1SH6YKHPF/6GXr wrrg== X-Gm-Message-State: AOAM532+Sv3sOoz00I6NvYgj+QeqhxW3o19qN9/wH2uXDtKcHhxOIiWa RvvbiQbeFOvsKrDWcxgN75kTUeq7ety3/ssR X-Google-Smtp-Source: ABdhPJyYozwoTSA7eeuWYf+r5o3VMIhoh/rsnDn/wnGsQ5zuebotzvKFoAvpdfHXwSHpXJRsw5kB/g== X-Received: by 2002:a05:620a:798:: with SMTP id 24mr7909654qka.493.1615473640201; Thu, 11 Mar 2021 06:40:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 28/57] tcg/tci: Split out tcg_out_op_l Date: Thu, 11 Mar 2021 08:39:29 -0600 Message-Id: <20210311143958.562625-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72f; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 707f801099..1e3f2c4049 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -283,6 +283,16 @@ static void stack_bounds_check(TCGReg base, target_lon= g offset) } } =20 +static void tcg_out_op_l(TCGContext *s, TCGOpcode op, TCGLabel *l0) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tci_out_label(s, l0); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, intptr_t i2) { @@ -408,9 +418,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, break; =20 case INDEX_op_br: - tcg_out_op_t(s, opc); - tci_out_label(s, arg_label(args[0])); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_l(s, opc, arg_label(args[0])); break; =20 CASE_32_64(setcond) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474976; cv=none; d=zohomail.com; s=zohoarc; b=Ah42iZBnEiXmPisNn9XPDHB+XFzs1D9mMCHaAsPjJJtRMuqoCpTr5JnJzglQrTKBhf4W2V/4vlWl4EfrySubeSuJnuKx+7VX2h3Zuou9+NM9C3GlPVBjSzxK7DFcZTBB+WsgBhuPrN1dirRgJqbALIaP2CjgFmkRrLljkL+S2WQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474976; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=06Y+cyMxl+dC1AQMaIsueXy7S/PiohsOvXqBqGkx3uw=; b=MbHW0TBHQqlPJkgcgYMywbdLEp+lKwjsqztaCZBCCOj90saV004+hau3telJnRxatH7ZPFIWsT+Q0LQe9u2THaQjXFpyeiSnNlW4TuMp+dDqRmIqRLp93wZRm+Ebl+isuRZYiVToITkxcQMHTi68MP9Hd2ExXZnYAgNunglkkqU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474976842256.0430257458984; Thu, 11 Mar 2021 07:02:56 -0800 (PST) Received: from localhost ([::1]:59468 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMpz-0002AK-CP for importer@patchew.org; Thu, 11 Mar 2021 10:02:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40114) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUm-0003oP-6J for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: from mail-qk1-x733.google.com ([2607:f8b0:4864:20::733]:34280) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUU-0006cT-6u for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:53 -0500 Received: by mail-qk1-x733.google.com with SMTP id t4so20834758qkp.1 for ; Thu, 11 Mar 2021 06:40:41 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=06Y+cyMxl+dC1AQMaIsueXy7S/PiohsOvXqBqGkx3uw=; b=QKPRXBQgU3YRAKcDAThexKRUDReRIr0vYpQYxTsRN2b898Ovzc5r/isDOGdr1o6uRE /EZ4/3f+w1JzdqwxbXKebch8PT0JSRgiRq1ddG0MZp0vRsw8wNcRaHEPZxdjxrPf4oZo CXfhT1sEu1WI8kV7Ptzkov2HS1go4do7j83WAYk5pMtcaNJqZ2qCjUjmu2E+gSjaZ5dV DuS/RlmsayDLTPuMYVK2njPdVY9NGYWbPZyn2ERv9KkoPHtggC7FwZryW2UhsMXw5RgV 2KLf8T8HGe2260S1Y6J+LqXWjch995A1JIxUljtF37ttLuqZfqPfHUHjiEH3ooorkCoG cj+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=06Y+cyMxl+dC1AQMaIsueXy7S/PiohsOvXqBqGkx3uw=; b=dnT3AE59FL24E/tRjKYLBXMzaNufJ6prsCoRXjIkscqpLQZyydn1e5Iyq4Eyv6mubC FkCINIi+OqL4id7GNtsu4w2Hdh4Y9uu0tfMELK0/+GHnRBOS1g4X1bP2JtnZBoojvaQA ocpQOjkxB8To+GeaLhhQ5Pyix2klvpcK2idx4SapXkHSkWGQ+TWVNxXO7mS7LfTMYzYU xYJr/kFF2UtAB5dbPbtXvBCpjSy+oYLXwxwDWQGHaQ/SdTOYirZtoL00gYFGQUp8x8ur rugfZLMzoo3mv/CNPAy7vfvTe54Byrv94R31j8niCfJ36Ki4+TMkEdQzc1aBFo+j6YDL CXYg== X-Gm-Message-State: AOAM533bzrPwmN6EfbNVMglt28LuCs7YAVXKNsmwy9Q0Hmjb2VyELx2q grIf7a7K0zRGl6s3hLFt8XXM+ZrwC8IvDLzn X-Google-Smtp-Source: ABdhPJwmgvhu6X5nqOvAkIqjhULNcvc+g1BDvRwY+Wk/p/H4QLZZu6jOEC/Z9e0gypPLO+LMd/YzZQ== X-Received: by 2002:a37:46c5:: with SMTP id t188mr8040014qka.47.1615473641303; Thu, 11 Mar 2021 06:40:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 29/57] tcg/tci: Split out tcg_out_op_p Date: Thu, 11 Mar 2021 08:39:30 -0600 Message-Id: <20210311143958.562625-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::733; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x733.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 1e3f2c4049..cb0cbbb8da 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -293,6 +293,16 @@ static void tcg_out_op_l(TCGContext *s, TCGOpcode op, = TCGLabel *l0) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_p(TCGContext *s, TCGOpcode op, void *p0) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_i(s, (uintptr_t)p0); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, intptr_t i2) { @@ -403,17 +413,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, =20 switch (opc) { case INDEX_op_exit_tb: - tcg_out_op_t(s, opc); - tcg_out_i(s, args[0]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_p(s, opc, (void *)args[0]); break; =20 case INDEX_op_goto_tb: tcg_debug_assert(s->tb_jmp_insn_offset =3D=3D 0); /* indirect jump method. */ - tcg_out_op_t(s, opc); - tcg_out_i(s, (uintptr_t)(s->tb_jmp_target_addr + args[0])); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_p(s, opc, s->tb_jmp_target_addr + args[0]); set_jmp_reset_offset(s, args[0]); break; =20 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475274; cv=none; d=zohomail.com; s=zohoarc; b=Wd22PPd0jj8XCfZU8F9heTwJ2gZZ6B4wt/aq4tayOjQW2hi370J/pLm3LPa7Gcd1+bJKjqmv1CM86QMIR8eJaeJ/0MoiF3D06gJDCKFg+10RHRU6/D08IrQTGviFuWjmkvP6TcQkcaiWWTvvVakfTcTvZoOiTuA+cCm/Ow5W5Xo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475274; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Kpfe6JZmwXM15Cw7O9Ulgnnkm0DVoqv1s4+DGCwKajc=; b=hOsA9pndLaKiWzrpu2mnvcekoIV/3xHrt3zpkZBMccjOkDDyjvKtMZ0ELTNULMozOC4QllEgpPfoNfPYFmJTaWRPhFXQL+lWfBCu0gfuXjAhfAcRAkgpf3eOJN5PvmcuQkhYuyftkokNfnTFirKBakKlEjpatjvI8oGbNvO69ck= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475274753695.011300660047; Thu, 11 Mar 2021 07:07:54 -0800 (PST) Received: from localhost ([::1]:48376 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMun-00012x-Cq for importer@patchew.org; Thu, 11 Mar 2021 10:07:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40126) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUn-0003p7-76 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: from mail-qk1-x72e.google.com ([2607:f8b0:4864:20::72e]:33786) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUY-0006cf-Pw for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:00 -0500 Received: by mail-qk1-x72e.google.com with SMTP id l4so20794511qkl.0 for ; Thu, 11 Mar 2021 06:40:43 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Kpfe6JZmwXM15Cw7O9Ulgnnkm0DVoqv1s4+DGCwKajc=; b=BM1SzYEtyjptmduTwQ6JgEZP09novekLq3uO1o21XMCfsnLR6dKY+gPf/hhvDnq+PQ 2xbCAeuEVn6OP9jGNTmpnSX7FkDgEr+DjdulAHoYdsHAG6Q90rdwNo0Rw2c4bOgPRLrW 5qwQGtHwS7hhMkmmru1lWFJqejplv1oBqhcbDxwRv5l2rm5dHX4A7eNR3DrUKX2E6Ru3 wxTwuSQP9cHKyOdb/rra0Inmvrwc9ayHzbyzkeeAPbmVHEyjAU2xDj+/dcAbQaBC5768 Ai7vQJFj7LFLISCGnqknCap8YyKrnLgjmgohdt41Xgq1qN/s7PMqnhZASbOO18pE3kp+ C5wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Kpfe6JZmwXM15Cw7O9Ulgnnkm0DVoqv1s4+DGCwKajc=; b=VVGSBjMJ2V7JsDmqpIaUTzhD2ScIJZqHM364n8PiUHE7M0Px+ocx+SSpipfuIIVa+f q82R4geJM1n4/ed/eQ5HHYK6uUMl33t+y+n9Zi+QhlMg5Dpd8pCo633cuUJXIm3sG8M/ KfGWlRWu6/1G8ZPB0AX5mye51HU2hnvR/PLYsKy8mGPNzHQKCBLcRJXdJhQXCQpyevwM l+ZudPHQMmllI0JVDhas5+FTaN5GHIoBDnyiUmLeQ8cgBeuycYerw9bCrlBP9yehofrb p+PHjc2M6o3NQWUuCTkZFS8GHreIFsV/hTHTbj9689w32qfXEsRnAJG5leba5A9Mn7pz rTmQ== X-Gm-Message-State: AOAM530LpjsNP4Poqr+hb9s+xDISZX3elHmK2zqY89cYRPDRSTV4IakM uQBupBA1OjytaeEo7+FUYqrthplS1uFDLHjF X-Google-Smtp-Source: ABdhPJypXXvrEECWIY/qZMcNHexM6fBQgtEr0FUZ7QWDtHP7bR/ahZon477oPFdMQcVO5Ok4bXCYtQ== X-Received: by 2002:a37:4b45:: with SMTP id y66mr7911064qka.179.1615473642537; Thu, 11 Mar 2021 06:40:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 30/57] tcg/tci: Split out tcg_out_op_rr Date: Thu, 11 Mar 2021 08:39:31 -0600 Message-Id: <20210311143958.562625-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" At the same time, validate the type argument in tcg_out_mov. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index cb0cbbb8da..272e3ca70b 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -303,6 +303,17 @@ static void tcg_out_op_p(TCGContext *s, TCGOpcode op, = void *p0) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, intptr_t i2) { @@ -337,16 +348,18 @@ static void tcg_out_ld(TCGContext *s, TCGType type, T= CGReg val, TCGReg base, =20 static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg ar= g) { - uint8_t *old_code_ptr =3D s->code_ptr; - tcg_debug_assert(ret !=3D arg); -#if TCG_TARGET_REG_BITS =3D=3D 32 - tcg_out_op_t(s, INDEX_op_mov_i32); -#else - tcg_out_op_t(s, INDEX_op_mov_i64); + switch (type) { + case TCG_TYPE_I32: + tcg_out_op_rr(s, INDEX_op_mov_i32, ret, arg); + break; +#if TCG_TARGET_REG_BITS =3D=3D 64 + case TCG_TYPE_I64: + tcg_out_op_rr(s, INDEX_op_mov_i64, ret, arg); + break; #endif - tcg_out_r(s, ret); - tcg_out_r(s, arg); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + default: + g_assert_not_reached(); + } return true; } =20 @@ -534,10 +547,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */ CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */ CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */ - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rr(s, opc, args[0], args[1]); break; =20 #if TCG_TARGET_REG_BITS =3D=3D 32 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475151; cv=none; d=zohomail.com; s=zohoarc; b=WpTPds5TWIoXcO/uPjDfrXZ086BygV/uNRchSPLE3RCw5sMX4FBDgscA7ddxxV5WtLH3hkVRktZSenQSZCtu5+sqdmRdASf+XcCegBJVfc7Iq4SDMvVO3csI778BxuvG4NtAC6G3lUwReNsWYUWqVuSe783kxd1gav1TFzrEEIE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475151; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RzFAVc3cWW3yr0pGO36GqM64ymG+VJfs9mt8bjfFgIQ=; b=enVLHCMMZnpzDfUXy3JxSXepwPq/YM7BnX7gsdzoP3vjMYaAJ58o80KBmhtmOXE+SbIKrHVSGq6FPKeRnDttWtf8FCaOkj1NfoYDjoIW1mndL+q0MjddiFN29uBcvg3CjAIkHAW7yo2MspUp10jQsmhx4JzrRNdznPYsggu5K48= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475151403442.85637152311176; Thu, 11 Mar 2021 07:05:51 -0800 (PST) Received: from localhost ([::1]:39660 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMso-0005lg-EJ for importer@patchew.org; Thu, 11 Mar 2021 10:05:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40116) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUm-0003oW-6i for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: from mail-qk1-x733.google.com ([2607:f8b0:4864:20::733]:41580) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUZ-0006cs-UF for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:58 -0500 Received: by mail-qk1-x733.google.com with SMTP id x10so20777037qkm.8 for ; Thu, 11 Mar 2021 06:40:44 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RzFAVc3cWW3yr0pGO36GqM64ymG+VJfs9mt8bjfFgIQ=; b=r5YXuX8i/DDg7ZM9ylBOupm3no4Mgk9trgLi3BFqAJJUSVsgBe/rwI1YyiyakFiN5b IsrGvjFp4XfJYr331xbcBmuN7iEbHowwGA9wmZDLRnmN1UWdLRFCLe5lFl3o4rzFHjjZ iDoWnR+4sMY6ZP0tMLbhsaRvsxRtILBBHdMoo7o1ltlT9+GbRvTWYaexVKxxaBdPjKqd ixs8gW//5hYdz4g/Sea26Ucm2rOap4ZhYAYKnNehVRFJ3/O8VsCCTWSNnXwv/SLWmaj7 BGuJy+RxJb2pLJfrMECdI6XtlWxesvWVvuiKCOP02INvcQQcjSSNP1Y0FLxm9Wn725Bx E2XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RzFAVc3cWW3yr0pGO36GqM64ymG+VJfs9mt8bjfFgIQ=; b=dLP9b5B9+SFiuOTxCP4MLC+GlsLSSr59GuQMWmqdNw/phEDbg9mDX6QH5id6kDywsC Tj0xPnu7A3Gr8br9voSboSxmjygKZz3vYnhDhetzwMAhOrElhLfwL0YAFLdIv4rTZGYR WiXavsh6UUzrV99LwKm89hlcB/KgoKBmyOHgQ0RhRHDSkdc1SGuGcQQPixCdFRAOFGMh QTZHwJEPTS2VhAEOuugYNf22xY/sx7ytY+fO640tuGf1roO8tn+VGv59U0N+iaQHCGhL zp7HQJit2L4CW4M8SxN6phyFeENRDeDFXtvjC43dT56GHekgmyh5s5kPzPd56RKGcSzB MVjg== X-Gm-Message-State: AOAM532bIj4AkjxP/zwsGAPNd43Sx6ZXi77i4v0z0ZlgWprJ3EoKJ7Eg ovQFhVPpzsIypk2BLnHYGMdaqOeMiUfuafR4 X-Google-Smtp-Source: ABdhPJwEKrHbYt2b0oaHjKN6mcxEm68woHPVBhQgTRLILtlHEiGaF8Sk6u/8aX67MihjfTe1U9Az0w== X-Received: by 2002:a37:30f:: with SMTP id 15mr8052434qkd.494.1615473643907; Thu, 11 Mar 2021 06:40:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 31/57] tcg/tci: Split out tcg_out_op_rrr Date: Thu, 11 Mar 2021 08:39:32 -0600 Message-Id: <20210311143958.562625-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::733; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x733.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 272e3ca70b..546424c2bd 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -314,6 +314,19 @@ static void tcg_out_op_rr(TCGContext *s, TCGOpcode op,= TCGReg r0, TCGReg r1) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrr(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, intptr_t i2) { @@ -500,11 +513,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, CASE_32_64(divu) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(rem) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(remu) /* Optional (TCG_TARGET_HAS_div_*). */ - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrr(s, opc, args[0], args[1], args[2]); break; =20 CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475026; cv=none; d=zohomail.com; s=zohoarc; b=KBLltZJQQCFYh7hSuHx2x5xI69CGaDnkt3tKxxPVyxUbrRxy92dNQC12xqUcAkmMPRy9/VmaISyTdG1M2p4VlegRsoKPHq5x3jbNI5TVRnycjk1j+kHpDP0JDY8FPGbdf0tOclyY1LFeSS3JGsphVN0juj07w9QMIKv6oOFmK2I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475026; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=QUs6bZlAERttu34ccVgcqABRUHJrBFMHH0LXLYX1oZo=; b=AwT0OZCew/GFNEUoUf4OyFVHa3u6QuAAY/sv9YIiXj0wVBGH/VvtExihkmfenMnj19s1H9Z6aYANnkLAHohqpRls1jrMjQHIivfyGY0Af8vK8FtIbNXV0xj1w/P/z5fZB2AtVDhwleVxhaA0eTFVZ/XJlP0j6dSee2pPu36DQE8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475026068364.4935961603878; Thu, 11 Mar 2021 07:03:46 -0800 (PST) Received: from localhost ([::1]:33542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMqm-0003Cc-CR for importer@patchew.org; Thu, 11 Mar 2021 10:03:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUd-0003ml-7z for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:51 -0500 Received: from mail-qk1-x72e.google.com ([2607:f8b0:4864:20::72e]:35043) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUZ-0006cx-Ss for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:51 -0500 Received: by mail-qk1-x72e.google.com with SMTP id d20so20806331qkc.2 for ; Thu, 11 Mar 2021 06:40:45 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QUs6bZlAERttu34ccVgcqABRUHJrBFMHH0LXLYX1oZo=; b=cL+/kNiEGB49mzbGLi58RnhBMxPfn+1KKr5kYd62mCe9EP5UvP3xr6xZqN94o5y0xc 7YaFhJF3MYQtAacTWLzVV7Ap5yYZDLXHuHSEelZm7bqIZW6+fRoX6y4Lv69ly12UqiRC OmAfOdy9WdYMexZ0hnOwxv8gAJ8HGpP6zPVIIspWBrrGdTOncWGkU8j2ZxWRIiycW0Gz 2SGxLOmNpEY/nyW/USvXoo0RGB2QJiKgHCO6pLwU1gz3aKIYpui5j27eTBb+l73/zyox GEIk2vmrAasNGRbQ9fgSEcXCSr4UdyIDUEnK+k0qUv7+WFdM+TcJDLT1CbP5CEN/Wa99 9+6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QUs6bZlAERttu34ccVgcqABRUHJrBFMHH0LXLYX1oZo=; b=Fo/yAcIuXLRVCDoi139wPFXnFie91B+vKN7eZBu3hd+niosAbrpivS73ANXDibPH9+ KV72FU/J8Ze5xG4ILzXWBEk/dR7vYOduyOmPwh+bkopQxoUx9KnCukdtTj7zCOKXOcpa GKesi7IBVy4Uxw3mCuSAfoF99peFAXlw2ehp4MvWH61tYm5uLetCWyeHEO+rdAM7rtz5 PKMqu9+TKGtJhf/fJkDgHD/d4ayAQjASB4ae77KbXRpND3rl4kpLeYGXUydHxpl60+n3 rUC5WBxZskvXNhQPW33P8Q/Bz6Ms+56udHJJG9gFuYX4rGu5RsUGwWvMR3b+q0Ef1eJc mkRw== X-Gm-Message-State: AOAM53187ICSO7oH8E4fkIFHi8Bv8q3YsoacV5nNuR3fEJGTto6aDoDw 4unszltKMfty2Jxqj4jlfMecyLuhvwrrKVE/ X-Google-Smtp-Source: ABdhPJxOYzP+xsLhi4k1O8wpd7xqKHHOUI64CGAmOuGlx0Vs5rIFgRsbvyHXd3jmBKldDvTxvWapDA== X-Received: by 2002:a37:a9cf:: with SMTP id s198mr7487943qke.143.1615473645062; Thu, 11 Mar 2021 06:40:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 32/57] tcg/tci: Split out tcg_out_op_rrrc Date: Thu, 11 Mar 2021 08:39:33 -0600 Message-Id: <20210311143958.562625-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72e; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 546424c2bd..5848779208 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -341,6 +341,20 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out8(s, c3); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, intptr_t offset) { @@ -454,12 +468,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 CASE_32_64(setcond) - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out8(s, args[3]); /* condition */ - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrrc(s, opc, args[0], args[1], args[2], args[3]); break; =20 #if TCG_TARGET_REG_BITS =3D=3D 32 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474328; cv=none; d=zohomail.com; s=zohoarc; b=BBoyjGE8131ZkmPbGupYyQWXa7oVLzeH9C1hSjrfLc47PznM5We6R8luZgwtFPhRALGPzauVORr28rxnsfmbIpnWm0TtAZHogc8ryO63iQdr6nFVc05MAraSyZz6FkSEVBU0vKuXyMrGJkVtyP98V2WmdvaS13BBMFt6YdzUeV0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474328; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=A8+oxGont/+bDGkQ3AaEp3aS+SzJCnRbYSKjy2ImL7Q=; b=Q75tiG3lDY/AwNM8j/7xLYoE3cG+jtEj2ZuWIC//X6CtfjxB7BudTe5SWWTGRPKgiYSrXMA6fqAs/OLwujwnHPrpOo8Ry7mAWaWdQYZYjQI7L7rfRWrSxgEW+/fJ7e78y9jUyhrB2jXBKhhWvEQ/W248ZmtryObAoY1yvQadkIE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474328522524.5517068900133; Thu, 11 Mar 2021 06:52:08 -0800 (PST) Received: from localhost ([::1]:43870 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMfX-00005J-FN for importer@patchew.org; Thu, 11 Mar 2021 09:52:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40112) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUm-0003oO-7B for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: from mail-qk1-x72a.google.com ([2607:f8b0:4864:20::72a]:33783) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUZ-0006d3-VD for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:40:53 -0500 Received: by mail-qk1-x72a.google.com with SMTP id l4so20794749qkl.0 for ; Thu, 11 Mar 2021 06:40:46 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=A8+oxGont/+bDGkQ3AaEp3aS+SzJCnRbYSKjy2ImL7Q=; b=y/gUPpn4vimjc2E7/K+dN0nE1udC8cRm6EGyfIxzuryRHsda469ir55wkTnnba/oGL gNOoVJMb7I84kWaP0BJUEHkQcT67QT1Ix2UV7ngMx1ZGo4KjB+2EKj9cZnfRX+NA1roq VSMDG5okvcD7mGoLSw5Q+vjoYhzkCuzloBkneSVovu2I0OtYYk6Abekx4fx45B+u2ZzM 4V4oB+Jpd1uVliIP/m4izPFFGVGsIWTvmOVTPAkBqxINGnjXOZEMpd3IfOSlWYnxLzJ+ EZ3DB/G937c5SDNOSZF1QFJTl0AXplJytoeWhoYvxro5vigCpA7a+5VvhQFAXxzMLQC+ hROg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=A8+oxGont/+bDGkQ3AaEp3aS+SzJCnRbYSKjy2ImL7Q=; b=kRAiYMDMatG5LPBr5rFjTTIqATcF3sS2Se1RtDik7jqsBCMP01cTz1ro9h+C5Wd11P ORMo7KmvODoLYMCnOEICMyjoa+dTqg4Zic03dlbSv4J0ObTEXbX7wzLXaB4c7q89o0jE wZ5NMecnBK/UzDgipBqcKlE+McxUM7WBRqWejl1Yc20YjXxkZyJk/FWHD7pBjfgM2Hvo 3p1Ji6qx5KrkT13IaN6TiNu0uoc/sB7A3iVu7jwVEwwblS2KafI4gIGjLXcAxAYJ+sGX LHJN0Zj5PG/KKA7rVu+gki/lKySFK5TNolXgRX5taRyyVuOtDBLGTXC+ePEku2HZd0qE cWIw== X-Gm-Message-State: AOAM533+QL9ffhVLdMp54RTKX62jt9Lki5ZfP8LHS4ALJP48IfSx+mo4 znO5NyaFXaSWTpQMWGjNdSml7/Snkq7vf3la X-Google-Smtp-Source: ABdhPJyAed47mFVT0Ej3XnjA5Eq2Q9kZeXfJz+rSAiUQiekBzmLjJ1O1wW0NVgF1NLmwgCXWlgYVnA== X-Received: by 2002:a37:886:: with SMTP id 128mr8220909qki.430.1615473646231; Thu, 11 Mar 2021 06:40:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 33/57] tcg/tci: Split out tcg_out_op_rrrrrc Date: Thu, 11 Mar 2021 08:39:34 -0600 Message-Id: <20210311143958.562625-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72a; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 5848779208..8eda159dde 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -355,6 +355,25 @@ static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode o= p, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 +static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, + TCGReg r3, TCGReg r4, TCGCond c5) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + tcg_out_r(s, r4); + tcg_out8(s, c5); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} +#endif + static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, intptr_t offset) { @@ -473,15 +492,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, =20 #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: - /* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */ - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out_r(s, args[3]); - tcg_out_r(s, args[4]); - tcg_out8(s, args[5]); /* condition */ - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrrrrc(s, opc, args[0], args[1], args[2], + args[3], args[4], args[5]); break; #endif =20 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475177; cv=none; d=zohomail.com; s=zohoarc; b=aCKslyTphEiVHV4TzuKj70reV6uYU5Plie4DK6f49Y6J+KT/nirF8Tp4cAocmxLyvs7VB3PI2KWXUh0hrwL7pnAo5UQDozXqnAJNg9s0whHstsRHM5+9ZadjOVj0rkfCnO694lTAP7z1gjNOoefOC/E8v6LwV2wKnCT0N38P4d0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475177; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6fN3MzHzuWIrC3R6bdCZxAnV3xyNnPemffGo42IAOp8=; b=gDAD1q8tTavPUNNDJ9wxIPSctuOIrOJBuW5tUvh+jA4hgIpY4BlsWXRuHfZAFUSP4P6smRbbZbv1mSlsW8echTWDi7Pn3MeVg2Cjlius90k9/bGOj2iF5b8ew160JQI20ZodQwegNguPL64WqC6SSjG0Zoz/q84BfipMUh2i68Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475177110665.1554485130671; Thu, 11 Mar 2021 07:06:17 -0800 (PST) Received: from localhost ([::1]:42084 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMtE-0006tU-A7 for importer@patchew.org; Thu, 11 Mar 2021 10:06:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40124) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUn-0003p6-6W for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: from mail-qk1-x734.google.com ([2607:f8b0:4864:20::734]:41582) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUa-0006dA-K3 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:00 -0500 Received: by mail-qk1-x734.google.com with SMTP id x10so20777340qkm.8 for ; Thu, 11 Mar 2021 06:40:48 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6fN3MzHzuWIrC3R6bdCZxAnV3xyNnPemffGo42IAOp8=; b=MTuNQ9gCeohA47mvBzZsQSGXrYhGucs931Q4ICP2ABA9h1qVtFMIeiq3yy8NaR9Pwa 4p1d5UzhgFWaHWHMyU0EwunBaLa7BjwWjcRlTQZtpTYBcIajbwOG02+u1mvgACxs7Of5 LdyFMHIQCtXIaFb4U0jrLmhxlXrQ32fypgF+va+KTwnIv3uWZ8bFquWfqxXEneSALOCD dlBpYR6W4KHmY9o5fDGoVbCBRGv9dUml7kAY69gk1H9J0FGpAPd09zhkwnqL/KUS1Jwu TLtfj5fqOcRWUQcFol3E3wycQ6vh/LPTe2VTZgIqxZlHRIX4CeaAq0uXC76rAM5JCuj4 HtIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6fN3MzHzuWIrC3R6bdCZxAnV3xyNnPemffGo42IAOp8=; b=g0Zf4NJWnJZh4YYuhVECprgq7NMTalYLhJ9z0OpWU4srWptRsctlF2UlbuhiApiGaS qD03cz6mVvTQ7d2OGwnifwRJZcrf+RVq3FwD/0smntBlxji1QSIg+n5s/0+xCoYrD1Xy aUrwrSXtBoTa+5Uq7h/mVTck9faxNlf2OmbQ8adbvXeoi09MeAot37pR2xHGRFiE/L1M KH7dybSF7oCY93pZJ/wreTyA/3q1c9noiYPeIKovXRw2tZYBCnbw3JrkSTqXFv/sNfIw 1IFPZ0Dw1e/BQHC2m2xNca1VfY0OdXXrDQdzB4bh/z/Pvtw8aEE17MLBqps3RM9rsBoy yiKg== X-Gm-Message-State: AOAM530GzVbIkjWNtmVIcg3CEctGiM2wDrTIRNtSZtKSh7+2/Qkq5/+e kVk91TAHKvKW7GvCmaWtQXBUO/zMip3v/iS4 X-Google-Smtp-Source: ABdhPJw63t/lK1J5z99Oaz5zHCN6u3zNDyffo8nJ4xPPZD0CNZ6BfhGFiBPNwFQL5bQhYGh9w+dEvQ== X-Received: by 2002:a05:620a:1593:: with SMTP id d19mr7562971qkk.83.1615473647471; Thu, 11 Mar 2021 06:40:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 34/57] tcg/tci: Split out tcg_out_op_rrrbb Date: Thu, 11 Mar 2021 08:39:35 -0600 Message-Id: <20210311143958.562625-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::734; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x734.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 8eda159dde..6c743a8fbd 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -355,6 +355,21 @@ static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode o= p, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode op, TCGReg r0, + TCGReg r1, TCGReg r2, uint8_t b3, uint8_t b4) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out8(s, b3); + tcg_out8(s, b4); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + #if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, @@ -538,7 +553,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, break; =20 CASE_32_64(deposit) /* Optional (TCG_TARGET_HAS_deposit_*). */ - tcg_out_op_t(s, opc); { TCGArg pos =3D args[3], len =3D args[4]; TCGArg max =3D opc =3D=3D INDEX_op_deposit_i32 ? 32 : 64; @@ -546,13 +560,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, tcg_debug_assert(pos < max); tcg_debug_assert(pos + len <=3D max); =20 - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out8(s, pos); - tcg_out8(s, len); + tcg_out_op_rrrbb(s, opc, args[0], args[1], args[2], pos, len); } - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 CASE_32_64(brcond) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474445; cv=none; d=zohomail.com; s=zohoarc; b=dZMqv5CDuFLkLySmjJVn6sC0RaFmnBAxN1gOx/UToNsJNhQL/UqrKZbQmmKHn/uw1rFwpDz7CuvJB53PNuSeLRHDWsSM/KjIVmNq8ceR3PrTaB3Wae/H2CU1Q+hCK7yjzMetv0ioxX0pl6s5mwn+JP3/pGSUXpsp6HzDX1YqWwU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474445; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=p6E9LDuPBslW5lnZ+lbP25axObg1A1JUNAlm8q5oVbA=; b=iy3nzcBp9p6LXf0Ax5judzmheFrJK5rlB0xURI31Ci0Ce6Vv2GdLiPeJJ8kmmJeL5RAbdEZBK50g9dG8BPZ97B6WHt2GFavMh9CFH6nwGLhURP+oWzD13V4OHzMrVsRCvDU87RJLhg+zg8P9tHKD3dlepqgxEZmpPDzX0uSHhTg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474445247350.44354660624595; Thu, 11 Mar 2021 06:54:05 -0800 (PST) Received: from localhost ([::1]:52604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMhO-0003nS-Hj for importer@patchew.org; Thu, 11 Mar 2021 09:54:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40150) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUo-0003pn-60 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:02 -0500 Received: from mail-qv1-xf35.google.com ([2607:f8b0:4864:20::f35]:38717) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUb-0006eY-Sd for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: by mail-qv1-xf35.google.com with SMTP id t5so2639438qvs.5 for ; Thu, 11 Mar 2021 06:40:49 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=p6E9LDuPBslW5lnZ+lbP25axObg1A1JUNAlm8q5oVbA=; b=ASq7KldhmieksOJm09/u9RCvwCGSmMY+UY1zq5mX9bUQaCfi6F/IQbRN2eoAx1JmD9 LpEEMJETRGZzlp/Bsm80g2yabQ43LyYsZ28b39zjHQdsTgWZxxu8eaCxNLb6rkUdLUDb n4dhAoGJrkwkX/dQCUKR5DTwJ+OTM5UFWm5ANp8InpgrySxJUVW9mWYSsUFgHBveOfHU W6XImoD+TUES34EwBbg3SRmQkKdBvbWDdJT0CWAf/p//03hMM0+VGUs+8AMnD/ccDC4t H/gp8xdhAwF8Z4slEzKF5Zf+BRfCD8JA0DPy+Wf7m6kmA8VchvS0be4otXvu4IZ9Smk1 Mk8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p6E9LDuPBslW5lnZ+lbP25axObg1A1JUNAlm8q5oVbA=; b=jfrPt0irmbe4TCrospIySrxZVsU35YvEA7sCpYWHcwNNhyNWdWCtcJQKB0k3jeydKq 2iXwQE/cllgqy4gSTtm41IgASzkEFuMQaCZy2oRzR2kifGlJsFQIHrl0cAKo8Anr6M5P wFGn1wTr83rmj2B/eByzJ6aoY701vL1YD4x8AZjefl9B6l5X8IynLfGqIgGAqwhtaMG/ zckFGJw3oGtaG+5E/aTFsJcnV68HtclN+GLaMJhh0keklTLOhUAmjmUnyQaA/cnQC35o eSn97WfdpIFJTfQYfoU6qvWg849IzdR+cCPOPy8PzmLFxq00tz+Pt3sKwUK9cIIaGsvm 7Tng== X-Gm-Message-State: AOAM532oqvIJ58LQzD7EjN7sqe6Lp+be8mk6lLfe79DdJel4MYwk2K/m Z1r1ps9H/DGsFyKy1OxA4j7a8SfF7o7VSwHh X-Google-Smtp-Source: ABdhPJxAZARGUeEhiWxZ0E0H7TFhcA96MDRUxl1veMu5en8VtpI8OK1iM6S+o5m68+5F/eEcbkR8QA== X-Received: by 2002:ad4:4991:: with SMTP id t17mr7668608qvx.33.1615473648889; Thu, 11 Mar 2021 06:40:48 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 35/57] tcg/tci: Split out tcg_out_op_rrcl Date: Thu, 11 Mar 2021 08:39:36 -0600 Message-Id: <20210311143958.562625-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f35; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 6c743a8fbd..8cc63124d4 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -341,6 +341,20 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrcl(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGCond c2, TCGLabel *l3) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out8(s, c2); + tci_out_label(s, l3); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3) { @@ -565,12 +579,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 CASE_32_64(brcond) - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out8(s, args[2]); /* condition */ - tci_out_label(s, arg_label(args[3])); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrcl(s, opc, args[0], args[1], args[2], arg_label(args[= 3])); break; =20 CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474560; cv=none; d=zohomail.com; s=zohoarc; b=JFwf5YMWfwZ7OdKFw5XTkdUZk4dY9jB9blPGhYaSvOWJ6/WG7E90XniY5410OACDNlD2DdCxWXYdh2cz7+rd9DRb3AGgt7nqq68lXkeBTivMs8Wn3bhwog6vilA2ILW503fckuQ1H8oc28H6EFi0k/Nm2BWBG0RIOa+uqPh6Xzo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474560; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Muk10JaSTB/BV2ItdFkgjXJDIa6PJidFm2ztv5V4ygc=; b=c4pyNtK5m2DDTUrP75sOvcHwYnbO5x4xPta/FAoA59T/2KLclY+dz0P85NR7jGib1Rz6qwHYps96WXJmOy1YNimRMHOpgxIq1XZrv9q5LGz3bHY94PQjjtQvXGyD1aDahCcjsH9RkZ340Tp5cOq4SiWNPwxZDK+R80clGdBZtOE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474560202107.70395045444184; Thu, 11 Mar 2021 06:56:00 -0800 (PST) Received: from localhost ([::1]:32904 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMjH-0007Oi-3f for importer@patchew.org; Thu, 11 Mar 2021 09:55:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40148) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUo-0003pT-44 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:02 -0500 Received: from mail-qk1-x72b.google.com ([2607:f8b0:4864:20::72b]:35041) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUc-0006ec-W2 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:01 -0500 Received: by mail-qk1-x72b.google.com with SMTP id d20so20806656qkc.2 for ; Thu, 11 Mar 2021 06:40:50 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Muk10JaSTB/BV2ItdFkgjXJDIa6PJidFm2ztv5V4ygc=; b=dHjXLFtsfSVTex5WpfJPI3x5pVOeSGKyKuwnXW/qT5RRTddWfSxZHC/kvJHpViGoSP PpcqQqriAMgk9X2yRki4g5hD7V3yqgzpAHnLfPgvJG0NBP+SM4Qf8rrZF5cYrCKKct2P WqjILZmeaTdrteoysWTN+C1DT8lUo7VSc8J0w9/M/+Dcr1Fel/cxbTmVxsWlS03amMUw bYPLrg3E/UwpdFoDP+dVQ2Bs4OzX2WhCuOWdJrO0ywhPvqttH6GqFFt3iTIXxuflv1lb YMvKw8qDbdmpMrTAJsr/eEkhs+MvDHry2TOhMQkJLTQYbanPXLJ9XXIrcs+f1isv1JE9 AfHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Muk10JaSTB/BV2ItdFkgjXJDIa6PJidFm2ztv5V4ygc=; b=g+qoMdXc1S+J/FCZDkxI8zO1hisxQ9kYyUnHZXAyzBcVVKENAmjUy+VQaLdn+2/05f hnn8UUMs2jFXTcBXKo8iiec+f0L1Z3orfEciaUiupYnIWXeeL/0PMGtnc8CZtdm2dQqn DL5gL35v1c0az+VKuybvRSqt6UDUKdGkAxdsbfi2Mo+53GROdI+DfJCuvyRRIlyK5M6v 2SM9Pi3OWejcNLXWYxFsKdEX0+mWKt54ryKyCELDYBfvVgLomZMY5wLNINSpcgBE25Fu 3XgEXs7ONy2wWPeg3jdMrM7RknBlrpohHKgtosmgs1AGEs/C0T7IB1oCCm9NDEYwAL0b BLwg== X-Gm-Message-State: AOAM533Vwmji8KwNVdx2O40xhNxe6GdOpsf/QQ8m+SPPQLjjfpRaMsnJ DXqPKjLONDVnsbP1FcVKKw9Y8Bs2vm4ePV0N X-Google-Smtp-Source: ABdhPJwqjvjJ3pPPi1KMZLDFfo5kuK1Z+jujRrk2v6zZWZbmbuozNgR89ljIpE/4u+sknRmNQ+Dqbw== X-Received: by 2002:a05:620a:133b:: with SMTP id p27mr8108972qkj.382.1615473650093; Thu, 11 Mar 2021 06:40:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 36/57] tcg/tci: Split out tcg_out_op_rrrrrr Date: Thu, 11 Mar 2021 08:39:37 -0600 Message-Id: <20210311143958.562625-37-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72b; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 8cc63124d4..f7595fbd65 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -401,6 +401,23 @@ static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode= op, =20 old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } + +static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, + TCGReg r3, TCGReg r4, TCGReg r5) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + tcg_out_r(s, r4); + tcg_out_r(s, r5); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} #endif =20 static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, @@ -601,14 +618,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out_r(s, args[3]); - tcg_out_r(s, args[4]); - tcg_out_r(s, args[5]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrrrrr(s, opc, args[0], args[1], args[2], + args[3], args[4], args[5]); break; case INDEX_op_brcond2_i32: tcg_out_op_t(s, opc); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474711; cv=none; d=zohomail.com; s=zohoarc; b=ONHFks8uVF4hyTn8Buee1UsPQ43NTLM277o7vVhHLS6hxtBMs4YNGd0lQ5srAKWAEcq5guGKRu0VfDBviPa4sgoCtLUX+qFiqzXjx14lVvWrMtxmoUJL1d+sFTiEHaQyrgM9Qplrc6ECmBokDwsCGpeOFSR/3lx9QIGhnEDhOYg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474711; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RltB6tJRO1PShAvoUlO75Uo0j450X071u7i11eDg0EU=; b=ZKHkcfAwDQGMkh27tpcx/PXfuqMtrIp4X3BhAgtTYyCNPBGzk4HFEGVnf3RKbgQUMlxYr5AXknESRK6qSFH/jRjSSUiP1P49MGeuqxOyl2F8bTXzYP544Epc6vg/7YOdtrE9L3IGJD4tE6LhQqTnjIpCFRTxZAJo5FTbziGuvss= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615474711189902.3796213383886; Thu, 11 Mar 2021 06:58:31 -0800 (PST) Received: from localhost ([::1]:41786 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMlf-0002q7-Tw for importer@patchew.org; Thu, 11 Mar 2021 09:58:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40192) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUx-0003ti-Qr for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:12 -0500 Received: from mail-qk1-x72c.google.com ([2607:f8b0:4864:20::72c]:35042) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUf-0006ek-De for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:11 -0500 Received: by mail-qk1-x72c.google.com with SMTP id d20so20806716qkc.2 for ; Thu, 11 Mar 2021 06:40:51 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RltB6tJRO1PShAvoUlO75Uo0j450X071u7i11eDg0EU=; b=c85sGVMz3JyN/FaEnc7QIfst3OXfclRQHs9fhY2aL1TX28gRB49bqqhsDWK0sroXA+ 0AMRBHgcPSxA+F3VncuNSutJptkCNR7FKFei5CBLJklH24R0Erj1DrbmFtLBEF1bSXp8 CrMFHltYl1m/8YmyucTJLgWMgzrU1d+SJUxbTA1L6vlvL8Y1xVKrVUCNNJ2CoVGPAEFg B+7K0RWE19j4/tv/kQ3bQZGVU6l54tRezDM1ZslCBwRc1o2e6xUCoG0nAuBOlQKxaGvy GIU7QtaaCVTeKyJmJHL++I6NnkAIjJpfSp1r1h2jBHB2o/MAFHk7abf6MH3PJEoVutmF CzGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RltB6tJRO1PShAvoUlO75Uo0j450X071u7i11eDg0EU=; b=P1oBNncut5Cot6lp5FdeRDJXqVipzVvOyFXyv9MbmGpIYK2le0FyPOkwKyLCbSNXax xxAyy8XL8mQJ6bxZuqDTm0/JHu58UZj4YDsy0MfU17uYZW6LOStfLGtBpdPPgtCG0s0o ph50BHhUmikIHrptoZq/9R5mnfITrcFAFdDbV2aaFytGGrdXf8KUnk3mHA8tpW/JrrrE J/k5rRHQ2JmwxWjFg9jA6JjVD701REpcEusEseWM6A762kXhLCek11iOkshIPzoALd/B qTVlPhtoUZO8UzV9huSQlqNXrnCuio091uAdrLleH65oTXFXHraej5CfbJcccm41XhE3 Y/rA== X-Gm-Message-State: AOAM531Gfhjgx+fkLzF3EVOpjDLYYIi2W8o1RZsNaFmVuMJ9wFyVfXZA biXSgKkFnhLBFXq3TjC4beV4B3qDa3xg1WiM X-Google-Smtp-Source: ABdhPJxgs/Tw/g/GXcsM08R0yOCyL+cD2+LvBSiAy3ITKxW8h4gZNEbbwioq1/TygtJNAFmx2ntVZg== X-Received: by 2002:a37:78b:: with SMTP id 133mr7873790qkh.109.1615473651236; Thu, 11 Mar 2021 06:40:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 37/57] tcg/tci: Split out tcg_out_op_rrrr Date: Thu, 11 Mar 2021 08:39:38 -0600 Message-Id: <20210311143958.562625-38-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72c; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index f7595fbd65..c2bbd85130 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -385,6 +385,20 @@ static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode = op, TCGReg r0, } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 +static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGCond c5) @@ -632,12 +646,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; case INDEX_op_mulu2_i32: - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out_r(s, args[3]); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]); break; #endif =20 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475412; cv=none; d=zohomail.com; s=zohoarc; b=A1uLLLDN2cD8uRjNtUglh1p5OpYtW66kX+MGnH15KXUEaMSoENiF9h4eGDM73bELeQvkU/PLN07k/fdi9OjjGzV9Sx8OqzlLhSvuEQ7lfJyhDnEZbwQHOFzml8M9R/SBfDwIir++RuLbE1Dqs72ViYMeaZ4nlYSxPH3VObGLnLI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475412; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=FuCnYTOQyWEVo9ZyllKi/tHo7oVf70VfVQ0xN8tYC5M=; b=kNXO9hTnPeDdd/1xv7L9k1kNOn/zLN2b9JjUTM5MX/gNOJhv9oo5V98CibZ26JeFRNHDA4N7yziTlDdiB+ac7vwRsUsvNTyJ/tA+NagyQc+DqxophM7mEiaZSyWBTiS+bhP6wP+mxtNbldFHRc4jtTpjcwIX8uzGMmzUthRr1OQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475412095562.4620371478838; Thu, 11 Mar 2021 07:10:12 -0800 (PST) Received: from localhost ([::1]:56884 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMx1-0004ey-5E for importer@patchew.org; Thu, 11 Mar 2021 10:10:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40176) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUu-0003rq-TY for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:09 -0500 Received: from mail-qv1-xf2b.google.com ([2607:f8b0:4864:20::f2b]:35463) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUj-0006ep-Ox for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:08 -0500 Received: by mail-qv1-xf2b.google.com with SMTP id x27so2635973qvd.2 for ; Thu, 11 Mar 2021 06:40:52 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FuCnYTOQyWEVo9ZyllKi/tHo7oVf70VfVQ0xN8tYC5M=; b=Ki83gwgs2XuMZCafFLBrZTs6fENHNCr2pIvzI+x0OzPNmcOEGPdOhNQJ+z/8q8AUMJ Q1RY2U6h2fZZIELA+rINzHogO0aTRCpxNBj0B5kED7ibeDn4trEfTLljcfONWZku9NNN 44CcQ27nIhPeLWOZAzR1Nvi93Vg69se5u5UPgufi6vW8guWs74uSFMXrF1didjB829Zq Lt94l+1mYloeDFRAvX3EkNZ+8eWV1OZ2kzZtfFqjmVKIvayQ2c3usUTQ772tvc8uhp7d Bucm4Za29WtcgjEBixCtq/JKKIaf9NI3Fasa4+YWBwGhnLeSZ/JHQgpS8/ldKEhAPqbg 1+WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FuCnYTOQyWEVo9ZyllKi/tHo7oVf70VfVQ0xN8tYC5M=; b=oS4+zQBX3SxR5jLEB49zHzcueDyCE3RtIT2x/Us/Ew0EX+Sibcv95/fdeWjCFNtee0 YtU7jDu+UEjacGOZR7td+H15aHfsxf59d15TVjcV4fCm5xYPNSAgtpsWu405gVaGM0RU rsQlvrVLVakVHlzsqA7x+aTRjqTZcHFtuC4u/PG9k+AYuwJTEewKI7bOm7eIONGz0X9u Hb1BsqPksK7IqsuLj+tZLWamjs7pROJd0Y0WPr0qA2iKy+uNXwEvZzpyUJZP3Avf5c+k FCx31ImsAQdLpdrHgmWAlgGBIYsInn6Sp6lyhahsRS0ght10qCd4qPoYApMaA1yPj1t0 CYhQ== X-Gm-Message-State: AOAM533LTlhgTJBv+AlurCbJn/EqizP42lE/acVYYGbd40i7jhL+mGzn +6kEbXrsV9wHrNUa7dLxzp2z7GIext/G3o1q X-Google-Smtp-Source: ABdhPJz2KtwfB13hnAeTu1DyxuivR2bqzV75MukWM8Hx8IhipJS79o+fmyCs8IuK4QhUEskjTHZcdA== X-Received: by 2002:a05:6214:1c47:: with SMTP id if7mr7928877qvb.50.1615473652371; Thu, 11 Mar 2021 06:40:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 38/57] tcg/tci: Split out tcg_out_op_rrrrcl Date: Thu, 11 Mar 2021 08:39:39 -0600 Message-Id: <20210311143958.562625-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2b; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index c2bbd85130..fb4aacaca3 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -399,6 +399,23 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode o= p, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrrrcl(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, + TCGCond c4, TCGLabel *l5) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + tcg_out8(s, c4); + tci_out_label(s, l5); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGCond c5) @@ -636,14 +653,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, args[3], args[4], args[5]); break; case INDEX_op_brcond2_i32: - tcg_out_op_t(s, opc); - tcg_out_r(s, args[0]); - tcg_out_r(s, args[1]); - tcg_out_r(s, args[2]); - tcg_out_r(s, args[3]); - tcg_out8(s, args[4]); /* condition */ - tci_out_label(s, arg_label(args[5])); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_rrrrcl(s, opc, args[0], args[1], args[2], + args[3], args[4], arg_label(args[5])); break; case INDEX_op_mulu2_i32: tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615474804; cv=none; d=zohomail.com; s=zohoarc; b=Q8xPjwlbcQkrH1JmVsX5zQBRFWAFhdOdCBCrhub1xff1qWk7qgOaqmELYya3RELYMgQkbJvq0OMOGz/n4VBM3YAjKxbNMOocylfVB8GprxFqkNObmS8nov1yaWSzKBW5LW1T9RwyxA63RxXLQq7t1cyhSHdIu0jmH7O5S8Vx7ns= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615474804; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=UtDE8Pm65Grc/U22TwT0AwuyG4b+N8yR6xVz8cz41eM=; b=g6JcV2fc9uSYM2X606Ps/0zRMhHsGJuBJAlcXUOc9/nzz3qhwQfvNX25OT3ilov44+FMDWefAa4EEw6q+4OpZfyhL7Y4gFEEWSHM2FwuYgTxwyFazFWmNAYa4BpK5CoVhLYTsW6oLZlcx7KtHdZzrm7oRM/miLqgbNvRwHRL7+w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16154748045081013.7623016063455; Thu, 11 Mar 2021 07:00:04 -0800 (PST) Received: from localhost ([::1]:50262 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMnB-0006IX-Sk for importer@patchew.org; Thu, 11 Mar 2021 10:00:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMUx-0003th-Oc for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:12 -0500 Received: from mail-qv1-xf35.google.com ([2607:f8b0:4864:20::f35]:39906) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMUl-0006eu-VI for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:10 -0500 Received: by mail-qv1-xf35.google.com with SMTP id h13so2640324qvu.6 for ; Thu, 11 Mar 2021 06:40:53 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id d84sm2070324qke.53.2021.03.11.06.40.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:40:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UtDE8Pm65Grc/U22TwT0AwuyG4b+N8yR6xVz8cz41eM=; b=ujddlbDp0iDGiwL2KQzyRl+W88O33tLngbGTc6kSb8B9MT/MDnF0kCX+26OocA8mQW 0T2b7FsngafNgdktUqtoSP85/uzNxbA6gtrYe8S7VIWLRMaxHd12lOFvz+nuPAjIkADz np4e3SYGDDsJJcCWRfWm7NVqfsG84/cHeVHBMnAxLow1Isp7l+5/QWBJeBWe89Ar3tiR ScgYRwDjGqHQH5Oi/opkKfjgKuDLWhcjxJi9ZWP57H3TwvhlaajvfHZN0DLebC16zkjH oGkd8vfTgI5FYLtnZvqaXhPCAEeozbOlIY4FWSaB5ZAkopllzf/rrZ+9dMQU2rysOe83 yIvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UtDE8Pm65Grc/U22TwT0AwuyG4b+N8yR6xVz8cz41eM=; b=r0o+wPdN4I0YA89wsCwBIkK4zhQVduvMOGjuNCubdpjT9B3K5v8FKLv6wFEkQ5uuTO /53MQmmuJmVP40HwzyY0+F0sTD/Jak5Gg9+eSbasvJslJwY/yQv7Q+3jPVEfUPTkkQjg 2NcHELi89ZhF5QCAtQ4aBFUEzMGc0hqspeqjz5IbasXYH0HKEO3clrKvjgmcvgqtYQ7j lH9Ev8wvQHHWw7ArZYlEsKsZXNJUl0rRhyx0/34bvb56xj/HrunPCt2MVO3bfdFvRGTA LP4BrAqLSrG6cn8ckq/3aLN8uUiShoZ2iTQc/8t7vo5AkdctysXpC6O5fEgg+BzZGtUR FiWw== X-Gm-Message-State: AOAM531KFvzpw4wQ8OcCXwiagI54vAKDN6UEk+QT73POVCm1cwoWKytM wRI/G8qZ4+K+i6xLxo1uKqbnVqIDI5u/MM5i X-Google-Smtp-Source: ABdhPJxgO3/5dS3AQiPwE1qUEzxJyG+nqRfJ+ZU+B81eo+QOcxGr/O1Ye8gEBcHnw5ojvTIVS0wN4w== X-Received: by 2002:a0c:8304:: with SMTP id j4mr7974202qva.18.1615473653477; Thu, 11 Mar 2021 06:40:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 39/57] tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm} Date: Thu, 11 Mar 2021 08:39:40 -0600 Message-Id: <20210311143958.562625-40-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f35; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 70 ++++++++++++++++++++++++++++++---------- 1 file changed, 53 insertions(+), 17 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index fb4aacaca3..f93772f01f 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -314,6 +314,19 @@ static void tcg_out_op_rr(TCGContext *s, TCGOpcode op,= TCGReg r0, TCGReg r1) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrm(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGArg m2) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out32(s, m2); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2) { @@ -369,6 +382,20 @@ static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode o= p, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrrm(TCGContext *s, TCGOpcode op, + TCGReg r0, TCGReg r1, TCGReg r2, TCGArg m3) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out32(s, m3); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, uint8_t b3, uint8_t b4) { @@ -384,6 +411,21 @@ static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode = op, TCGReg r0, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_rrrrm(TCGContext *s, TCGOpcode op, TCGReg r0, + TCGReg r1, TCGReg r2, TCGReg r3, TCGArg m4) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out_r(s, r1); + tcg_out_r(s, r2); + tcg_out_r(s, r3); + tcg_out32(s, m4); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + #if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3) @@ -663,29 +705,23 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, =20 case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_st_i32: - tcg_out_op_t(s, opc); - tcg_out_r(s, *args++); - tcg_out_r(s, *args++); - if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { - tcg_out_r(s, *args++); + if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tcg_out_op_rrm(s, opc, args[0], args[1], args[2]); + } else { + tcg_out_op_rrrm(s, opc, args[0], args[1], args[2], args[3]); } - tcg_out32(s, *args++); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: - tcg_out_op_t(s, opc); - tcg_out_r(s, *args++); - if (TCG_TARGET_REG_BITS =3D=3D 32) { - tcg_out_r(s, *args++); + if (TCG_TARGET_REG_BITS =3D=3D 64) { + tcg_out_op_rrm(s, opc, args[0], args[1], args[2]); + } else if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { + tcg_out_op_rrrm(s, opc, args[0], args[1], args[2], args[3]); + } else { + tcg_out_op_rrrrm(s, opc, args[0], args[1], + args[2], args[3], args[4]); } - tcg_out_r(s, *args++); - if (TARGET_LONG_BITS > TCG_TARGET_REG_BITS) { - tcg_out_r(s, *args++); - } - tcg_out32(s, *args++); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; break; =20 case INDEX_op_mb: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475312; cv=none; d=zohomail.com; s=zohoarc; b=Z9cvOIRikc1Wv7vBJ9aFobyhzVu9cayV4KFHUDoaZdfG4duy0sQb8/eTPY86ouieaezW+tLnEahUsp65XjP/osNpXUfXoleciEevATpcVbKVzuPy9k/FiNVyKGwkYih5Qa4Wa1xFAoL7TX8pWr7hxXVEiKbOOuW9dH3YyaLuR2c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475312; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Vq4qc1b2g43xbe/29EXgve4/dpXJMnCEHSHrRl9cyeE=; b=EUwp8tm1q8RBilf+QZ9qP2xdLJenOmfPYVHZpZy3XqJSqMZpH7Bnx7Cjkyug2BGUa+l+21Kte7bXbJ5+32Ue/namRtanbrBzqYf2nyJtxbfdzt1JcRDAE6PoKkZ8LytoRijaCqhSzOYe8ES2YLVjT0dJ1N076sjUu1QfMzVj8VE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475312108913.6250739679292; Thu, 11 Mar 2021 07:08:32 -0800 (PST) Received: from localhost ([::1]:50926 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMvP-00025N-9Y for importer@patchew.org; Thu, 11 Mar 2021 10:08:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40328) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-00040x-IB for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:33 -0500 Received: from mail-qk1-x731.google.com ([2607:f8b0:4864:20::731]:34288) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVD-0006r4-3G for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:33 -0500 Received: by mail-qk1-x731.google.com with SMTP id t4so20837627qkp.1 for ; Thu, 11 Mar 2021 06:41:26 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vq4qc1b2g43xbe/29EXgve4/dpXJMnCEHSHrRl9cyeE=; b=tJwvSENXfrQRrZ8UA2FCvtI8YpUn6s52jZ5OjF9+sof/kWpOkTcRkMOvFxljP57S8S SKbfA0Etd38nMvfD4cA8HqhdmsI/HjX1MA95UircdeUBd5ehcq9SYOdAH+NVivjhrgUw BRvsUYPtYcaQaaTiwKbUvQBmiD+xpiSMLSA7ySIfZSgbZjV7ZRvcvHcfk09J7lauLC/h n3R1EGNDvPqWCr1omMZ3dsTBVARVZiDHy1z6JH/mGchOdH17ceb8n+J9E3mAIs4Z5pm7 MYLkPYtH/zRIYSPNzwlxHYP0h23VpMA5ubjPlhoQfPBhtS0bS65jbg9mFG2Mkf7Iy24T ZPdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vq4qc1b2g43xbe/29EXgve4/dpXJMnCEHSHrRl9cyeE=; b=mtJGBs+HD6TIGhnu5OWU5boTSYRMnTIy64yKbIiR7wJ5vkN5JrDozAihZp5TZPNpLN V8Djtn3Irf31+k3er5tSFhO97e39qcayuFGu/01GA6bsX0qwzSG7i7ydK+U6+If/xQeH ehyjxFnhizZd7EDrFZJswCI2BQOUlJHkQd2m25hvHnu7xoilKxG1uycIe5EHcAMYzVyx j/AkO1YOoadnO6snCwnmPOmO81XZqR2KM8vd+1wo9YqUoPVvLKRXF+CxBnrpbmRECTQx FsCpT+QqyJAN+1PYNwM7lKS2gu1+Qb0z4IZStBgoBkzEZRv3oskInpJl0JG4uztBBj+9 ba3w== X-Gm-Message-State: AOAM532yErjwOJVSjmBDAiHD8B5UXoiRsb+NqQK/AIFdkPOQzqgQ9uir I2wcnnQz8Dr+OejareaDtOhe/8tGjATroOyK X-Google-Smtp-Source: ABdhPJx4vFZpFBx8TvhM+9BEcQbsd7CECA4BJjvMVTnAjuswHP0TLetiIMFTRY4cARpEwYY+XelwEQ== X-Received: by 2002:a05:620a:914:: with SMTP id v20mr7976624qkv.140.1615473685676; Thu, 11 Mar 2021 06:41:25 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 40/57] tcg/tci: Split out tcg_out_op_v Date: Thu, 11 Mar 2021 08:39:41 -0600 Message-Id: <20210311143958.562625-41-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::731; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x731.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index f93772f01f..eeafec6d44 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -303,6 +303,15 @@ static void tcg_out_op_p(TCGContext *s, TCGOpcode op, = void *p0) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_v(TCGContext *s, TCGOpcode op) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) { uint8_t *old_code_ptr =3D s->code_ptr; @@ -587,8 +596,6 @@ static void tcg_out_call(TCGContext *s, const tcg_insn_= unit *arg) static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) { - uint8_t *old_code_ptr =3D s->code_ptr; - switch (opc) { case INDEX_op_exit_tb: tcg_out_op_p(s, opc, (void *)args[0]); @@ -725,8 +732,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, break; =20 case INDEX_op_mb: - tcg_out_op_t(s, opc); - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_v(s, opc); break; =20 case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475457; cv=none; d=zohomail.com; s=zohoarc; b=AVYGgSFR1XhiLP4d8wfqAof3cFA6CLjFhJkEqkQ7rjnke1nyFLkc3WF0ukN91f4hBxV2p9c2hGK5zucs5Tcrqn14/F5DGncH4iJlyQFT2V9ABf05SKKFQCp9RcT8yRm4+4IoTzJTqG8mqYDSwyYoaIs7UPPXbj7Xv80nzlI90Rk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475457; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kQwYPaxcLPGVIBaZFpt4Ukjta9EglPQhHZw+11ye7O8=; b=TY9R6/ntPwkitfg0in2RNbslLXs0mTc/IRf2V77Vw/Ul6M1Zm4MiIBdur58xVoftH3ty3C++faHBMVAGdLTMClD6V9aZCoTiR+rW/ZXYQacUqPE013dUaFD6XghPU9VbLdFv45yE/Oha8UICVvWWiQQNZ7u7ukX89RHTjr+1jLM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475457754486.496209871706; Thu, 11 Mar 2021 07:10:57 -0800 (PST) Received: from localhost ([::1]:59602 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMxk-0005lb-Q2 for importer@patchew.org; Thu, 11 Mar 2021 10:10:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40332) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-000416-K8 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:33 -0500 Received: from mail-qv1-xf2f.google.com ([2607:f8b0:4864:20::f2f]:46036) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVD-0006ri-Lj for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:33 -0500 Received: by mail-qv1-xf2f.google.com with SMTP id t16so2632708qvr.12 for ; Thu, 11 Mar 2021 06:41:27 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kQwYPaxcLPGVIBaZFpt4Ukjta9EglPQhHZw+11ye7O8=; b=hM5ir3Pb6N4yNI2AUagTzdwa+SLromBoBNfeCrFrNXoblUKXFY7C5c3eKY6ufNk/0/ mJnx57ZfcWRG1PJFamrtEf+M0qSjDcTl+2IvKMtS+zhB0BKTM/LGtbFZjE9nfLy4cus+ KkH8pDSkM6uUWglhP4HGQvKbt1usQ1yY2yxnGMowU+YGjN7l0iSobuWs5kG6L86ouZ6r 6/Ib7VWBs66QnG8R3Vv8hSE6kId2UF6SpKIhh6oWU1k5uWY493XjAL6ETXDuh53aIni4 8LJAPGQAQ6dg+kySPzZharMMi9VwzgfdH4iyNW4v0FwW5XEptWz52Mqk+BXK8P77B4Ie q1Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kQwYPaxcLPGVIBaZFpt4Ukjta9EglPQhHZw+11ye7O8=; b=r6MgLp/jkBquZZb4mjKf5Trk2zI9eGP3N34FsXf+723+8TSjeggyOEh0MrvTpVPE7Q WarTxKDV+0gmSWOg5KfzXxCdLOzmeKw1Ukatf13PWUjEhVlzDXxgyMa2mlHkty/SYVc3 qX6+yRq/NgPNRorDUETiaFYcfhRNOdvjGxpflU58En2wI+syYLa0DvVCP4Qh+U8xzbX2 kdgsp8NjtkbwD59/6N9w1ffT2ocXkKatWSZa3k521GDYaSHJ066oE9RYhA3sS8oX5fwp 3xhBieq3tkciiBYPHMUPtLNRQJVUpOiG/gxVti9lBzDHRfNqeDcEdEvDu3vQ4cbzySeV 6A1g== X-Gm-Message-State: AOAM532qCIZI69wlxrXvkahNMlKNJ6hZ2V6Ch+IxW7uhNsa0NRXTHUDS j3YeSQ8tRTBMltJy93+c/p1qjrsuuSBZituM X-Google-Smtp-Source: ABdhPJzQdt+FsUJvZUR5VoSV07zdqdecLRWUb1jmOoWOk4g+Tnuw6PMAzNOrnYJRCEhR05+8J9yJdg== X-Received: by 2002:a0c:c1cc:: with SMTP id v12mr7716706qvh.47.1615473686763; Thu, 11 Mar 2021 06:41:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 41/57] tcg/tci: Split out tcg_out_op_np Date: Thu, 11 Mar 2021 08:39:42 -0600 Message-Id: <20210311143958.562625-42-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2f; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index eeafec6d44..e4a5872b2a 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -312,6 +312,18 @@ static void tcg_out_op_v(TCGContext *s, TCGOpcode op) old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_np(TCGContext *s, TCGOpcode op, + uint8_t n0, const void *p1) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out8(s, n0); + tcg_out_i(s, (uintptr_t)p1); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) { uint8_t *old_code_ptr =3D s->code_ptr; @@ -561,7 +573,6 @@ static void tcg_out_movi(TCGContext *s, TCGType type, =20 static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) { - uint8_t *old_code_ptr =3D s->code_ptr; const TCGHelperInfo *info; uint8_t which; =20 @@ -574,11 +585,8 @@ static void tcg_out_call(TCGContext *s, const tcg_insn= _unit *arg) tcg_debug_assert(info->cif->rtype->size =3D=3D 8); which =3D 2; } - tcg_out_op_t(s, INDEX_op_call); - tcg_out8(s, which); - tcg_out_i(s, (uintptr_t)info); =20 - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_op_np(s, INDEX_op_call, which, info); } =20 #if TCG_TARGET_REG_BITS =3D=3D 64 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475312; cv=none; d=zohomail.com; s=zohoarc; b=eDosbISSkNPhCOAhDlzoPIqBl9pvX3kDzTPBgGMaxHCIWAC0MIOciK4CQOnDYSKxQEZnr+y8sK/hhc/7leuZpO6T49eZAIVXaWRYQHqa04Le+kWXSxqeVHbva3m8xinkzz54w9hslTDrX2WWYsn6RnR2w9Jcr0J4vfiC0twt9Sw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475312; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=nbzdCRnUzVvHAlHdm0W/U/kL5Ps02KKsV67u0VtR3Rc=; b=QNMHCQGmRhKBaDswwfPmUODlgXvur+AYykec5xafPSkA1+RCeTcdC5sYfgjlO3RfZpcHIXKWC7elwyQkcWQo5RqpdDJpl0rJnIOsVpz/RuDdTbl3Zf+8x1ofAzgkqYIlwsZothBEVZAdArYKlCmyUhP0uLYsNCMU6o8cDCpcguU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16154753120951018.327612052564; Thu, 11 Mar 2021 07:08:32 -0800 (PST) Received: from localhost ([::1]:50872 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMvO-000243-MA for importer@patchew.org; Thu, 11 Mar 2021 10:08:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40452) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVQ-0004Al-R0 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:40 -0500 Received: from mail-qv1-xf32.google.com ([2607:f8b0:4864:20::f32]:43738) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-0006t6-69 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:40 -0500 Received: by mail-qv1-xf32.google.com with SMTP id cx5so2635934qvb.10 for ; Thu, 11 Mar 2021 06:41:28 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nbzdCRnUzVvHAlHdm0W/U/kL5Ps02KKsV67u0VtR3Rc=; b=MbDoHyKywnkrny7gIeizhJcUFLPTU7M+NjrizR8mmwdnzPiQ9Qqe0Occr9uvtTfzX1 fE3OTHsfPWJNf/aurk1EGF1sJzj105EOZr0RGXamU/tLJNOh9blRGpX86YpIHT6HNuk/ EKi9ALDWIRBfidekbNV5V/SyVb8Qzv7qhYTgym7wM20mZqdxqxBXVxMljpC3b/gk/hso J4pjhLEApD9Ng96CW7KIfs9iM/ZAH5A6dnQMjpFooLrkt3kUSRXgSInUzoP+B6W3KGni ThUe0MLChLzPe6VWv6WYlkSUpt4oeMXt2E0MXkf4sO78qr4FK5uOobne0mxbhszYkBhj kMwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nbzdCRnUzVvHAlHdm0W/U/kL5Ps02KKsV67u0VtR3Rc=; b=X8QrpUSO8/lYFfcDNVet+fU56VRsskN5GDE/caTchWB3w4G7ckmTAzdX64Lm/dijk1 h+nB4doifJQxWrROwhKDEykDFUN7w8YaHtMSVKdCs4tfzLFiJ6DQyOw7lLN+PEPr864+ eLi9diHH+PJFaSBzLK5u7IAIgWtx1yryBlaaPxO4JlchwGerpy0HRKd72azDMaZMsRtm 4DZAvAwPank8tzpxUnqXIl/oGyuGL37hkX3gnq9rcytPvkvWV7IhCpgnVOUdHc3T7/36 Kosd+efDuDM56TVJzRfZW8qhKkK+6agAMdXpy1LTEHPI7u2oZnYsvjPPPULLt/E++PPY WNKA== X-Gm-Message-State: AOAM530HjU5lQ2CiUO6EJspkOGzBGRFMLkYDivmd9YAtAOtw4YlwxjZF 1ggvdRDJsnBW+RHXdFdktRwNd1fa/rc4S6Dv X-Google-Smtp-Source: ABdhPJzXlhxozbZhniYQY1yS5dMbN1tzqb/y61RmYAVFdEUye3yypWDJ8vCKU73kSRVXcrdRcRF9HQ== X-Received: by 2002:a0c:a954:: with SMTP id z20mr7764107qva.29.1615473687796; Thu, 11 Mar 2021 06:41:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 42/57] tcg/tci: Split out tcg_out_op_r[iI] Date: Thu, 11 Mar 2021 08:39:43 -0600 Message-Id: <20210311143958.562625-43-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f32; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf32.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.c.inc | 50 ++++++++++++++++++++++++++++------------ 1 file changed, 35 insertions(+), 15 deletions(-) diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index e4a5872b2a..c2d2bd24d7 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -324,6 +324,31 @@ static void tcg_out_op_np(TCGContext *s, TCGOpcode op, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 +static void tcg_out_op_ri(TCGContext *s, TCGOpcode op, TCGReg r0, int32_t = i1) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out32(s, i1); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + +#if TCG_TARGET_REG_BITS =3D=3D 64 +static void tcg_out_op_rI(TCGContext *s, TCGOpcode op, + TCGReg r0, uint64_t i1) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tcg_out64(s, i1); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} +#endif + static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) { uint8_t *old_code_ptr =3D s->code_ptr; @@ -550,25 +575,20 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, = TCGReg ret, TCGReg arg) } =20 static void tcg_out_movi(TCGContext *s, TCGType type, - TCGReg t0, tcg_target_long arg) + TCGReg ret, tcg_target_long arg) { - uint8_t *old_code_ptr =3D s->code_ptr; - uint32_t arg32 =3D arg; - if (type =3D=3D TCG_TYPE_I32 || arg =3D=3D arg32) { - tcg_out_op_t(s, INDEX_op_tci_movi_i32); - tcg_out_r(s, t0); - tcg_out32(s, arg32); - } else { - tcg_debug_assert(type =3D=3D TCG_TYPE_I64); + switch (type) { + case TCG_TYPE_I32: + tcg_out_op_ri(s, INDEX_op_tci_movi_i32, ret, arg); + break; #if TCG_TARGET_REG_BITS =3D=3D 64 - tcg_out_op_t(s, INDEX_op_tci_movi_i64); - tcg_out_r(s, t0); - tcg_out64(s, arg); -#else - TODO(); + case TCG_TYPE_I64: + tcg_out_op_rI(s, INDEX_op_tci_movi_i64, ret, arg); + break; #endif + default: + g_assert_not_reached(); } - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475573; cv=none; d=zohomail.com; s=zohoarc; b=ArLoR7xq0rgzsuHkq9HJ0qOdYduhL7YCrCIN+EwfdmOZ8Ts4qr7H2hJ/fj515Hy/eaKrRtCXHTdDXOJhSgHes4tPnUeIf9Dt7MduNTZLp4wN59+8JfccEEs0CNx36gPpg4kgyCEQQof7wSJGHVu2TCInj4BUTRUnwgzTizuhmgs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475573; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=j84CVB2/9NSVvHC05jyj/ExvjNOevKnlsYLw94URCgw=; b=EiAj20xNx53qV2+xqyCKnj/1SxCl8IioxfrG/aWW/fAbmPg466UQ4h0KJ22OeMSBvA7UQ3IbyyrcsoOV1vVFY2VfBxUKBAvZRwXtphJfNYLfyCgdX+eALgGQkXvKKa/Cnom9QltyaUc0X4pLhREWh+espQ9eMuvzcsA46mJ1buo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475573302108.57020757623968; Thu, 11 Mar 2021 07:12:53 -0800 (PST) Received: from localhost ([::1]:37014 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMzc-0008J9-E1 for importer@patchew.org; Thu, 11 Mar 2021 10:12:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40406) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVP-00044f-3D for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:39 -0500 Received: from mail-qk1-x72b.google.com ([2607:f8b0:4864:20::72b]:45032) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-0006tK-7e for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:35 -0500 Received: by mail-qk1-x72b.google.com with SMTP id 130so20753422qkh.11 for ; Thu, 11 Mar 2021 06:41:29 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=j84CVB2/9NSVvHC05jyj/ExvjNOevKnlsYLw94URCgw=; b=NpABv+msWtvS9KebLlL+UDW9UET5LmpbFSuVcFhq2nutEHH8H1ELE4khxNjC57WPhA 3ZlCXq1x5DPG9X662XjjuhirxQxB7BIzngaCpznnK3o0n2uQeZPepL/CrIYP4lmuUrGk qBNrEUG+7R9QexsN1v/r8T7SzIiIKDEAOUIiW1/Y58Un2nTGVxN8YslD+B5dsTntVbHf 4E1RehyvPHEIo9re+w0II3rdF7nVMdkYpqgpG2qdfS49UCyfc1wNa4hp1qXMtsI0X28z BIKKMcRHf9lomLsqmCHyVHPYJbFpL57b2AxOWH75oS8bhWctHAgouZ8bbPNE9sJKmB0v 2Bfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=j84CVB2/9NSVvHC05jyj/ExvjNOevKnlsYLw94URCgw=; b=HRiNqnyEsQG+xQVMX1biy1LM6ZoZp5DOu5geS+K+JRMf0vWc545WG5XjcKBjv0a4ce /Gzadz+XDlmdb25R/bvo/Rtf0XOaTEqpVOdrm0vdyGGV6brkcWXP2S/UD8K84cUqozeq ZIiBhaHOnJGE+j8EUMwpssxJlrLLVPnXZ5t0uW/5FHCsxWGogUsw84fo+GT480BF3UE+ Dz9WRfJyEkQznVO1cYQRWOWDHASBH461uuYJGowIevJra5quaftvDb0kAabLdKEv4JlS Iu640hAh3/chsx31asAzahUNDAlFIwAM5Lve2JbFD1zVybfwiR+3xQy+ebgUPl9oDufR lQ3g== X-Gm-Message-State: AOAM531rCX6wlUHy7TqK50YS620rj5jJpEGJvWgkGo2Lx01LbJvXZiqy 2o2FRQ7KsFMTdbq14GwrPjloTXiVKgwYCaYT X-Google-Smtp-Source: ABdhPJwlnWgH15qkcNGJdrrvSSNbnpSdq5alLzdCp4fVFdPJ4D4Z6YNVKTHg3L7zDmiT77vAQXJpqg== X-Received: by 2002:a37:8743:: with SMTP id j64mr7430183qkd.299.1615473688911; Thu, 11 Mar 2021 06:41:28 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 43/57] tcg/tci: Reserve r13 for a temporary Date: Thu, 11 Mar 2021 08:39:44 -0600 Message-Id: <20210311143958.562625-44-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72b; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We're about to adjust the offset range on host memory ops, and the format of branches. Both will require a temporary. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 1 + tcg/tci/tcg-target.c.inc | 1 + 2 files changed, 2 insertions(+) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 4df10e2e83..1558a6e44e 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -155,6 +155,7 @@ typedef enum { TCG_REG_R14, TCG_REG_R15, =20 + TCG_REG_TMP =3D TCG_REG_R13, TCG_AREG0 =3D TCG_REG_R14, TCG_REG_CALL_STACK =3D TCG_REG_R15, } TCGReg; diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index c2d2bd24d7..b29e75425d 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -829,6 +829,7 @@ static void tcg_target_init(TCGContext *s) MAKE_64BIT_MASK(TCG_REG_R0, 64 / TCG_TARGET_REG_BITS); =20 s->reserved_regs =3D 0; + tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP); tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); =20 /* The call arguments come first, followed by the temp storage. */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475781; cv=none; d=zohomail.com; s=zohoarc; b=Q1DfNwWVslFbdLiSBAZQausf03eB2qhDGBdSqM4PeCiXgCcLCMrjttlm3NBy+iNLku+Lc/lD03eCCOfMHWIHk95f2GEuRt+mzFWc+1hPXKS65AWBqwUpupwxe4IwbjKUIcOPY7IqAfXccCjyfNWce1g9wkvcmeA2nEP4rvdjyrA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475781; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=xVPJpsDWn13Ikd2YVdvJyZUJO3co9ndv44w3DFxxxYY=; b=X90Ht65z6YMNYkW/BlSSVeam2IN3CjiUcHVDo7MBIKgOykb/uGivmZpmk+87XkXZ0INPytofKvQa6+j+pnjdBVb0JnCAaEGkXFChflab7eKRCvr396E8N4HUbLAoGyFGna+7P+MfBhOfK4jXFG+mIARXHqqeKRZ+kXaoFvc1CUw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475781000294.1974738564253; Thu, 11 Mar 2021 07:16:21 -0800 (PST) Received: from localhost ([::1]:45542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN2x-0003bB-Ro for importer@patchew.org; Thu, 11 Mar 2021 10:16:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVP-000454-6T for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:39 -0500 Received: from mail-qk1-x72b.google.com ([2607:f8b0:4864:20::72b]:37093) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-0006tQ-7G for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:38 -0500 Received: by mail-qk1-x72b.google.com with SMTP id s7so20784960qkg.4 for ; Thu, 11 Mar 2021 06:41:30 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xVPJpsDWn13Ikd2YVdvJyZUJO3co9ndv44w3DFxxxYY=; b=FhCyctvTDJN9H7jO8Z8JPiWM3Gu97+wL5hAzFsdKNFTrHo7/cJIVZeoWoeKJ4cegRa dVSKPZ/GPu5Pbp9agtaDQTfs4vWiexyC3g4UXUqdOPWMvaSK7NDosMIsLVvRI8Dy3wQu BRIlMguH8Sj8r7301vNEHPIWU2QJ0eJJdwV9hIIc2ZlfvSDxtQtts8cf5zG/tsKlKvub 0Z/zr6u88hoHdnxyiP3E5tmoqBvb89OJmNO3xd9RL9YvZVC3WEwZj76zBAc5U+Cr0Oj3 tBXgu4SXyZYTTB9/xcY0Ow9tEoeQkj35q4bxjiPnuETI/oZGZ2Mxj8oUx9qsvlONEFrs aicQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xVPJpsDWn13Ikd2YVdvJyZUJO3co9ndv44w3DFxxxYY=; b=N5tA3qNc0aIRDZi+lxpT/tjLj0YyVZygU2R80VTlkRbK5+WMoOGrLKH7EzwX4PriJ1 QKJ2RyjdtX6+HJxDXRVWkr768BCk5FS9LZBxaKrSJriRIcBVqfwaMAxitzmNuRzFbzZ0 VzjjBMbrFN6lVzqt3hEydvvyTkRRxtaywoaeu8jw1wZzEmFnb7mm/ndUX5tzFjHRdZi7 1reWIEF9oJKCV9bT/XlOfFl01u+qzZfw8F61fl3WBj4QX4CcivSS+oK8R63aaKbDbanG Nn9Jtqm5C0Ii0BqlyQdMPhL+uEQFTIHbkjHTMpPLaKum3UXuxMRfyPp0tD0TlyE7Nibc ioOw== X-Gm-Message-State: AOAM531ZRE4QKdGAJQ3P6mMTdFGo6EWX9aNKC8Pu1H6Q3+61N0P+xZEF ugkPzpt6/FVcuehDphigWtyhmq04JC+UlQH7 X-Google-Smtp-Source: ABdhPJxLlcymkORszwKF5SEuwTOmaAnZjKEIhEHlUQmGSt/bNiaWJGVcQaTt8SC/tIBgSEw6wiwcBQ== X-Received: by 2002:a37:5007:: with SMTP id e7mr7910806qkb.184.1615473690003; Thu, 11 Mar 2021 06:41:30 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 44/57] tcg/tci: Emit setcond before brcond Date: Thu, 11 Mar 2021 08:39:45 -0600 Message-Id: <20210311143958.562625-45-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::72b; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The encoding planned for tci does not have enough room for brcond2, with 4 registers and a condition as input as well as the label. Resolve the condition into TCG_REG_TMP, and relax brcond to one register plus a label, considering the condition to always be reg !=3D 0. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 68 ++++++++++------------------------------ tcg/tci/tcg-target.c.inc | 52 +++++++++++------------------- 2 files changed, 35 insertions(+), 85 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 5718fc42a6..3f8c6a0291 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -141,6 +141,16 @@ static void tci_args_nl(const uint8_t **tb_ptr, uint8_= t *n0, void **l1) check_size(start, tb_ptr); } =20 +static void tci_args_rl(const uint8_t **tb_ptr, TCGReg *r0, void **l1) +{ + const uint8_t *start =3D *tb_ptr; + + *r0 =3D tci_read_r(tb_ptr); + *l1 =3D (void *)tci_read_label(tb_ptr); + + check_size(start, tb_ptr); +} + static void tci_args_rr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1) { @@ -212,19 +222,6 @@ static void tci_args_rrs(const uint8_t **tb_ptr, check_size(start, tb_ptr); } =20 -static void tci_args_rrcl(const uint8_t **tb_ptr, - TCGReg *r0, TCGReg *r1, TCGCond *c2, void **l3) -{ - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *c2 =3D tci_read_b(tb_ptr); - *l3 =3D (void *)tci_read_label(tb_ptr); - - check_size(start, tb_ptr); -} - static void tci_args_rrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) { @@ -293,21 +290,6 @@ static void tci_args_rrrr(const uint8_t **tb_ptr, check_size(start, tb_ptr); } =20 -static void tci_args_rrrrcl(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, - TCGReg *r2, TCGReg *r3, TCGCond *c4, void **l5) -{ - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *r3 =3D tci_read_r(tb_ptr); - *c4 =3D tci_read_b(tb_ptr); - *l5 =3D (void *)tci_read_label(tb_ptr); - - check_size(start, tb_ptr); -} - static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) { @@ -713,8 +695,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i32: - tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); - if (tci_compare32(regs[r0], regs[r1], condition)) { + tci_args_rl(&tb_ptr, &r0, &ptr); + if ((uint32_t)regs[r0]) { tb_ptr =3D ptr; } break; @@ -731,15 +713,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 - T2); break; - case INDEX_op_brcond2_i32: - tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &condition, &ptr); - T1 =3D tci_uint64(regs[r1], regs[r0]); - T2 =3D tci_uint64(regs[r3], regs[r2]); - if (tci_compare64(T1, T2, condition)) { - tb_ptr =3D ptr; - continue; - } - break; case INDEX_op_mulu2_i32: tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]); @@ -867,8 +840,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, break; #endif case INDEX_op_brcond_i64: - tci_args_rrcl(&tb_ptr, &r0, &r1, &condition, &ptr); - if (tci_compare64(regs[r0], regs[r1], condition)) { + tci_args_rl(&tb_ptr, &r0, &ptr); + if (regs[r0]) { tb_ptr =3D ptr; } break; @@ -1178,9 +1151,9 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) =20 case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: - tci_args_rrcl(&tb_ptr, &r0, &r1, &c, &ptr); - info->fprintf_func(info->stream, "%-12s %s,%s,%s,%p", - op_name, str_r(r0), str_r(r1), str_c(c), ptr); + tci_args_rl(&tb_ptr, &r0, &ptr); + info->fprintf_func(info->stream, "%-12s %s,0,ne,%p", + op_name, str_r(r0), ptr); break; =20 case INDEX_op_setcond_i32: @@ -1305,13 +1278,6 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) str_r(r3), str_r(r4), str_c(c)); break; =20 - case INDEX_op_brcond2_i32: - tci_args_rrrrcl(&tb_ptr, &r0, &r1, &r2, &r3, &c, &ptr); - info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%p", - op_name, str_r(r0), str_r(r1), - str_r(r2), str_r(r3), str_c(c), ptr); - break; - case INDEX_op_mulu2_i32: tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index b29e75425d..e06d4e9380 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -349,6 +349,17 @@ static void tcg_out_op_rI(TCGContext *s, TCGOpcode op, } #endif =20 +static void tcg_out_op_rl(TCGContext *s, TCGOpcode op, TCGReg r0, TCGLabel= *l1) +{ + uint8_t *old_code_ptr =3D s->code_ptr; + + tcg_out_op_t(s, op); + tcg_out_r(s, r0); + tci_out_label(s, l1); + + old_code_ptr[1] =3D s->code_ptr - old_code_ptr; +} + static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) { uint8_t *old_code_ptr =3D s->code_ptr; @@ -400,20 +411,6 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 -static void tcg_out_op_rrcl(TCGContext *s, TCGOpcode op, - TCGReg r0, TCGReg r1, TCGCond c2, TCGLabel *l3) -{ - uint8_t *old_code_ptr =3D s->code_ptr; - - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out8(s, c2); - tci_out_label(s, l3); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; -} - static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3) { @@ -487,23 +484,6 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode o= p, old_code_ptr[1] =3D s->code_ptr - old_code_ptr; } =20 -static void tcg_out_op_rrrrcl(TCGContext *s, TCGOpcode op, - TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, - TCGCond c4, TCGLabel *l5) -{ - uint8_t *old_code_ptr =3D s->code_ptr; - - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out_r(s, r3); - tcg_out8(s, c4); - tci_out_label(s, l5); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; -} - static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGCond c5) @@ -704,7 +684,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, break; =20 CASE_32_64(brcond) - tcg_out_op_rrcl(s, opc, args[0], args[1], args[2], arg_label(args[= 3])); + tcg_out_op_rrrc(s, (opc =3D=3D INDEX_op_brcond_i32 + ? INDEX_op_setcond_i32 : INDEX_op_setcond_i64), + TCG_REG_TMP, args[0], args[1], args[2]); + tcg_out_op_rl(s, opc, TCG_REG_TMP, arg_label(args[3])); break; =20 CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ @@ -730,8 +713,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, args[3], args[4], args[5]); break; case INDEX_op_brcond2_i32: - tcg_out_op_rrrrcl(s, opc, args[0], args[1], args[2], - args[3], args[4], arg_label(args[5])); + tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP, + args[0], args[1], args[2], args[3], args[4]); + tcg_out_op_rl(s, INDEX_op_brcond_i32, TCG_REG_TMP, arg_label(args[= 5])); break; case INDEX_op_mulu2_i32: tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475664; cv=none; d=zohomail.com; s=zohoarc; b=ETkoDqSwizJhQweD4d2KfjWJ1vqgBMciuAvg4ChSMU3F8XZPgIQnTRWyYKzwxcjAKKh19hgXIzjFYdbSPZoEeLwsG7dz9eHB4O1YB/sMMzRUgU/NYlbY3JzLdOYc56B2+H1NGIcksICcHUMFH2mq+F9B2d0Tcaisz6H4p49clKE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475664; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Oqjirx8sUQyYnS7vrLSDlLS9gocI/IN6++5opPveqXM=; b=hG7XZHC1qqeYGeaVWvNKokIRYUKtbLSaFE66PuPcW//3ug3ECiDEISHz0hUb8yAo1MEyPzcLBO3TezvO2CpYerIu9r0drZE/c+TKVDKrubYv4oVkm0hzgEEusJxazaNvd2ta6l47LNhe1KUzNKJqR9tAJIpNLk+8bFALeQdelYg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 16154756649554.9515689689657165; Thu, 11 Mar 2021 07:14:24 -0800 (PST) Received: from localhost ([::1]:39712 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN15-00013d-If for importer@patchew.org; Thu, 11 Mar 2021 10:14:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40410) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVP-00045L-9u for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:39 -0500 Received: from mail-qt1-x82c.google.com ([2607:f8b0:4864:20::82c]:39443) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVJ-0006tY-9Z for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:38 -0500 Received: by mail-qt1-x82c.google.com with SMTP id g24so1271463qts.6 for ; Thu, 11 Mar 2021 06:41:31 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Oqjirx8sUQyYnS7vrLSDlLS9gocI/IN6++5opPveqXM=; b=qWU7qEy+AXz3uN+JdV8iSEeyyQ+9oncOT+OyNCDV+YS80L+nl4HP86CwJ2IZLE0wLb YQ1np2bdOT3oSg67hllLRD//FRPCGRar7y6lxtsmJsZloUyF7m/hzfMwRMA4om11964h tohKLKCC5fRe1hMcPb1NqPlOYQk1D7rJGrjI4Ohm2qEb1F73odyxYPptdYwdB4hs8K7f 1eoFDnnEisRwYwrRcy4r/Xl0hsSppY/Q4Bj0bBlkIu4u1bPBFIxjOdQCCXXRy8BWLPRy coOLMUvYBPJJyGf96zHBSo3N05knz/Ppxz1GFeRekE8JSoROQTN8ZSsbUAlNr2w8ROZK QyIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Oqjirx8sUQyYnS7vrLSDlLS9gocI/IN6++5opPveqXM=; b=NR4YFx0FDJQ3fNjgqQTOArah2tVgBC1dsMBfQ+2ebP/BkkCYHF7u8TaEDSNxQetwtS JBFp97aHXmZaYNOqQ9QGipa4h1b1Kxa1G+uMua5PxZZTaPhHmsE3QdbqNP8O96OJGhW6 bXhtto48ov9e/Gh2GUI+qNSIS8tcqQbxzTtAyNUIUj32rVosaO2oy8IjSlSG8yhr01Uk BdFx8bh0sqpQpLaDDJGU/FKS8nep4ZNipcNV/x3V+SRxXGeeOtJqqaLYksJ8047X6R7S dhukN8d8LihhO72pPGZl4uiZ0F/k2D3VfVzLSSC0Kk77m21lB5zhU0mJM2HgtFQvbkIL 5u3g== X-Gm-Message-State: AOAM5339ga6Fb6Ut+OgiwuBSasvoHiOto/2bZ+Hy3UDgWIhjU0UBSwRQ 5dfo0YiLaxM2ib1fiOiK0EfS+ZBwKyvS+BdE X-Google-Smtp-Source: ABdhPJwMnsqFC7Ryjnqt4hEMZZ99e+Qg1ft+wFBaRmep8p/4URRSWFuiTdBpy2ZhJG9H9rCApWJ+VA== X-Received: by 2002:ac8:5c12:: with SMTP id i18mr7525275qti.320.1615473691093; Thu, 11 Mar 2021 06:41:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 45/57] tcg/tci: Remove tci_write_reg Date: Thu, 11 Mar 2021 08:39:46 -0600 Message-Id: <20210311143958.562625-46-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82c; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Inline it into its one caller, tci_write_reg64. Drop the asserts that are redundant with tcg_read_r. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 3f8c6a0291..0b2bc905ea 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -36,20 +36,11 @@ =20 __thread uintptr_t tci_tb_ptr; =20 -static void -tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) -{ - tci_assert(index < TCG_TARGET_NB_REGS); - tci_assert(index !=3D TCG_AREG0); - tci_assert(index !=3D TCG_REG_CALL_STACK); - regs[index] =3D value; -} - static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, uint32_t low_index, uint64_t value) { - tci_write_reg(regs, low_index, value); - tci_write_reg(regs, high_index, value >> 32); + regs[low_index] =3D value; + regs[high_index] =3D value >> 32; } =20 /* Create a 64 bit value from two 32 bit values. */ --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475685; cv=none; d=zohomail.com; s=zohoarc; b=BiaazQH7jXkcr55/JnvuktyCcX2vfOY3kiO4dWaSnXzIxZ+/5iYSep1MyrVVrSRG51/ajRPOi5LPu5zDXJYUHteFvAUvKCtvuO9Gok0Z/V4Pxy2du1G2hZ/7o8p8Z2OoYg4wHawYTv56eKQYb4xX2ZHvlQCmAeB2fB2u/i+BXGU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475685; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=AVuOZddbattcoPTiU8kVVR2IlSzEN7KnRCfoZW6Xl64=; b=FGUMWDoyjjClTTz6NmyCF/RASe+FTw0nbGhxwBETVE20ZnywqDJ78WKmiG5r6sqY8fW3O23UUTP1+uxghkG2A96IoAIEjhhQtQceQRAXzLR1mljUM46aOTLsGWqr1J9t6ZAxe+ybswkMQqo7gM/v5hqyt1Q2lxjO0HXE5d18vSA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475685209129.49884458086353; Thu, 11 Mar 2021 07:14:45 -0800 (PST) Received: from localhost ([::1]:40156 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN1Q-0001FG-EN for importer@patchew.org; Thu, 11 Mar 2021 10:14:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40534) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVU-0004KZ-BE for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:44 -0500 Received: from mail-qv1-xf2d.google.com ([2607:f8b0:4864:20::f2d]:33405) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVK-0006tn-6J for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:43 -0500 Received: by mail-qv1-xf2d.google.com with SMTP id i15so2638324qvr.0 for ; Thu, 11 Mar 2021 06:41:33 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AVuOZddbattcoPTiU8kVVR2IlSzEN7KnRCfoZW6Xl64=; b=kR9vNbf54BZ9VWTShyudoUWYG6e53YO8Vu1hxbD6coyj4YCWwPEGKOiJNue5Y+acru dLwzGDc1/FKU0UWwjFWPm7ZVMef2DZYd2VYiGAZhRbLP2ZzrGnAMIWQ8qXKDjLH0k2ZX pQ9bVlcPO3sG2Yuz2v/WTfHd6uv7CaCvdRIZXQKFIyN2hRS0pEszBBVfO9NujHUm1IRJ 94IuVTPrFmjyR4gn0ItiZEgafUu2p7uIbTiBCeEy9Q2JHw02zAqjPDb4tB1GnfPyYzYQ F+JV1xthhGmxtCrcNdxhutW63LX6T1TpE3Khg3jr1ukZg5lVc1QYXdB8LBTRWH1Q5dSL Pg1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AVuOZddbattcoPTiU8kVVR2IlSzEN7KnRCfoZW6Xl64=; b=L95P9zrYk6SFKrQiSVNqknBMwcGSdday07qqQSv3B3dlzb4GNU2fJevszJ6urZ8Oai efAFBIkjGWbSJdu5PeJtc9XmLVO8yXF+hHXhpin9z3q1OKXDYveENGGIhYR/6xoGHjgW vAa+sa+OBsjYg6nc4JkWY8Iz1Y13gzJDffPwDry07rwZvXeMsJFsxDTr3Q3P+e2093CM 6fjgRYpc64sUYntcRRR+Mq1vhsasg5Zuls3DqET/tmeCoKXlYifS1yhcX74PPFRMF+KZ VmQFeVFbqUoMsrs6u6rGookSjRIfrFWFhPZdu9YqK0L77EFS6M4j1E3FmmJKTRi72SsR oP9Q== X-Gm-Message-State: AOAM531l+hWeQN17et0kL06aaz+lJfIjuwDwX2ld76yzWQFJkgJaVjV7 k8zITmu4eJIPFrP/UQfofmdGM+ARQGYtkq08 X-Google-Smtp-Source: ABdhPJz5h8R1zwqv0E7N5EpsH26vFnYoTRurDhbJ17r51L1YNqkqBzerErbSy8I0wkLkLWFpk1MjKQ== X-Received: by 2002:ad4:410d:: with SMTP id i13mr7643668qvp.44.1615473692559; Thu, 11 Mar 2021 06:41:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 46/57] tcg/tci: Change encoding to uint32_t units Date: Thu, 11 Mar 2021 08:39:47 -0600 Message-Id: <20210311143958.562625-47-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2d; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This removes all of the problems with unaligned accesses to the bytecode stream. With an 8-bit opcode at the bottom, we have 24 bits remaining, which are generally split into 6 4-bit slots. This fits well with the maximum length opcodes, e.g. INDEX_op_add2_i386, which have 6 register operands. We have, in previous patches, rearranged things such that there are no operations with a label, which have more than one other operand. Which leaves us with a 20-bit field in which to encode a label, giving us a maximum TB size of 512k -- easily large. Change the INDEX_op_tci_movi_{i32,i64} opcodes to tci_mov[il]. The former puts the immediate in the upper 20 bits of the insn, like we do for the label displacement. The later uses a label to reference an entry in the constant pool. Thus, in the worst case we still have a single memory reference for any constant, but now the constants are out-of-line of the bytecode and can be shared between different moves saving space. Change INDEX_op_call to use a label to reference a pair of pointers in the constant pool. This removes the only slightly dodgy link with the layout of struct TCGHelperInfo. The re-encode cannot be done in pieces. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/tcg/tcg-opc.h | 4 +- tcg/tci/tcg-target.h | 3 +- tcg/tci.c | 534 +++++++++++++++------------------------ tcg/tci/tcg-target.c.inc | 386 +++++++++++++--------------- tcg/tci/README | 20 +- 5 files changed, 380 insertions(+), 567 deletions(-) diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index bbb0884af8..5bbec858aa 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -277,8 +277,8 @@ DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT) =20 #ifdef TCG_TARGET_INTERPRETER /* These opcodes are only for use between the tci generator and interprete= r. */ -DEF(tci_movi_i32, 1, 0, 1, TCG_OPF_NOT_PRESENT) -DEF(tci_movi_i64, 1, 0, 1, TCG_OPF_64BIT | TCG_OPF_NOT_PRESENT) +DEF(tci_movi, 1, 0, 1, TCG_OPF_NOT_PRESENT) +DEF(tci_movl, 1, 0, 1, TCG_OPF_NOT_PRESENT) #endif =20 #undef TLADDR_ARGS diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 1558a6e44e..d953f2ead3 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -41,7 +41,7 @@ #define TCG_TARGET_H =20 #define TCG_TARGET_INTERPRETER 1 -#define TCG_TARGET_INSN_UNIT_SIZE 1 +#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 =20 #if UINTPTR_MAX =3D=3D UINT32_MAX @@ -165,6 +165,7 @@ typedef enum { #define TCG_TARGET_STACK_ALIGN 8 =20 #define HAVE_TCG_QEMU_TB_EXEC +#define TCG_TARGET_NEED_POOL_LABELS =20 /* We could notice __i386__ or __s390x__ and reduce the barriers depending on the host. But if you want performance, you use the normal backend. diff --git a/tcg/tci.c b/tcg/tci.c index 0b2bc905ea..76bbf440a8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -49,49 +49,6 @@ static uint64_t tci_uint64(uint32_t high, uint32_t low) return ((uint64_t)high << 32) + low; } =20 -/* Read constant byte from bytecode. */ -static uint8_t tci_read_b(const uint8_t **tb_ptr) -{ - return *(tb_ptr[0]++); -} - -/* Read register number from bytecode. */ -static TCGReg tci_read_r(const uint8_t **tb_ptr) -{ - uint8_t regno =3D tci_read_b(tb_ptr); - tci_assert(regno < TCG_TARGET_NB_REGS); - return regno; -} - -/* Read constant (native size) from bytecode. */ -static tcg_target_ulong tci_read_i(const uint8_t **tb_ptr) -{ - tcg_target_ulong value =3D *(const tcg_target_ulong *)(*tb_ptr); - *tb_ptr +=3D sizeof(value); - return value; -} - -/* Read unsigned constant (32 bit) from bytecode. */ -static uint32_t tci_read_i32(const uint8_t **tb_ptr) -{ - uint32_t value =3D *(const uint32_t *)(*tb_ptr); - *tb_ptr +=3D sizeof(value); - return value; -} - -/* Read signed constant (32 bit) from bytecode. */ -static int32_t tci_read_s32(const uint8_t **tb_ptr) -{ - int32_t value =3D *(const int32_t *)(*tb_ptr); - *tb_ptr +=3D sizeof(value); - return value; -} - -static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr) -{ - return tci_read_i(tb_ptr); -} - /* * Load sets of arguments all at once. The naming convention is: * tci_args_ @@ -106,209 +63,128 @@ static tcg_target_ulong tci_read_label(const uint8_t= **tb_ptr) * s =3D signed ldst offset */ =20 -static void check_size(const uint8_t *start, const uint8_t **tb_ptr) +static void tci_args_l(uint32_t insn, const void *tb_ptr, void **l0) { - const uint8_t *old_code_ptr =3D start - 2; - uint8_t op_size =3D old_code_ptr[1]; - tci_assert(*tb_ptr =3D=3D old_code_ptr + op_size); + int diff =3D sextract32(insn, 12, 20); + *l0 =3D diff ? (void *)tb_ptr + diff : NULL; } =20 -static void tci_args_l(const uint8_t **tb_ptr, void **l0) +static void tci_args_nl(uint32_t insn, const void *tb_ptr, + uint8_t *n0, void **l1) { - const uint8_t *start =3D *tb_ptr; - - *l0 =3D (void *)tci_read_label(tb_ptr); - - check_size(start, tb_ptr); + *n0 =3D extract32(insn, 8, 4); + *l1 =3D sextract32(insn, 12, 20) + (void *)tb_ptr; } =20 -static void tci_args_nl(const uint8_t **tb_ptr, uint8_t *n0, void **l1) +static void tci_args_rl(uint32_t insn, const void *tb_ptr, + TCGReg *r0, void **l1) { - const uint8_t *start =3D *tb_ptr; - - *n0 =3D tci_read_b(tb_ptr); - *l1 =3D (void *)tci_read_label(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *l1 =3D sextract32(insn, 12, 20) + (void *)tb_ptr; } =20 -static void tci_args_rl(const uint8_t **tb_ptr, TCGReg *r0, void **l1) +static void tci_args_rr(uint32_t insn, TCGReg *r0, TCGReg *r1) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *l1 =3D (void *)tci_read_label(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); } =20 -static void tci_args_rr(const uint8_t **tb_ptr, - TCGReg *r0, TCGReg *r1) +static void tci_args_ri(uint32_t insn, TCGReg *r0, tcg_target_ulong *i1) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *i1 =3D sextract32(insn, 12, 20); } =20 -static void tci_args_ri(const uint8_t **tb_ptr, - TCGReg *r0, tcg_target_ulong *i1) +static void tci_args_rrm(uint32_t insn, TCGReg *r0, + TCGReg *r1, TCGMemOpIdx *m2) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *i1 =3D tci_read_i32(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *m2 =3D extract32(insn, 20, 12); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 -static void tci_args_rI(const uint8_t **tb_ptr, - TCGReg *r0, tcg_target_ulong *i1) +static void tci_args_rrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *i1 =3D tci_read_i(tb_ptr); - - check_size(start, tb_ptr); -} -#endif - -static void tci_args_rrm(const uint8_t **tb_ptr, - TCGReg *r0, TCGReg *r1, TCGMemOpIdx *m2) -{ - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *m2 =3D tci_read_i32(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); } =20 -static void tci_args_rrr(const uint8_t **tb_ptr, - TCGReg *r0, TCGReg *r1, TCGReg *r2) +static void tci_args_rrs(uint32_t insn, TCGReg *r0, TCGReg *r1, int32_t *i= 2) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *i2 =3D sextract32(insn, 16, 16); } =20 -static void tci_args_rrs(const uint8_t **tb_ptr, - TCGReg *r0, TCGReg *r1, int32_t *i2) -{ - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *i2 =3D tci_read_s32(tb_ptr); - - check_size(start, tb_ptr); -} - -static void tci_args_rrrc(const uint8_t **tb_ptr, +static void tci_args_rrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *c3 =3D tci_read_b(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *c3 =3D extract32(insn, 20, 4); } =20 -static void tci_args_rrrm(const uint8_t **tb_ptr, +static void tci_args_rrrm(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGMemOpIdx = *m3) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *m3 =3D tci_read_i32(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *m3 =3D extract32(insn, 20, 12); } =20 -static void tci_args_rrrbb(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, +static void tci_args_rrrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, uint8_t *i3, uint8_t *i4) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *i3 =3D tci_read_b(tb_ptr); - *i4 =3D tci_read_b(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *i3 =3D extract32(insn, 20, 6); + *i4 =3D extract32(insn, 26, 6); } =20 -static void tci_args_rrrrm(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, - TCGReg *r2, TCGReg *r3, TCGMemOpIdx *m4) +static void tci_args_rrrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, + TCGReg *r2, TCGReg *r3, TCGReg *r4) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *r3 =3D tci_read_r(tb_ptr); - *m4 =3D tci_read_i32(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *r3 =3D extract32(insn, 20, 4); + *r4 =3D extract32(insn, 24, 4); } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 -static void tci_args_rrrr(const uint8_t **tb_ptr, +static void tci_args_rrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *r3 =3D tci_read_r(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *r3 =3D extract32(insn, 20, 4); } =20 -static void tci_args_rrrrrc(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, +static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *r3 =3D tci_read_r(tb_ptr); - *r4 =3D tci_read_r(tb_ptr); - *c5 =3D tci_read_b(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *r3 =3D extract32(insn, 20, 4); + *r4 =3D extract32(insn, 24, 4); + *c5 =3D extract32(insn, 28, 4); } =20 -static void tci_args_rrrrrr(const uint8_t **tb_ptr, TCGReg *r0, TCGReg *r1, +static void tci_args_rrrrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5) { - const uint8_t *start =3D *tb_ptr; - - *r0 =3D tci_read_r(tb_ptr); - *r1 =3D tci_read_r(tb_ptr); - *r2 =3D tci_read_r(tb_ptr); - *r3 =3D tci_read_r(tb_ptr); - *r4 =3D tci_read_r(tb_ptr); - *r5 =3D tci_read_r(tb_ptr); - - check_size(start, tb_ptr); + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *r2 =3D extract32(insn, 16, 4); + *r3 =3D extract32(insn, 20, 4); + *r4 =3D extract32(insn, 24, 4); + *r5 =3D extract32(insn, 28, 4); } #endif =20 @@ -447,7 +323,7 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCG= Cond condition) uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, const void *v_tb_ptr) { - const uint8_t *tb_ptr =3D v_tb_ptr; + const uint32_t *tb_ptr =3D v_tb_ptr; tcg_target_ulong regs[TCG_TARGET_NB_REGS]; uint64_t stack[(TCG_STATIC_CALL_ARGS_SIZE + TCG_STATIC_FRAME_SIZE) / sizeof(uint64_t)]; @@ -459,8 +335,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, tci_assert(tb_ptr); =20 for (;;) { - TCGOpcode opc =3D tb_ptr[0]; - TCGReg r0, r1, r2, r3; + uint32_t insn; + TCGOpcode opc; + TCGReg r0, r1, r2, r3, r4; tcg_target_ulong t1; TCGCond condition; target_ulong taddr; @@ -468,23 +345,19 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, uint32_t tmp32; uint64_t tmp64; #if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r4, r5; + TCGReg r5; uint64_t T1, T2; #endif TCGMemOpIdx oi; int32_t ofs; void *ptr; =20 - /* Skip opcode and size entry. */ - tb_ptr +=3D 2; + insn =3D *tb_ptr++; + opc =3D extract32(insn, 0, 8); =20 switch (opc) { case INDEX_op_call: - /* - * We are passed a pointer to the TCGHelperInfo, which contains - * the function pointer followed by the ffi_cif pointer. - */ - tci_args_nl(&tb_ptr, &len, &ptr); + tci_args_nl(insn, tb_ptr, &len, &ptr); =20 /* Helper functions may need to access the "return address" */ tci_tb_ptr =3D (uintptr_t)tb_ptr; @@ -502,8 +375,9 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchStat= e *env, } =20 /* - * Call the helper function. Any result winds up - * "left-aligned" in the stack[0] slot. + * We are passed a pointer into the constant pool, which + * contains a pair of the function pointer and the cif pointer. + * Any result winds up "left-aligned" in the stack[0] slot. */ { void **pptr =3D ptr; @@ -535,76 +409,80 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, break; =20 case INDEX_op_br: - tci_args_l(&tb_ptr, &ptr); + tci_args_l(insn, tb_ptr, &ptr); tb_ptr =3D ptr; continue; case INDEX_op_setcond_i32: - tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition); + tci_args_rrrc(insn, &r0, &r1, &r2, &condition); regs[r0] =3D tci_compare32(regs[r1], regs[r2], condition); break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: - tci_args_rrrrrc(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &condition); + tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); T1 =3D tci_uint64(regs[r2], regs[r1]); T2 =3D tci_uint64(regs[r4], regs[r3]); regs[r0] =3D tci_compare64(T1, T2, condition); break; #elif TCG_TARGET_REG_BITS =3D=3D 64 case INDEX_op_setcond_i64: - tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition); + tci_args_rrrc(insn, &r0, &r1, &r2, &condition); regs[r0] =3D tci_compare64(regs[r1], regs[r2], condition); break; #endif CASE_32_64(mov) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D regs[r1]; break; - case INDEX_op_tci_movi_i32: - tci_args_ri(&tb_ptr, &r0, &t1); + case INDEX_op_tci_movi: + tci_args_ri(insn, &r0, &t1); regs[r0] =3D t1; break; + case INDEX_op_tci_movl: + tci_args_rl(insn, tb_ptr, &r0, &ptr); + regs[r0] =3D *(tcg_target_ulong *)ptr; + break; =20 /* Load/store operations (32 bit). */ =20 CASE_32_64(ld8u) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(uint8_t *)ptr; break; CASE_32_64(ld8s) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(int8_t *)ptr; break; CASE_32_64(ld16u) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(uint16_t *)ptr; break; CASE_32_64(ld16s) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(int16_t *)ptr; break; case INDEX_op_ld_i32: CASE_64(ld32u) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(uint32_t *)ptr; break; CASE_32_64(st8) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); *(uint8_t *)ptr =3D regs[r0]; break; CASE_32_64(st16) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); *(uint16_t *)ptr =3D regs[r0]; break; case INDEX_op_st_i32: CASE_64(st32) - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); *(uint32_t *)ptr =3D regs[r0]; break; @@ -612,171 +490,166 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArch= State *env, /* Arithmetic operations (mixed 32/64 bit). */ =20 CASE_32_64(add) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] + regs[r2]; break; CASE_32_64(sub) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] - regs[r2]; break; CASE_32_64(mul) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] * regs[r2]; break; CASE_32_64(and) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] & regs[r2]; break; CASE_32_64(or) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] | regs[r2]; break; CASE_32_64(xor) - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] ^ regs[r2]; break; =20 /* Arithmetic operations (32 bit). */ =20 case INDEX_op_div_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int32_t)regs[r1] / (int32_t)regs[r2]; break; case INDEX_op_divu_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint32_t)regs[r1] / (uint32_t)regs[r2]; break; case INDEX_op_rem_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int32_t)regs[r1] % (int32_t)regs[r2]; break; case INDEX_op_remu_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint32_t)regs[r1] % (uint32_t)regs[r2]; break; =20 /* Shift/rotate operations (32 bit). */ =20 case INDEX_op_shl_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint32_t)regs[r1] << (regs[r2] & 31); break; case INDEX_op_shr_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint32_t)regs[r1] >> (regs[r2] & 31); break; case INDEX_op_sar_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int32_t)regs[r1] >> (regs[r2] & 31); break; #if TCG_TARGET_HAS_rot_i32 case INDEX_op_rotl_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D rol32(regs[r1], regs[r2] & 31); break; case INDEX_op_rotr_i32: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D ror32(regs[r1], regs[r2] & 31); break; #endif #if TCG_TARGET_HAS_deposit_i32 case INDEX_op_deposit_i32: - tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); regs[r0] =3D deposit32(regs[r1], pos, len, regs[r2]); break; #endif case INDEX_op_brcond_i32: - tci_args_rl(&tb_ptr, &r0, &ptr); + tci_args_rl(insn, tb_ptr, &r0, &ptr); if ((uint32_t)regs[r0]) { tb_ptr =3D ptr; } break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: - tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); T1 =3D tci_uint64(regs[r3], regs[r2]); T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 + T2); break; case INDEX_op_sub2_i32: - tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); T1 =3D tci_uint64(regs[r3], regs[r2]); T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 - T2); break; case INDEX_op_mulu2_i32: - tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]); break; #endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 CASE_32_64(ext8s) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (int8_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 CASE_32_64(ext16s) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (int16_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64 CASE_32_64(ext8u) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (uint8_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_ext16u_i32 || TCG_TARGET_HAS_ext16u_i64 CASE_32_64(ext16u) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (uint16_t)regs[r1]; break; #endif #if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 CASE_32_64(bswap16) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D bswap16(regs[r1]); break; #endif #if TCG_TARGET_HAS_bswap32_i32 || TCG_TARGET_HAS_bswap32_i64 CASE_32_64(bswap32) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D bswap32(regs[r1]); break; #endif #if TCG_TARGET_HAS_not_i32 || TCG_TARGET_HAS_not_i64 CASE_32_64(not) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D ~regs[r1]; break; #endif #if TCG_TARGET_HAS_neg_i32 || TCG_TARGET_HAS_neg_i64 CASE_32_64(neg) - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D -regs[r1]; break; #endif #if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_tci_movi_i64: - tci_args_rI(&tb_ptr, &r0, &t1); - regs[r0] =3D t1; - break; - /* Load/store operations (64 bit). */ =20 case INDEX_op_ld32s_i64: - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(int32_t *)ptr; break; case INDEX_op_ld_i64: - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); regs[r0] =3D *(uint64_t *)ptr; break; case INDEX_op_st_i64: - tci_args_rrs(&tb_ptr, &r0, &r1, &ofs); + tci_args_rrs(insn, &r0, &r1, &ofs); ptr =3D (void *)(regs[r1] + ofs); *(uint64_t *)ptr =3D regs[r0]; break; @@ -784,71 +657,71 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, /* Arithmetic operations (64 bit). */ =20 case INDEX_op_div_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int64_t)regs[r1] / (int64_t)regs[r2]; break; case INDEX_op_divu_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint64_t)regs[r1] / (uint64_t)regs[r2]; break; case INDEX_op_rem_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int64_t)regs[r1] % (int64_t)regs[r2]; break; case INDEX_op_remu_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint64_t)regs[r1] % (uint64_t)regs[r2]; break; =20 /* Shift/rotate operations (64 bit). */ =20 case INDEX_op_shl_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] << (regs[r2] & 63); break; case INDEX_op_shr_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] >> (regs[r2] & 63); break; case INDEX_op_sar_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (int64_t)regs[r1] >> (regs[r2] & 63); break; #if TCG_TARGET_HAS_rot_i64 case INDEX_op_rotl_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D rol64(regs[r1], regs[r2] & 63); break; case INDEX_op_rotr_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D ror64(regs[r1], regs[r2] & 63); break; #endif #if TCG_TARGET_HAS_deposit_i64 case INDEX_op_deposit_i64: - tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); regs[r0] =3D deposit64(regs[r1], pos, len, regs[r2]); break; #endif case INDEX_op_brcond_i64: - tci_args_rl(&tb_ptr, &r0, &ptr); + tci_args_rl(insn, tb_ptr, &r0, &ptr); if (regs[r0]) { tb_ptr =3D ptr; } break; case INDEX_op_ext32s_i64: case INDEX_op_ext_i32_i64: - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (int32_t)regs[r1]; break; case INDEX_op_ext32u_i64: case INDEX_op_extu_i32_i64: - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D (uint32_t)regs[r1]; break; #if TCG_TARGET_HAS_bswap64_i64 case INDEX_op_bswap64_i64: - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); regs[r0] =3D bswap64(regs[r1]); break; #endif @@ -857,20 +730,20 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, /* QEMU specific operations. */ =20 case INDEX_op_exit_tb: - tci_args_l(&tb_ptr, &ptr); + tci_args_l(insn, tb_ptr, &ptr); return (uintptr_t)ptr; =20 case INDEX_op_goto_tb: - tci_args_l(&tb_ptr, &ptr); + tci_args_l(insn, tb_ptr, &ptr); tb_ptr =3D *(void **)ptr; break; =20 case INDEX_op_qemu_ld_i32: if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { - tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; } else { - tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + tci_args_rrrm(insn, &r0, &r1, &r2, &oi); taddr =3D tci_uint64(regs[r2], regs[r1]); } switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { @@ -906,14 +779,15 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_qemu_ld_i64: if (TCG_TARGET_REG_BITS =3D=3D 64) { - tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; } else if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { - tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + tci_args_rrrm(insn, &r0, &r1, &r2, &oi); taddr =3D regs[r2]; } else { - tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); + tci_args_rrrrr(insn, &r0, &r1, &r2, &r3, &r4); taddr =3D tci_uint64(regs[r3], regs[r2]); + oi =3D regs[r4]; } switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { case MO_UB: @@ -964,10 +838,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_qemu_st_i32: if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { - tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; } else { - tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + tci_args_rrrm(insn, &r0, &r1, &r2, &oi); taddr =3D tci_uint64(regs[r2], regs[r1]); } tmp32 =3D regs[r0]; @@ -994,16 +868,17 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, =20 case INDEX_op_qemu_st_i64: if (TCG_TARGET_REG_BITS =3D=3D 64) { - tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + tci_args_rrm(insn, &r0, &r1, &oi); taddr =3D regs[r1]; tmp64 =3D regs[r0]; } else { if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { - tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + tci_args_rrrm(insn, &r0, &r1, &r2, &oi); taddr =3D regs[r2]; } else { - tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); + tci_args_rrrrr(insn, &r0, &r1, &r2, &r3, &r4); taddr =3D tci_uint64(regs[r3], regs[r2]); + oi =3D regs[r4]; } tmp64 =3D tci_uint64(regs[r1], regs[r0]); } @@ -1087,14 +962,14 @@ static const char *str_c(TCGCond c) /* Disassemble TCI bytecode. */ int print_insn_tci(bfd_vma addr, disassemble_info *info) { - uint8_t buf[256]; - int length, status; + const uint32_t *tb_ptr =3D (const void *)(uintptr_t)addr; const TCGOpDef *def; const char *op_name; + uint32_t insn; TCGOpcode op; - TCGReg r0, r1, r2, r3; + TCGReg r0, r1, r2, r3, r4; #if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r4, r5; + TCGReg r5; #endif tcg_target_ulong i1; int32_t s2; @@ -1102,71 +977,54 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) TCGMemOpIdx oi; uint8_t pos, len; void *ptr; - const uint8_t *tb_ptr; =20 - status =3D info->read_memory_func(addr, buf, 2, info); - if (status !=3D 0) { - info->memory_error_func(status, addr, info); - return -1; - } - op =3D buf[0]; - length =3D buf[1]; + /* TCI is always the host, so we don't need to load indirect. */ + insn =3D *tb_ptr++; =20 - if (length < 2) { - info->fprintf_func(info->stream, "invalid length %d", length); - return 1; - } - - status =3D info->read_memory_func(addr + 2, buf + 2, length - 2, info); - if (status !=3D 0) { - info->memory_error_func(status, addr + 2, info); - return -1; - } + info->fprintf_func(info->stream, "%08x ", insn); =20 + op =3D extract32(insn, 0, 8); def =3D &tcg_op_defs[op]; op_name =3D def->name; - tb_ptr =3D buf + 2; =20 switch (op) { case INDEX_op_br: case INDEX_op_exit_tb: case INDEX_op_goto_tb: - tci_args_l(&tb_ptr, &ptr); + tci_args_l(insn, tb_ptr, &ptr); info->fprintf_func(info->stream, "%-12s %p", op_name, ptr); break; =20 case INDEX_op_call: - tci_args_nl(&tb_ptr, &len, &ptr); + tci_args_nl(insn, tb_ptr, &len, &ptr); info->fprintf_func(info->stream, "%-12s %d,%p", op_name, len, ptr= ); break; =20 case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: - tci_args_rl(&tb_ptr, &r0, &ptr); + tci_args_rl(insn, tb_ptr, &r0, &ptr); info->fprintf_func(info->stream, "%-12s %s,0,ne,%p", op_name, str_r(r0), ptr); break; =20 case INDEX_op_setcond_i32: case INDEX_op_setcond_i64: - tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &c); + tci_args_rrrc(insn, &r0, &r1, &r2, &c); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_c= (c)); break; =20 - case INDEX_op_tci_movi_i32: - tci_args_ri(&tb_ptr, &r0, &i1); + case INDEX_op_tci_movi: + tci_args_ri(insn, &r0, &i1); info->fprintf_func(info->stream, "%-12s %s,0x%" TCG_PRIlx "", op_name, str_r(r0), i1); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 - case INDEX_op_tci_movi_i64: - tci_args_rI(&tb_ptr, &r0, &i1); - info->fprintf_func(info->stream, "%-12s %s,0x%" TCG_PRIlx "", - op_name, str_r(r0), i1); + case INDEX_op_tci_movl: + tci_args_rl(insn, tb_ptr, &r0, &ptr); + info->fprintf_func(info->stream, "%-12s %s,%p", + op_name, str_r(r0), ptr); break; -#endif =20 case INDEX_op_ld8u_i32: case INDEX_op_ld8u_i64: @@ -1187,7 +1045,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) case INDEX_op_st32_i64: case INDEX_op_st_i32: case INDEX_op_st_i64: - tci_args_rrs(&tb_ptr, &r0, &r1, &s2); + tci_args_rrs(insn, &r0, &r1, &s2); info->fprintf_func(info->stream, "%-12s %s,%s,%d", op_name, str_r(r0), str_r(r1), s2); break; @@ -1214,7 +1072,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) case INDEX_op_not_i64: case INDEX_op_neg_i32: case INDEX_op_neg_i64: - tci_args_rr(&tb_ptr, &r0, &r1); + tci_args_rr(insn, &r0, &r1); info->fprintf_func(info->stream, "%-12s %s,%s", op_name, str_r(r0), str_r(r1)); break; @@ -1249,28 +1107,28 @@ int print_insn_tci(bfd_vma addr, disassemble_info *= info) case INDEX_op_rotl_i64: case INDEX_op_rotr_i32: case INDEX_op_rotr_i64: - tci_args_rrr(&tb_ptr, &r0, &r1, &r2); + tci_args_rrr(insn, &r0, &r1, &r2); info->fprintf_func(info->stream, "%-12s %s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2)); break; =20 case INDEX_op_deposit_i32: case INDEX_op_deposit_i64: - tci_args_rrrbb(&tb_ptr, &r0, &r1, &r2, &pos, &len); + tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%d,%d", op_name, str_r(r0), str_r(r1), str_r(r2), pos, = len); break; =20 #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: - tci_args_rrrrrc(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &c); + tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &c); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_r(r3), str_r(r4), str_c(c)); break; =20 case INDEX_op_mulu2_i32: - tci_args_rrrr(&tb_ptr, &r0, &r1, &r2, &r3); + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_r(r3)); @@ -1278,7 +1136,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: - tci_args_rrrrrr(&tb_ptr, &r0, &r1, &r2, &r3, &r4, &r5); + tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_r(r3), str_r(r4), str_r(r5)); @@ -1296,30 +1154,38 @@ int print_insn_tci(bfd_vma addr, disassemble_info *= info) len +=3D DIV_ROUND_UP(TARGET_LONG_BITS, TCG_TARGET_REG_BITS); switch (len) { case 2: - tci_args_rrm(&tb_ptr, &r0, &r1, &oi); + tci_args_rrm(insn, &r0, &r1, &oi); info->fprintf_func(info->stream, "%-12s %s,%s,%x", op_name, str_r(r0), str_r(r1), oi); break; case 3: - tci_args_rrrm(&tb_ptr, &r0, &r1, &r2, &oi); + tci_args_rrrm(insn, &r0, &r1, &r2, &oi); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%x", op_name, str_r(r0), str_r(r1), str_r(r2), o= i); break; case 4: - tci_args_rrrrm(&tb_ptr, &r0, &r1, &r2, &r3, &oi); - info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%x", + tci_args_rrrrr(insn, &r0, &r1, &r2, &r3, &r4); + info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s", op_name, str_r(r0), str_r(r1), - str_r(r2), str_r(r3), oi); + str_r(r2), str_r(r3), str_r(r4)); break; default: g_assert_not_reached(); } break; =20 + case 0: + /* tcg_out_nop_fill uses zeros */ + if (insn =3D=3D 0) { + info->fprintf_func(info->stream, "align"); + break; + } + /* fall through */ + default: info->fprintf_func(info->stream, "illegal opcode %d", op); break; } =20 - return length; + return sizeof(insn); } diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index e06d4e9380..0df8384be7 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -22,20 +22,7 @@ * THE SOFTWARE. */ =20 -/* TODO list: - * - See TODO comments in code. - */ - -/* Marker for missing code. */ -#define TODO() \ - do { \ - fprintf(stderr, "TODO %s:%u: %s()\n", \ - __FILE__, __LINE__, __func__); \ - tcg_abort(); \ - } while (0) - -/* Bitfield n...m (in 32 bit value). */ -#define BITS(n, m) (((0xffffffffU << (31 - n)) >> (31 - n + m)) << m) +#include "../tcg-pool.c.inc" =20 static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) { @@ -226,52 +213,16 @@ static const char *const tcg_target_reg_names[TCG_TAR= GET_NB_REGS] =3D { static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - /* tcg_out_reloc always uses the same type, addend. */ - tcg_debug_assert(type =3D=3D sizeof(tcg_target_long)); + intptr_t diff =3D value - (intptr_t)(code_ptr + 1); + tcg_debug_assert(addend =3D=3D 0); - tcg_debug_assert(value !=3D 0); - if (TCG_TARGET_REG_BITS =3D=3D 32) { - tcg_patch32(code_ptr, value); - } else { - tcg_patch64(code_ptr, value); - } - return true; -} - -/* Write value (native size). */ -static void tcg_out_i(TCGContext *s, tcg_target_ulong v) -{ - if (TCG_TARGET_REG_BITS =3D=3D 32) { - tcg_out32(s, v); - } else { - tcg_out64(s, v); - } -} - -/* Write opcode. */ -static void tcg_out_op_t(TCGContext *s, TCGOpcode op) -{ - tcg_out8(s, op); - tcg_out8(s, 0); -} - -/* Write register. */ -static void tcg_out_r(TCGContext *s, TCGArg t0) -{ - tcg_debug_assert(t0 < TCG_TARGET_NB_REGS); - tcg_out8(s, t0); -} - -/* Write label. */ -static void tci_out_label(TCGContext *s, TCGLabel *label) -{ - if (label->has_value) { - tcg_out_i(s, label->u.value); - tcg_debug_assert(label->u.value); - } else { - tcg_out_reloc(s, s->code_ptr, sizeof(tcg_target_ulong), label, 0); - s->code_ptr +=3D sizeof(tcg_target_ulong); + tcg_debug_assert(type =3D=3D 20); + + if (diff =3D=3D sextract32(diff, 0, type)) { + tcg_patch32(code_ptr, deposit32(*code_ptr, 32 - type, type, diff)); + return true; } + return false; } =20 static void stack_bounds_check(TCGReg base, target_long offset) @@ -285,251 +236,236 @@ static void stack_bounds_check(TCGReg base, target_= long offset) =20 static void tcg_out_op_l(TCGContext *s, TCGOpcode op, TCGLabel *l0) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tci_out_label(s, l0); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_reloc(s, s->code_ptr, 20, l0, 0); + insn =3D deposit32(insn, 0, 8, op); + tcg_out32(s, insn); } =20 static void tcg_out_op_p(TCGContext *s, TCGOpcode op, void *p0) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; + intptr_t diff; =20 - tcg_out_op_t(s, op); - tcg_out_i(s, (uintptr_t)p0); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + /* Special case for exit_tb: map null -> 0. */ + if (p0 =3D=3D NULL) { + diff =3D 0; + } else { + diff =3D p0 - (void *)(s->code_ptr + 1); + tcg_debug_assert(diff !=3D 0); + if (diff !=3D sextract32(diff, 0, 20)) { + tcg_raise_tb_overflow(s); + } + } + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 12, 20, diff); + tcg_out32(s, insn); } =20 static void tcg_out_op_v(TCGContext *s, TCGOpcode op) { - uint8_t *old_code_ptr =3D s->code_ptr; - - tcg_out_op_t(s, op); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; -} - -static void tcg_out_op_np(TCGContext *s, TCGOpcode op, - uint8_t n0, const void *p1) -{ - uint8_t *old_code_ptr =3D s->code_ptr; - - tcg_out_op_t(s, op); - tcg_out8(s, n0); - tcg_out_i(s, (uintptr_t)p1); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out32(s, (uint8_t)op); } =20 static void tcg_out_op_ri(TCGContext *s, TCGOpcode op, TCGReg r0, int32_t = i1) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out32(s, i1); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_debug_assert(i1 =3D=3D sextract32(i1, 0, 20)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 20, i1); + tcg_out32(s, insn); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 64 -static void tcg_out_op_rI(TCGContext *s, TCGOpcode op, - TCGReg r0, uint64_t i1) -{ - uint8_t *old_code_ptr =3D s->code_ptr; - - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out64(s, i1); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; -} -#endif - static void tcg_out_op_rl(TCGContext *s, TCGOpcode op, TCGReg r0, TCGLabel= *l1) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tci_out_label(s, l1); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_out_reloc(s, s->code_ptr, 20, l1, 0); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + tcg_out32(s, insn); } =20 static void tcg_out_op_rr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r= 1) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrm(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGArg m2) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out32(s, m2); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_debug_assert(m2 =3D=3D extract32(m2, 0, 12)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 20, 12, m2); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, intptr_t i2) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_debug_assert(i2 =3D=3D (int32_t)i2); - tcg_out32(s, i2); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_debug_assert(i2 =3D=3D sextract32(i2, 0, 16)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 16, i2); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out8(s, c3); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 4, c3); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrrm(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGArg m3) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out32(s, m3); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_debug_assert(m3 =3D=3D extract32(m3, 0, 12)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 12, m3); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrrbb(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, uint8_t b3, uint8_t b4) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out8(s, b3); - tcg_out8(s, b4); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + tcg_debug_assert(b3 =3D=3D extract32(b3, 0, 6)); + tcg_debug_assert(b4 =3D=3D extract32(b4, 0, 6)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 6, b3); + insn =3D deposit32(insn, 26, 6, b4); + tcg_out32(s, insn); } =20 -static void tcg_out_op_rrrrm(TCGContext *s, TCGOpcode op, TCGReg r0, - TCGReg r1, TCGReg r2, TCGReg r3, TCGArg m4) +static void tcg_out_op_rrrrr(TCGContext *s, TCGOpcode op, TCGReg r0, + TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out_r(s, r3); - tcg_out32(s, m4); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 4, r3); + insn =3D deposit32(insn, 24, 4, r4); + tcg_out32(s, insn); } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out_r(s, r3); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 4, r3); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGCond c5) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out_r(s, r3); - tcg_out_r(s, r4); - tcg_out8(s, c5); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 4, r3); + insn =3D deposit32(insn, 24, 4, r4); + insn =3D deposit32(insn, 28, 4, c5); + tcg_out32(s, insn); } =20 static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGReg r5) { - uint8_t *old_code_ptr =3D s->code_ptr; + tcg_insn_unit insn =3D 0; =20 - tcg_out_op_t(s, op); - tcg_out_r(s, r0); - tcg_out_r(s, r1); - tcg_out_r(s, r2); - tcg_out_r(s, r3); - tcg_out_r(s, r4); - tcg_out_r(s, r5); - - old_code_ptr[1] =3D s->code_ptr - old_code_ptr; + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 4, r2); + insn =3D deposit32(insn, 20, 4, r3); + insn =3D deposit32(insn, 24, 4, r4); + insn =3D deposit32(insn, 28, 4, r5); + tcg_out32(s, insn); } #endif =20 +static void tcg_out_ldst(TCGContext *s, TCGOpcode op, TCGReg val, + TCGReg base, intptr_t offset) +{ + stack_bounds_check(base, offset); + if (offset !=3D sextract32(offset, 0, 16)) { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP, offset); + tcg_out_op_rrr(s, (TCG_TARGET_REG_BITS =3D=3D 32 + ? INDEX_op_add_i32 : INDEX_op_add_i64), + TCG_REG_TMP, TCG_REG_TMP, base); + base =3D TCG_REG_TMP; + offset =3D 0; + } + tcg_out_op_rrs(s, op, val, base, offset); +} + static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg bas= e, intptr_t offset) { - stack_bounds_check(base, offset); switch (type) { case TCG_TYPE_I32: - tcg_out_op_rrs(s, INDEX_op_ld_i32, val, base, offset); + tcg_out_ldst(s, INDEX_op_ld_i32, val, base, offset); break; #if TCG_TARGET_REG_BITS =3D=3D 64 case TCG_TYPE_I64: - tcg_out_op_rrs(s, INDEX_op_ld_i64, val, base, offset); + tcg_out_ldst(s, INDEX_op_ld_i64, val, base, offset); break; #endif default: @@ -559,22 +495,33 @@ static void tcg_out_movi(TCGContext *s, TCGType type, { switch (type) { case TCG_TYPE_I32: - tcg_out_op_ri(s, INDEX_op_tci_movi_i32, ret, arg); - break; #if TCG_TARGET_REG_BITS =3D=3D 64 + arg =3D (int32_t)arg; + /* fall through */ case TCG_TYPE_I64: - tcg_out_op_rI(s, INDEX_op_tci_movi_i64, ret, arg); - break; #endif + break; default: g_assert_not_reached(); } + + if (arg =3D=3D sextract32(arg, 0, 20)) { + tcg_out_op_ri(s, INDEX_op_tci_movi, ret, arg); + } else { + tcg_insn_unit insn =3D 0; + + new_pool_label(s, arg, 20, s->code_ptr, 0); + insn =3D deposit32(insn, 0, 8, INDEX_op_tci_movl); + insn =3D deposit32(insn, 8, 4, ret); + tcg_out32(s, insn); + } } =20 static void tcg_out_call(TCGContext *s, const tcg_insn_unit *arg) { const TCGHelperInfo *info; uint8_t which; + tcg_insn_unit insn =3D 0; =20 info =3D g_hash_table_lookup(helper_table, (gpointer)arg); if (info->cif->rtype =3D=3D &ffi_type_void) { @@ -586,7 +533,11 @@ static void tcg_out_call(TCGContext *s, const tcg_insn= _unit *arg) which =3D 2; } =20 - tcg_out_op_np(s, INDEX_op_call, which, info); + new_pool_l2(s, 20, s->code_ptr, 0, + (uintptr_t)info->func, (uintptr_t)info->cif); + insn =3D deposit32(insn, 0, 8, INDEX_op_call); + insn =3D deposit32(insn, 8, 4, which); + tcg_out32(s, insn); } =20 #if TCG_TARGET_REG_BITS =3D=3D 64 @@ -644,8 +595,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, case INDEX_op_st_i32: CASE_64(st32) CASE_64(st) - stack_bounds_check(args[1], args[2]); - tcg_out_op_rrs(s, opc, args[0], args[1], args[2]); + tcg_out_ldst(s, opc, args[0], args[1], args[2]); break; =20 CASE_32_64(add) @@ -738,8 +688,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, } else if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { tcg_out_op_rrrm(s, opc, args[0], args[1], args[2], args[3]); } else { - tcg_out_op_rrrrm(s, opc, args[0], args[1], - args[2], args[3], args[4]); + tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_TMP, args[4]); + tcg_out_op_rrrrr(s, opc, args[0], args[1], + args[2], args[3], TCG_REG_TMP); } break; =20 @@ -787,6 +738,11 @@ static int tcg_target_const_match(tcg_target_long val,= TCGType type, return arg_ct->ct & TCG_CT_CONST; } =20 +static void tcg_out_nop_fill(tcg_insn_unit *p, int count) +{ + memset(p, 0, sizeof(*p) * count); +} + static void tcg_target_init(TCGContext *s) { #if defined(CONFIG_DEBUG_TCG_INTERPRETER) diff --git a/tcg/tci/README b/tcg/tci/README index 9bb7d7a5d3..f72a40a395 100644 --- a/tcg/tci/README +++ b/tcg/tci/README @@ -23,10 +23,12 @@ This is what TCI (Tiny Code Interpreter) does. Like each TCG host frontend, TCI implements the code generator in tcg-target.c.inc, tcg-target.h. Both files are in directory tcg/tci. =20 -The additional file tcg/tci.c adds the interpreter. +The additional file tcg/tci.c adds the interpreter and disassembler. =20 -The bytecode consists of opcodes (same numeric values as those used by -TCG), command length and arguments of variable size and number. +The bytecode consists of opcodes (with only a few exceptions, with +the same same numeric values and semantics as used by TCG), and up +to six arguments packed into a 32-bit integer. See comments in tci.c +for details on the encoding. =20 3) Usage =20 @@ -39,11 +41,6 @@ suggest using this option. Setting it automatically woul= d need additional code in configure which must be fixed when new native TCG implementations are added. =20 -System emulation should work on any 32 or 64 bit host. -User mode emulation might work. Maybe a new linker script (*.ld) -is needed. Byte order might be wrong (on big endian hosts) -and need fixes in configure. - For hosts with native TCG, the interpreter TCI can be enabled by =20 configure --enable-tcg-interpreter @@ -118,13 +115,6 @@ u1 =3D linux-user-test works in the interpreter. These opcodes raise a runtime exception, so it is possible to see where code must be added. =20 -* The pseudo code is not optimized and still ugly. For hosts with special - alignment requirements, it needs some fixes (maybe aligned bytecode - would also improve speed for hosts which support byte alignment). - -* A better disassembler for the pseudo code would be nice (a very primitive - disassembler is included in tcg-target.c.inc). - * It might be useful to have a runtime option which selects the native TCG or TCI, so QEMU would have to include two TCGs. Today, selecting TCI is a configure option, so you need two compilations of QEMU. --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475458; cv=none; d=zohomail.com; s=zohoarc; b=cGoc2uBppsLTFRKCVcDw/GGPyZxr30uafKu7EXFysHCmRn0tyXwA0j8VIOKpx+XmC4FWD5Fq4k3kpQBzg5MeYr4ERB+P+rSI6uojiWyw9bIg4F39WzIr0wYAU90oxnCjOOZaHdCFE66utXOLDoUTIjpiPMBN2CNm6Uebg5LReP0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475458; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=9jHEmEI6EV8qZCeh+tCL5YyTrUMsHZff/il96+nDzSE=; b=HubLI+2XSnSNHyt8PA8ZpOb4C1q9bMJvbWUsjYMudMPr7vhpk8EmzpJYs5JY8CwEGS1/4nTdiuV5N6avOKL6GV0z7BASabB7m5A0mflUmxfq/5NYQbR0Ty8vOC9S/b4IKExEiz9dAd5kAFbrs9BaIHmvPQNdcg6f6x1xOi0yJvY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475458087218.7327138462074; Thu, 11 Mar 2021 07:10:58 -0800 (PST) Received: from localhost ([::1]:59566 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMxk-0005kq-RM for importer@patchew.org; Thu, 11 Mar 2021 10:10:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40458) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVR-0004Bf-5A for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:41 -0500 Received: from mail-qv1-xf2a.google.com ([2607:f8b0:4864:20::f2a]:35466) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVL-0006ty-1W for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:40 -0500 Received: by mail-qv1-xf2a.google.com with SMTP id x27so2637076qvd.2 for ; Thu, 11 Mar 2021 06:41:34 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9jHEmEI6EV8qZCeh+tCL5YyTrUMsHZff/il96+nDzSE=; b=I02QE7goGQeSkoprYxOzVvzhpmpDMnIiO+alAmhu20MUtN1ziVmo9yZOeFzYxD/nbY csLA4czW4PPfPpUFw+IeDmXEGg8cffgMG3icBoS9MRWC3cn4DPfrdqcsOkcpHjko2M9d WbyCr7puMBT6Ow8GtQPZmCyqVuPISqz3REU063ucTMIcdU+Or2uIOqyZWPXB5D9uckYI GF7900+gUx1M0UImysAV5er3PhzDt+nzY8Cc3QXCGmC1CURlIl7tZZuxqo6H4IbHNFlk /urP9GdtdjVzEXxXMweWc9ZVhSIe0HoWE8mSskSduAKKLVe8X+PppWtwOiRg2sM/M8cS L/1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9jHEmEI6EV8qZCeh+tCL5YyTrUMsHZff/il96+nDzSE=; b=D1IaEw8jDnbuSINF3q74asjRq73HqcCcj3U79GCpGLZFA/IPE3jY0JZgha4PHNDq0J U9+s2follAUSdoR436k+urJZhCuox/R8o2Yi2mN466LNeh3zWBGuZSzol3DaaufnYxW7 7s8AYYF5qbCC44EVAXTDl3sfMNbrsg5OO2QSrxpScYGy0ddzH6zekArVoSKkmphOJJOf I6EXQG1QUnF1GYF0m6zXrZv2u+rWAsWjLSHeyKYQ55gIDKZBPV+mQrga4qTZuPg5TDPJ SdnL/oh2CFMS384krEpOUU7kxp/UcD6NKrsK/Q+Ixch6JlIJau9Yy3Wet7+ZL2eWK2Bp R2Aw== X-Gm-Message-State: AOAM533AMsgoYwnFAyhuZuGX/WzQU5yeHQ4cVdQndz8fY+7JWxzazP9V JKdaic4t11LSVj5vFTtm5yT1zdgJTalFy58c X-Google-Smtp-Source: ABdhPJxngCBfBLpORSM78ed7iNPkOTEJSitB94kbVDSGkcXYIz80nHuoytU3CxnD7ysUO20hc1Yu3w== X-Received: by 2002:a05:6214:20a7:: with SMTP id 7mr5664117qvd.24.1615473693751; Thu, 11 Mar 2021 06:41:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 47/57] tcg/tci: Implement goto_ptr Date: Thu, 11 Mar 2021 08:39:48 -0600 Message-Id: <20210311143958.562625-48-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2a; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" This operation is critical to staying within the interpretation loop longer, which avoids the overhead of setup and teardown for many TBs. The check in tcg_prologue_init is disabled because TCI does want to use NULL to indicate exit, as opposed to branching to a real epilogue. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target-con-set.h | 1 + tcg/tci/tcg-target.h | 2 +- tcg/tcg.c | 2 ++ tcg/tci.c | 19 +++++++++++++++++++ tcg/tci/tcg-target.c.inc | 16 ++++++++++++++++ 5 files changed, 39 insertions(+), 1 deletion(-) diff --git a/tcg/tci/tcg-target-con-set.h b/tcg/tci/tcg-target-con-set.h index 316730f32c..ae2dc3b844 100644 --- a/tcg/tci/tcg-target-con-set.h +++ b/tcg/tci/tcg-target-con-set.h @@ -9,6 +9,7 @@ * Each operand should be a sequence of constraint letters as defined by * tcg-target-con-str.h; the constraint combination is inclusive or. */ +C_O0_I1(r) C_O0_I2(r, r) C_O0_I3(r, r, r) C_O0_I4(r, r, r, r) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index d953f2ead3..17911d3297 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -86,7 +86,7 @@ #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 -#define TCG_TARGET_HAS_goto_ptr 0 +#define TCG_TARGET_HAS_goto_ptr 1 #define TCG_TARGET_HAS_direct_jump 0 #define TCG_TARGET_HAS_qemu_st8_i32 0 =20 diff --git a/tcg/tcg.c b/tcg/tcg.c index 92aec0d238..ce80adcfbe 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1314,10 +1314,12 @@ void tcg_prologue_init(TCGContext *s) } #endif =20 +#ifndef CONFIG_TCG_INTERPRETER /* Assert that goto_ptr is implemented completely. */ if (TCG_TARGET_HAS_goto_ptr) { tcg_debug_assert(tcg_code_gen_epilogue !=3D NULL); } +#endif } =20 void tcg_func_start(TCGContext *s) diff --git a/tcg/tci.c b/tcg/tci.c index 76bbf440a8..c229050c66 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -69,6 +69,11 @@ static void tci_args_l(uint32_t insn, const void *tb_ptr= , void **l0) *l0 =3D diff ? (void *)tb_ptr + diff : NULL; } =20 +static void tci_args_r(uint32_t insn, TCGReg *r0) +{ + *r0 =3D extract32(insn, 8, 4); +} + static void tci_args_nl(uint32_t insn, const void *tb_ptr, uint8_t *n0, void **l1) { @@ -738,6 +743,15 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tb_ptr =3D *(void **)ptr; break; =20 + case INDEX_op_goto_ptr: + tci_args_r(insn, &r0); + ptr =3D (void *)regs[r0]; + if (!ptr) { + return 0; + } + tb_ptr =3D ptr; + break; + case INDEX_op_qemu_ld_i32: if (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS) { tci_args_rrm(insn, &r0, &r1, &oi); @@ -995,6 +1009,11 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) info->fprintf_func(info->stream, "%-12s %p", op_name, ptr); break; =20 + case INDEX_op_goto_ptr: + tci_args_r(insn, &r0); + info->fprintf_func(info->stream, "%-12s %s", op_name, str_r(r0)); + break; + case INDEX_op_call: tci_args_nl(insn, tb_ptr, &len, &ptr); info->fprintf_func(info->stream, "%-12s %d,%p", op_name, len, ptr= ); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 0df8384be7..db29bc6e54 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -27,6 +27,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) { switch (op) { + case INDEX_op_goto_ptr: + return C_O0_I1(r); + case INDEX_op_ld8u_i32: case INDEX_op_ld8s_i32: case INDEX_op_ld16u_i32: @@ -263,6 +266,15 @@ static void tcg_out_op_p(TCGContext *s, TCGOpcode op, = void *p0) tcg_out32(s, insn); } =20 +static void tcg_out_op_r(TCGContext *s, TCGOpcode op, TCGReg r0) +{ + tcg_insn_unit insn =3D 0; + + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + tcg_out32(s, insn); +} + static void tcg_out_op_v(TCGContext *s, TCGOpcode op) { tcg_out32(s, (uint8_t)op); @@ -567,6 +579,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, set_jmp_reset_offset(s, args[0]); break; =20 + case INDEX_op_goto_ptr: + tcg_out_op_r(s, opc, args[0]); + break; + case INDEX_op_br: tcg_out_op_l(s, opc, arg_label(args[0])); break; --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475028; cv=none; d=zohomail.com; s=zohoarc; b=bqNbG9WJo1zXvMVZismua/+1bFhVyrHmFnsgRbJttkCG/D1Ipr2KH4ydBKOV0i2vcJI5hRJTvmXf4xti8m0ggV+CDcJ+8JJ1Q7RzbiGfKKhj71WO5JjRtYXqHgnOKu2rYBpPDAfg25J93pU23kfGSwBJ/JkRqfSPQyIveIBs3Pw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475028; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=t8YgkJ1JSVwTBJ9tGciCHNpn3ZeG9bxQ1lhsPKyTifo=; b=YLNV6n/owF5SYSaewbVSFM2AAR3tdd+tEGILxrHYHxz3nKC0LAafL4SAP5XTt162q+/jDfgRdEocO1NYlarvvi69B/5aA2Atam/fcuzy6BJn4MhZr58O9QyWIGxu3yIBbnKtlZlB+7dlRp9CNIxQwg3qiBip9xB05+ORPMeN8kE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475028227392.13181308950243; Thu, 11 Mar 2021 07:03:48 -0800 (PST) Received: from localhost ([::1]:33784 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMqp-0003Ic-EL for importer@patchew.org; Thu, 11 Mar 2021 10:03:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40468) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVR-0004DG-Nj for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:41 -0500 Received: from mail-qv1-xf30.google.com ([2607:f8b0:4864:20::f30]:36452) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVM-0006vH-O0 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:41 -0500 Received: by mail-qv1-xf30.google.com with SMTP id g14so2638745qvn.3 for ; Thu, 11 Mar 2021 06:41:35 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=t8YgkJ1JSVwTBJ9tGciCHNpn3ZeG9bxQ1lhsPKyTifo=; b=UP9i+EWnnnjSirktrAe1BH3E3zk/yngpYTwmWAmgU/AjpxbYmUnPUkmA7v7etvKP7X jvSBCqDOgET/GUVG7fJ0Adqskwy93a4P5uzB8K88swMueraz7kdG7jozGhdYjdolnxbU 6gDFXkE5De7jNdUOJkG5ValDU+NixB7wFS2YeYelhfYSph9IWdS9nCMk9tAwo3NSSTHT /iK3RjCK5vG2/5wzc0nvClA/2yi6WgAATU4WyKawHM5eEdnZwhlpeM0Uo5KV3ZqcF2yJ uhNk8ycNDy8adzcDDzuFrC2z5hBa6cAZx+323zXPp7i8gJj++cz9O7PAIjn6y+pnttlZ h4Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=t8YgkJ1JSVwTBJ9tGciCHNpn3ZeG9bxQ1lhsPKyTifo=; b=sJJ+sKOgT+LxrxfQFB08TGPgi/87Kf+YG1EH5JH7YWJa19WHXN+oxwLMw8LInTSRpv 32w1EgS22b/I+vIW5xIT2WJ7ZKHL/bEAMhrGiiTDX6oMy+pFcnQXOBhGNX2ybcE15lB+ yfwPfH30RdKs6xeJyWXBMNLtlc8DZMvVhEyvNtAqsh2irPaZC5XMTMHIeczQEznsb4WL zbMY4k8lHmyaoTB8ZpeC//RT+e4Nz36uqWAwIVolDl30z8ZlQQehPPKwM02ZbaWJDALP 7GXSmpd65KsCr/vAKvdykQF4ccBh0Q5YladMeauz/F6CLBfqKoXm6uI6QE7vsH303JDY ONGw== X-Gm-Message-State: AOAM530gExpyA6O26IZmCasRQXUiBq7h9xd45Fb5LGaeD1GE8LQEyVay sHhlsjVcAXG9NN0CN32CeAUNx3Njk12J1LhG X-Google-Smtp-Source: ABdhPJwC8UUeOMvNuZzfxdU52xFzxpwRIz05smi5bgspRtvtx9zsrAnfItvo0sYFUm614n4/YUqAmg== X-Received: by 2002:a0c:b59f:: with SMTP id g31mr7976619qve.28.1615473694774; Thu, 11 Mar 2021 06:41:34 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 48/57] tcg/tci: Implement movcond Date: Thu, 11 Mar 2021 08:39:49 -0600 Message-Id: <20210311143958.562625-49-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f30; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf30.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" When this opcode is not available in the backend, tcg middle-end will expand this as a series of 5 opcodes. So implementing this saves bytecode space. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 4 ++-- tcg/tci.c | 16 +++++++++++++++- tcg/tci/tcg-target.c.inc | 10 +++++++--- 3 files changed, 24 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 17911d3297..f53773a555 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -82,7 +82,7 @@ #define TCG_TARGET_HAS_not_i32 1 #define TCG_TARGET_HAS_orc_i32 0 #define TCG_TARGET_HAS_rot_i32 1 -#define TCG_TARGET_HAS_movcond_i32 0 +#define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 @@ -119,7 +119,7 @@ #define TCG_TARGET_HAS_not_i64 1 #define TCG_TARGET_HAS_orc_i64 0 #define TCG_TARGET_HAS_rot_i64 1 -#define TCG_TARGET_HAS_movcond_i64 0 +#define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_muls2_i64 0 #define TCG_TARGET_HAS_add2_i32 0 #define TCG_TARGET_HAS_sub2_i32 0 diff --git a/tcg/tci.c b/tcg/tci.c index c229050c66..2391dd4d3b 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -169,6 +169,7 @@ static void tci_args_rrrr(uint32_t insn, *r2 =3D extract32(insn, 16, 4); *r3 =3D extract32(insn, 20, 4); } +#endif =20 static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) @@ -181,6 +182,7 @@ static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, = TCGReg *r1, *c5 =3D extract32(insn, 28, 4); } =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5) { @@ -421,6 +423,11 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrrc(insn, &r0, &r1, &r2, &condition); regs[r0] =3D tci_compare32(regs[r1], regs[r2], condition); break; + case INDEX_op_movcond_i32: + tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); + tmp32 =3D tci_compare32(regs[r1], regs[r2], condition); + regs[r0] =3D regs[tmp32 ? r3 : r4]; + break; #if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_setcond2_i32: tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); @@ -433,6 +440,11 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrrc(insn, &r0, &r1, &r2, &condition); regs[r0] =3D tci_compare64(regs[r1], regs[r2], condition); break; + case INDEX_op_movcond_i64: + tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); + tmp32 =3D tci_compare64(regs[r1], regs[r2], condition); + regs[r0] =3D regs[tmp32 ? r3 : r4]; + break; #endif CASE_32_64(mov) tci_args_rr(insn, &r0, &r1); @@ -1138,7 +1150,8 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) op_name, str_r(r0), str_r(r1), str_r(r2), pos, = len); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 + case INDEX_op_movcond_i32: + case INDEX_op_movcond_i64: case INDEX_op_setcond2_i32: tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &c); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", @@ -1146,6 +1159,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) str_r(r3), str_r(r4), str_c(c)); break; =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_mulu2_i32: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index db29bc6e54..a0c458a60a 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -133,9 +133,12 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpco= de op) return C_O0_I4(r, r, r, r); case INDEX_op_mulu2_i32: return C_O2_I2(r, r, r, r); +#endif + + case INDEX_op_movcond_i32: + case INDEX_op_movcond_i64: case INDEX_op_setcond2_i32: return C_O1_I4(r, r, r, r, r); -#endif =20 case INDEX_op_qemu_ld_i32: return (TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS @@ -419,6 +422,7 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, insn =3D deposit32(insn, 20, 4, r3); tcg_out32(s, insn); } +#endif =20 static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, @@ -436,6 +440,7 @@ static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode = op, tcg_out32(s, insn); } =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGReg r5) @@ -591,12 +596,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out_op_rrrc(s, opc, args[0], args[1], args[2], args[3]); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 + CASE_32_64(movcond) case INDEX_op_setcond2_i32: tcg_out_op_rrrrrc(s, opc, args[0], args[1], args[2], args[3], args[4], args[5]); break; -#endif =20 CASE_32_64(ld8u) CASE_32_64(ld8s) --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615476259; cv=none; d=zohomail.com; s=zohoarc; b=SrHbW24Hn/kT2eHHypamTm7CNqZ/tSiFYuMVfSzS3OcJSdseB/fPf0v3UmahzZskUAIpzCdTnp8+pgR1v08njmQ+USoDe0+Fhld3Wf7KZjrzVMr8e2FIBveAgoSrR/uCZ5sejDDHnvO2ZFBzfHH3l1YtkFCdVKKdpWWBB/FnCT0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615476259; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=8UhCzfaKYlwmE690TaVTdGnsli7nQ9Ath2fy3ZA2wa8=; b=DBmngOmfoblkJx5A02VziuZRcB/T1+uHj67EWRU1pBV/RLeeu1h935jT6Xq5ruprpWB9qECZhSMjbRSfKcMuQK9c7Iv9VcdlXKgHVYDvuzvdbJRQ6pyoXaLPVFmb7breyRMCgNC9XHy4PnamTScCgcv3/kPTaWuUzjAYrye/NHo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615476259308106.8851052188304; Thu, 11 Mar 2021 07:24:19 -0800 (PST) Received: from localhost ([::1]:43246 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKNAg-0006L4-4Q for importer@patchew.org; Thu, 11 Mar 2021 10:24:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40536) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVU-0004Ka-Cb for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:44 -0500 Received: from mail-qv1-xf35.google.com ([2607:f8b0:4864:20::f35]:38721) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVO-0006vN-PX for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:44 -0500 Received: by mail-qv1-xf35.google.com with SMTP id t5so2640652qvs.5 for ; Thu, 11 Mar 2021 06:41:36 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8UhCzfaKYlwmE690TaVTdGnsli7nQ9Ath2fy3ZA2wa8=; b=C4i9ohrvUTTzKS8W6UgMQ82QlAlHpUjB9v6VR47Gwy90LH42pGi2kqpB/+lHr7Z/0Y wx887VxNlH5FpEzWTJuGjbl+hMw+lZGDgl74uCxLbFHBjlDjRMb4ZWw4ZiL6vUGDpR9s pD9Gj28lPQXSRXkBk++acPO1ootVjL0N0zXQT3vCawoHLLWhY1YI9Ms/CSnsTCXSrVQz fSmFE9ppoXY8tJRK+wygcvoO3IaKbU/z7wmPkdx34324zFu+mArjsZM5xKYrQUHMCA9f +lM/TKGF70pSBig0JPgNhe5W4CGLntBz7XLb7V/xrGFntSGlvm8ZrK6h1CcIVaTYtKyX 7Z7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8UhCzfaKYlwmE690TaVTdGnsli7nQ9Ath2fy3ZA2wa8=; b=AnZtdgnlwqQMu8yDEUZJAKXB/u+MfX+vmZ2gDH6pl86RqsWXL0tX/5dTXbQ9FexN7K V66e45HlHYwcK7oJNinXR3BrWJ+2JH0wSWJFXJYomz2wjaZW7uJJn32bIcX2+hfbDgMw 2saMqCyc77bEldoIjfeDj9FslYzQOzPC/JkmYmY8rH19Z+LCEQ+6tV9syVF4DQa1vi6b mF57/bNz4SuD+cFewjicu/JkWa7B96eOHD6XRwBVlft751+sMzKcDBeH+1XNmYcoN9Ie eWQzzc82bwXo5l2ScPK+cJmOihTFsHVa8DRi+l9tFWBWprOeZj2da4NOK/N+3jlMhOlI meSw== X-Gm-Message-State: AOAM532znzYJfLb/+LPpxQ/kllF0fA6gsWDrLZTNZr3EnfMzpYuh7VpT exWBdNuuZoxmLPNZ1OPDjEbMxea///EiHbVF X-Google-Smtp-Source: ABdhPJxVhT82G/u/f+iI7GP9VaoFNrriP3WTiRt5HtjnB2gGj+ncyugE7SpPKxli3+xi7vrCQ3Cg2Q== X-Received: by 2002:a05:6214:f6d:: with SMTP id iy13mr8063150qvb.24.1615473696022; Thu, 11 Mar 2021 06:41:36 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 49/57] tcg/tci: Implement andc, orc, eqv, nand, nor Date: Thu, 11 Mar 2021 08:39:50 -0600 Message-Id: <20210311143958.562625-50-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f35; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" These were already present in tcg-target.c.inc, but not in the interpreter. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 20 ++++++++++---------- tcg/tci.c | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 10 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index f53773a555..5945272a43 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -67,20 +67,20 @@ #define TCG_TARGET_HAS_ext16s_i32 1 #define TCG_TARGET_HAS_ext8u_i32 1 #define TCG_TARGET_HAS_ext16u_i32 1 -#define TCG_TARGET_HAS_andc_i32 0 +#define TCG_TARGET_HAS_andc_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_extract2_i32 0 -#define TCG_TARGET_HAS_eqv_i32 0 -#define TCG_TARGET_HAS_nand_i32 0 -#define TCG_TARGET_HAS_nor_i32 0 +#define TCG_TARGET_HAS_eqv_i32 1 +#define TCG_TARGET_HAS_nand_i32 1 +#define TCG_TARGET_HAS_nor_i32 1 #define TCG_TARGET_HAS_clz_i32 0 #define TCG_TARGET_HAS_ctz_i32 0 #define TCG_TARGET_HAS_ctpop_i32 0 #define TCG_TARGET_HAS_neg_i32 1 #define TCG_TARGET_HAS_not_i32 1 -#define TCG_TARGET_HAS_orc_i32 0 +#define TCG_TARGET_HAS_orc_i32 1 #define TCG_TARGET_HAS_rot_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_muls2_i32 0 @@ -108,16 +108,16 @@ #define TCG_TARGET_HAS_ext8u_i64 1 #define TCG_TARGET_HAS_ext16u_i64 1 #define TCG_TARGET_HAS_ext32u_i64 1 -#define TCG_TARGET_HAS_andc_i64 0 -#define TCG_TARGET_HAS_eqv_i64 0 -#define TCG_TARGET_HAS_nand_i64 0 -#define TCG_TARGET_HAS_nor_i64 0 +#define TCG_TARGET_HAS_andc_i64 1 +#define TCG_TARGET_HAS_eqv_i64 1 +#define TCG_TARGET_HAS_nand_i64 1 +#define TCG_TARGET_HAS_nor_i64 1 #define TCG_TARGET_HAS_clz_i64 0 #define TCG_TARGET_HAS_ctz_i64 0 #define TCG_TARGET_HAS_ctpop_i64 0 #define TCG_TARGET_HAS_neg_i64 1 #define TCG_TARGET_HAS_not_i64 1 -#define TCG_TARGET_HAS_orc_i64 0 +#define TCG_TARGET_HAS_orc_i64 1 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_muls2_i64 0 diff --git a/tcg/tci.c b/tcg/tci.c index 2391dd4d3b..02fad3370d 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -530,6 +530,36 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D regs[r1] ^ regs[r2]; break; +#if TCG_TARGET_HAS_andc_i32 || TCG_TARGET_HAS_andc_i64 + CASE_32_64(andc) + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D regs[r1] & ~regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_orc_i32 || TCG_TARGET_HAS_orc_i64 + CASE_32_64(orc) + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D regs[r1] | ~regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_eqv_i32 || TCG_TARGET_HAS_eqv_i64 + CASE_32_64(eqv) + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D ~(regs[r1] ^ regs[r2]); + break; +#endif +#if TCG_TARGET_HAS_nand_i32 || TCG_TARGET_HAS_nand_i64 + CASE_32_64(nand) + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D ~(regs[r1] & regs[r2]); + break; +#endif +#if TCG_TARGET_HAS_nor_i32 || TCG_TARGET_HAS_nor_i64 + CASE_32_64(nor) + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D ~(regs[r1] | regs[r2]); + break; +#endif =20 /* Arithmetic operations (32 bit). */ =20 @@ -1120,6 +1150,16 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) case INDEX_op_or_i64: case INDEX_op_xor_i32: case INDEX_op_xor_i64: + case INDEX_op_andc_i32: + case INDEX_op_andc_i64: + case INDEX_op_orc_i32: + case INDEX_op_orc_i64: + case INDEX_op_eqv_i32: + case INDEX_op_eqv_i64: + case INDEX_op_nand_i32: + case INDEX_op_nand_i64: + case INDEX_op_nor_i32: + case INDEX_op_nor_i64: case INDEX_op_div_i32: case INDEX_op_div_i64: case INDEX_op_rem_i32: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475928; cv=none; d=zohomail.com; s=zohoarc; b=X1mBeHKIR1sryOPeDyBU/xFjEurpQvSIPKEjhsqsW/wu2fc39+PvOGfTBA7aQk6CCz1FSh6DKo/QQlAlLHKfbLpirES/yQasKlBMnFw3mb5AdqRRHu6BJj+bwYeaUOiu9Awy4z74Nvh0E+N7bIIRxwk2bnVHSNSojnMaAqh2IZc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475928; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=R3Xq5mi4KWyitR5salt2lYEIY+qV+wkNAizGGObuYbw=; b=N+hHDARqMbaQkIWJg0nJdIHLBeGwyw8RJVKU10029J6dYDCHkhRWoxLdppGTHXiJ1nTOaqA9PVkK/CkatGiUxLWvN9t6lbzMlAG6D7VB+DAunxoU9jis4Pair9YG/cF3zrjcUns6XYkAqOyyoKx0qN+sPxg71nNr+uFv8JiUJGc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475928581671.0261271613183; Thu, 11 Mar 2021 07:18:48 -0800 (PST) Received: from localhost ([::1]:54338 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN5L-0007UE-SS for importer@patchew.org; Thu, 11 Mar 2021 10:18:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40494) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVS-0004Gv-Ox for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:42 -0500 Received: from mail-qt1-x834.google.com ([2607:f8b0:4864:20::834]:36445) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVO-0006vb-QR for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:42 -0500 Received: by mail-qt1-x834.google.com with SMTP id 6so1263229qty.3 for ; Thu, 11 Mar 2021 06:41:37 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R3Xq5mi4KWyitR5salt2lYEIY+qV+wkNAizGGObuYbw=; b=nbq0eCClx3GBmALRONXkXVtJ5wnjKXgT+anAY467vle1iGhJEVDPNM06BqHDA42lO7 ErW6SRrriIWjZY+iAhZsziG5tAWZUwl8o14xOomwTSO98TjwJFPpaQHakNc8Le5VDuST aLwoPeWeHXXqYVvUOZWwBTLHY6Q3wMczjspkVkSYuXcYB8fJiThRwwPtJqC4HOFO4/j8 k9LMgHUXEIaEjPqFu/vXLRGjFqPIh3hEilvVyOVSPAU0yieqjWBSaGat31IN+Usi8DZd ZHfnkZ2vDwB1ZwX5WwPKhDRmufLpU+8SW07Iq8MQeVugxLWeEzbHvMjapGDYH/144fes Qu+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R3Xq5mi4KWyitR5salt2lYEIY+qV+wkNAizGGObuYbw=; b=oyYx3jOFoKo1KAnSmi3y6tTz4CCgE7U2Bsbrhj9xpBFUqWvPwUN5bIJKrnVOMRMBEg fVJoX4aMjrIho8seGpOZLj9dgpqVoiwg1+9SihbeRgvVu91TlGL+8KYz8NjT5PXmDjci hvVS2vEmR5Fn6uHyZ4az3n8Izm8g4W2URVBAbN19TGiEzDBFRp9HrvnRct5K5ip72vdk KUrrWr9y8co/p0EAAyowxbrNWxWKdxr/luo5EVlP9oNBDia+E+NDl8Y6C1PXe/at8ecA yIAcAs/whjsBWatv8nQxNwhX6XZRTn0Bqa/uRzW1BGKS34TO2+cbk9hdeyD4NVD+chnX PBeQ== X-Gm-Message-State: AOAM533dV2CkQvWQ1isqJES9Spkkh/plZ9zm0N0PxI06P6zLnhH6XkTz CpHckhs1zH/f63XDfE1sMSrHZhWjThjkXsHZ X-Google-Smtp-Source: ABdhPJxgkVPEZs+7yI6zTVv+zTRt4KFZko/kbHLTyfj6AojDaY/yB+yrhFcZ+wygX6KzWsbrgcnYyw== X-Received: by 2002:ac8:720e:: with SMTP id a14mr7745243qtp.132.1615473697053; Thu, 11 Mar 2021 06:41:37 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 50/57] tcg/tci: Implement extract, sextract Date: Thu, 11 Mar 2021 08:39:51 -0600 Message-Id: <20210311143958.562625-51-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::834; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x834.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 8 ++++---- tcg/tci.c | 42 ++++++++++++++++++++++++++++++++++++++++ tcg/tci/tcg-target.c.inc | 32 ++++++++++++++++++++++++++++++ 3 files changed, 78 insertions(+), 4 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 5945272a43..60b67b196b 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -69,8 +69,8 @@ #define TCG_TARGET_HAS_ext16u_i32 1 #define TCG_TARGET_HAS_andc_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 -#define TCG_TARGET_HAS_extract_i32 0 -#define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract_i32 1 +#define TCG_TARGET_HAS_sextract_i32 1 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_eqv_i32 1 #define TCG_TARGET_HAS_nand_i32 1 @@ -97,8 +97,8 @@ #define TCG_TARGET_HAS_bswap32_i64 1 #define TCG_TARGET_HAS_bswap64_i64 1 #define TCG_TARGET_HAS_deposit_i64 1 -#define TCG_TARGET_HAS_extract_i64 0 -#define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract_i64 1 +#define TCG_TARGET_HAS_sextract_i64 1 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 1 diff --git a/tcg/tci.c b/tcg/tci.c index 02fad3370d..dcf8dc418f 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -122,6 +122,15 @@ static void tci_args_rrs(uint32_t insn, TCGReg *r0, TC= GReg *r1, int32_t *i2) *i2 =3D sextract32(insn, 16, 16); } =20 +static void tci_args_rrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, + uint8_t *i2, uint8_t *i3) +{ + *r0 =3D extract32(insn, 8, 4); + *r1 =3D extract32(insn, 12, 4); + *i2 =3D extract32(insn, 16, 6); + *i3 =3D extract32(insn, 22, 6); +} + static void tci_args_rrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) { @@ -609,6 +618,18 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); regs[r0] =3D deposit32(regs[r1], pos, len, regs[r2]); break; +#endif +#if TCG_TARGET_HAS_extract_i32 + case INDEX_op_extract_i32: + tci_args_rrbb(insn, &r0, &r1, &pos, &len); + regs[r0] =3D extract32(regs[r1], pos, len); + break; +#endif +#if TCG_TARGET_HAS_sextract_i32 + case INDEX_op_sextract_i32: + tci_args_rrbb(insn, &r0, &r1, &pos, &len); + regs[r0] =3D sextract32(regs[r1], pos, len); + break; #endif case INDEX_op_brcond_i32: tci_args_rl(insn, tb_ptr, &r0, &ptr); @@ -749,6 +770,18 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrrbb(insn, &r0, &r1, &r2, &pos, &len); regs[r0] =3D deposit64(regs[r1], pos, len, regs[r2]); break; +#endif +#if TCG_TARGET_HAS_extract_i64 + case INDEX_op_extract_i64: + tci_args_rrbb(insn, &r0, &r1, &pos, &len); + regs[r0] =3D extract64(regs[r1], pos, len); + break; +#endif +#if TCG_TARGET_HAS_sextract_i64 + case INDEX_op_sextract_i64: + tci_args_rrbb(insn, &r0, &r1, &pos, &len); + regs[r0] =3D sextract64(regs[r1], pos, len); + break; #endif case INDEX_op_brcond_i64: tci_args_rl(insn, tb_ptr, &r0, &ptr); @@ -1190,6 +1223,15 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) op_name, str_r(r0), str_r(r1), str_r(r2), pos, = len); break; =20 + case INDEX_op_extract_i32: + case INDEX_op_extract_i64: + case INDEX_op_sextract_i32: + case INDEX_op_sextract_i64: + tci_args_rrbb(insn, &r0, &r1, &pos, &len); + info->fprintf_func(info->stream, "%-12s %s,%s,%d,%d", + op_name, str_r(r0), str_r(r1), pos, len); + break; + case INDEX_op_movcond_i32: case INDEX_op_movcond_i64: case INDEX_op_setcond2_i32: diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index a0c458a60a..cedd0328df 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -63,6 +63,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode= op) case INDEX_op_bswap32_i32: case INDEX_op_bswap32_i64: case INDEX_op_bswap64_i64: + case INDEX_op_extract_i32: + case INDEX_op_extract_i64: + case INDEX_op_sextract_i32: + case INDEX_op_sextract_i64: return C_O1_I1(r, r); =20 case INDEX_op_st8_i32: @@ -352,6 +356,21 @@ static void tcg_out_op_rrs(TCGContext *s, TCGOpcode op, tcg_out32(s, insn); } =20 +static void tcg_out_op_rrbb(TCGContext *s, TCGOpcode op, TCGReg r0, + TCGReg r1, uint8_t b2, uint8_t b3) +{ + tcg_insn_unit insn =3D 0; + + tcg_debug_assert(b2 =3D=3D extract32(b2, 0, 6)); + tcg_debug_assert(b3 =3D=3D extract32(b3, 0, 6)); + insn =3D deposit32(insn, 0, 8, op); + insn =3D deposit32(insn, 8, 4, r0); + insn =3D deposit32(insn, 12, 4, r1); + insn =3D deposit32(insn, 16, 6, b2); + insn =3D deposit32(insn, 22, 6, b3); + tcg_out32(s, insn); +} + static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3) { @@ -653,6 +672,19 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, c= onst TCGArg *args, } break; =20 + CASE_32_64(extract) /* Optional (TCG_TARGET_HAS_extract_*). */ + CASE_32_64(sextract) /* Optional (TCG_TARGET_HAS_sextract_*). */ + { + TCGArg pos =3D args[2], len =3D args[3]; + TCGArg max =3D tcg_op_defs[opc].flags & TCG_OPF_64BIT ? 64 : 3= 2; + + tcg_debug_assert(pos < max); + tcg_debug_assert(pos + len <=3D max); + + tcg_out_op_rrbb(s, opc, args[0], args[1], pos, len); + } + break; + CASE_32_64(brcond) tcg_out_op_rrrc(s, (opc =3D=3D INDEX_op_brcond_i32 ? INDEX_op_setcond_i32 : INDEX_op_setcond_i64), --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615476094; cv=none; d=zohomail.com; s=zohoarc; b=k2y7XCSFseUSQ/kZ32V6eMQy15u8IoLe+e1aH2auSTAIbsfqpKaGVx1+V3PlEZuy/s9Mt/BkkBWxxfO16w6/KEAv2abHKEDTGNOMaTNhT60AChimMRElHIXIR+bmbIgZm/TBSR43SMHntox0r48AEFN2Uko8oN2GyuTYrg+h0jk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615476094; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=x+hYXlItoM/Z3+fP1AldUiXSVWyrROjLm9Iu89IH+Ds=; b=NV4yD46Kr6KpDgM0fZvVy1E4NR7SriS87z0Ye7FtBo905JkkKI0NIWGzA+eyxlFvbkC+RF90/Bqk1Qj1ZuKigg82aX6BbgkkMnJIaBlxrKEGHgpx3Myn6dRv3jZQGKvwnuL9Y6JGiuiPZS4l7MUD14/CphRAJSMkJmEBZtDgzAw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615476094607784.6654988727246; Thu, 11 Mar 2021 07:21:34 -0800 (PST) Received: from localhost ([::1]:34782 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN81-0002oS-FA for importer@patchew.org; Thu, 11 Mar 2021 10:21:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40500) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVS-0004HN-Uj for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:43 -0500 Received: from mail-qk1-x729.google.com ([2607:f8b0:4864:20::729]:40819) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVP-0006vm-9E for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:42 -0500 Received: by mail-qk1-x729.google.com with SMTP id l132so20786050qke.7 for ; Thu, 11 Mar 2021 06:41:38 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x+hYXlItoM/Z3+fP1AldUiXSVWyrROjLm9Iu89IH+Ds=; b=PiVBKKAPdg8tVmMnBPqcZkOMxbhY7keCl2Ic+fyd6pCcIVDf5HBig08Q00SDtPUjIy 1hrD2qYoNbtBujo1nUgzmWnaWO1RKjVWwEIB6h73TDQU+imp5wo1v1S7XOUWiME6fJWu b/Qd/VDvT09xLpGuYpbvjV8XnfvtjR6GG8xwDqulHqo9z9NSxulTj27qZJgTWiKuk0qv FVZZ/eY6nupJgeGLsRxL1j8vKT+lElPmif43gxH+oB+OrOFssevq/cVNfcA4BUCCX3+L f0+ALWhvS5axyagVev9MBc3yBHZfSn9pQfeLKpj37RZGd658JwsLojoplUvqNGdE3I+k oBzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=x+hYXlItoM/Z3+fP1AldUiXSVWyrROjLm9Iu89IH+Ds=; b=lRdGqyXHDbvGo693hDmc2phNgJer5YN3PrwXq13pc94f46/AaozQHUVAy5lYpeAEbH 7zBnuJQt8ut4lvxGy+B+88e/0lm2GOo2gHorDIEC8g4cv9nINfwB4nsERyl2QovJtIJD 0sJpy5bj/PzXZgFNXcxCzFNDDj2cWSGvWGeVin12vXarj42sYIwmpzwKHDBR7lrxQ7p2 NnmT6dT54zMTJ3SzkFL26CSpXoRjTBH14460lLITfUbdvKsx+uLmb3XFDLMx7twAA0pD Cdj4bIpE4fJ2I4FNUkeixXzxD2i40J9qPjhhlfFUTKBPi4bA+w9KXEO6fBtUAAmULDRr pDOg== X-Gm-Message-State: AOAM532j3m6aBPL34GMwVLS0gotxHgZc6dKV5HYdu3ilw4EX6Gjvx8n2 t99fQbwE5CnX+QAhBaWQWcrPOlFsxTx12hQM X-Google-Smtp-Source: ABdhPJx6sN9WDtoa+6WTXbnkOLyVte2qqEbsrUEGMHl61fhQQkoUjLJnHVrWCuI2nHrOWsYHcHtG2g== X-Received: by 2002:a05:620a:55a:: with SMTP id o26mr7853657qko.43.1615473698141; Thu, 11 Mar 2021 06:41:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 51/57] tcg/tci: Implement clz, ctz, ctpop Date: Thu, 11 Mar 2021 08:39:52 -0600 Message-Id: <20210311143958.562625-52-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::729; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x729.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 12 +++++------ tcg/tci.c | 44 ++++++++++++++++++++++++++++++++++++++++ tcg/tci/tcg-target.c.inc | 9 ++++++++ 3 files changed, 59 insertions(+), 6 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 60b67b196b..59859bd8a6 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -75,9 +75,9 @@ #define TCG_TARGET_HAS_eqv_i32 1 #define TCG_TARGET_HAS_nand_i32 1 #define TCG_TARGET_HAS_nor_i32 1 -#define TCG_TARGET_HAS_clz_i32 0 -#define TCG_TARGET_HAS_ctz_i32 0 -#define TCG_TARGET_HAS_ctpop_i32 0 +#define TCG_TARGET_HAS_clz_i32 1 +#define TCG_TARGET_HAS_ctz_i32 1 +#define TCG_TARGET_HAS_ctpop_i32 1 #define TCG_TARGET_HAS_neg_i32 1 #define TCG_TARGET_HAS_not_i32 1 #define TCG_TARGET_HAS_orc_i32 1 @@ -112,9 +112,9 @@ #define TCG_TARGET_HAS_eqv_i64 1 #define TCG_TARGET_HAS_nand_i64 1 #define TCG_TARGET_HAS_nor_i64 1 -#define TCG_TARGET_HAS_clz_i64 0 -#define TCG_TARGET_HAS_ctz_i64 0 -#define TCG_TARGET_HAS_ctpop_i64 0 +#define TCG_TARGET_HAS_clz_i64 1 +#define TCG_TARGET_HAS_ctz_i64 1 +#define TCG_TARGET_HAS_ctpop_i64 1 #define TCG_TARGET_HAS_neg_i64 1 #define TCG_TARGET_HAS_not_i64 1 #define TCG_TARGET_HAS_orc_i64 1 diff --git a/tcg/tci.c b/tcg/tci.c index dcf8dc418f..068d742a80 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -588,6 +588,26 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint32_t)regs[r1] % (uint32_t)regs[r2]; break; +#if TCG_TARGET_HAS_clz_i32 + case INDEX_op_clz_i32: + tci_args_rrr(insn, &r0, &r1, &r2); + tmp32 =3D regs[r1]; + regs[r0] =3D tmp32 ? clz32(tmp32) : regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_ctz_i32 + case INDEX_op_ctz_i32: + tci_args_rrr(insn, &r0, &r1, &r2); + tmp32 =3D regs[r1]; + regs[r0] =3D tmp32 ? ctz32(tmp32) : regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_ctpop_i32 + case INDEX_op_ctpop_i32: + tci_args_rr(insn, &r0, &r1); + regs[r0] =3D ctpop32(regs[r1]); + break; +#endif =20 /* Shift/rotate operations (32 bit). */ =20 @@ -740,6 +760,24 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] =3D (uint64_t)regs[r1] % (uint64_t)regs[r2]; break; +#if TCG_TARGET_HAS_clz_i64 + case INDEX_op_clz_i64: + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D regs[r1] ? clz64(regs[r1]) : regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_ctz_i64 + case INDEX_op_ctz_i64: + tci_args_rrr(insn, &r0, &r1, &r2); + regs[r0] =3D regs[r1] ? ctz64(regs[r1]) : regs[r2]; + break; +#endif +#if TCG_TARGET_HAS_ctpop_i64 + case INDEX_op_ctpop_i64: + tci_args_rr(insn, &r0, &r1); + regs[r0] =3D ctpop64(regs[r1]); + break; +#endif =20 /* Shift/rotate operations (64 bit). */ =20 @@ -1166,6 +1204,8 @@ int print_insn_tci(bfd_vma addr, disassemble_info *in= fo) case INDEX_op_not_i64: case INDEX_op_neg_i32: case INDEX_op_neg_i64: + case INDEX_op_ctpop_i32: + case INDEX_op_ctpop_i64: tci_args_rr(insn, &r0, &r1); info->fprintf_func(info->stream, "%-12s %s,%s", op_name, str_r(r0), str_r(r1)); @@ -1211,6 +1251,10 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) case INDEX_op_rotl_i64: case INDEX_op_rotr_i32: case INDEX_op_rotr_i64: + case INDEX_op_clz_i32: + case INDEX_op_clz_i64: + case INDEX_op_ctz_i32: + case INDEX_op_ctz_i64: tci_args_rrr(insn, &r0, &r1, &r2); info->fprintf_func(info->stream, "%-12s %s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2)); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index cedd0328df..664d715440 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -67,6 +67,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode = op) case INDEX_op_extract_i64: case INDEX_op_sextract_i32: case INDEX_op_sextract_i64: + case INDEX_op_ctpop_i32: + case INDEX_op_ctpop_i64: return C_O1_I1(r, r); =20 case INDEX_op_st8_i32: @@ -122,6 +124,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpco= de op) case INDEX_op_setcond_i64: case INDEX_op_deposit_i32: case INDEX_op_deposit_i64: + case INDEX_op_clz_i32: + case INDEX_op_clz_i64: + case INDEX_op_ctz_i32: + case INDEX_op_ctz_i64: return C_O1_I2(r, r, r); =20 case INDEX_op_brcond_i32: @@ -657,6 +663,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, CASE_32_64(divu) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(rem) /* Optional (TCG_TARGET_HAS_div_*). */ CASE_32_64(remu) /* Optional (TCG_TARGET_HAS_div_*). */ + CASE_32_64(clz) /* Optional (TCG_TARGET_HAS_clz_*). */ + CASE_32_64(ctz) /* Optional (TCG_TARGET_HAS_ctz_*). */ tcg_out_op_rrr(s, opc, args[0], args[1], args[2]); break; =20 @@ -705,6 +713,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, co= nst TCGArg *args, CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */ CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */ CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */ + CASE_32_64(ctpop) /* Optional (TCG_TARGET_HAS_ctpop_*). */ tcg_out_op_rr(s, opc, args[0], args[1]); break; =20 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475846; cv=none; d=zohomail.com; s=zohoarc; b=Co/ki+CC9QwrfEH7O3gldaAdSDHcXcmmETpVOK7xHWG72Z9Zvx64IcDni6xR6p5rrZwkqct1px5IXgyUINHg83v6nPFT8qkuE7ogIj+nQtdSNWjfwiy8NQouNy5QhAd48j6V06Hj2xiftwlJ27f6AFPCP5PtDdcUQi8xGFUJHA4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475846; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=6h+sAi9+UBX8LOTQXXAtVUgZ0by5F5omnkIi0WF53fQ=; b=QL2yAu3GcPuIAuJtPhTa5DaBzpthA7OzxSumHfo/CXReg0+Pq1U76iuis6EWfbvjq3C/oX9dug3iftMHNOOBI7Cye0UXXu7dPpO+uGXBfOYWoVSat7QY3vgpUKs2LZjnu5mT5rofGXN+BYVzb+VZo4j1NW1xq6HfbhBMLVH8MaU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475846795963.851687475011; Thu, 11 Mar 2021 07:17:26 -0800 (PST) Received: from localhost ([::1]:49336 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN41-0005Lv-UL for importer@patchew.org; Thu, 11 Mar 2021 10:17:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40560) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVV-0004N8-Sg for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:45 -0500 Received: from mail-qv1-xf2c.google.com ([2607:f8b0:4864:20::f2c]:37746) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVQ-0006xb-NU for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:45 -0500 Received: by mail-qv1-xf2c.google.com with SMTP id l15so2640589qvl.4 for ; Thu, 11 Mar 2021 06:41:40 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6h+sAi9+UBX8LOTQXXAtVUgZ0by5F5omnkIi0WF53fQ=; b=vFL/MRcndeXzabOuQlgYT8Tm+c4hXguDm8t49qm/EXq9H8IM8esg3YSjAca7Zh9doA vKcvKHRNdS6c4YEsmqaZ/hZu78RYlbP7uD4QgT4ERSjD/yTMD2TK8jVaqckBtDNeqcWJ 3tvM6FSX+wvYyMTFUNkhFdyOFSwrm/fJYsuzh8Zrsjt24X+BqI52Oq4tho6/T+NVOozG /4boBPBz/cK2rhqgu0xsGSEW4v8y8NqAaTEaFqIUYjyBzL1LTqySKMpzhMsv0CJGxHyV IQ6tCTD9Jmqht3y7IanOoDcsreICLmNRCi1UxYye3vlRGw8WQDdpu6GbhEVWYaaIIS2S 4wfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6h+sAi9+UBX8LOTQXXAtVUgZ0by5F5omnkIi0WF53fQ=; b=R3N8gBpbkHOUvlWttswGIV1MH+vpZD6xR9VEpcuRx67UugaPILmmh8umgXyr3jClCj 80AEjr8CLTuaTUk7zHG2ubFSNA2s6MG3rlVkqE8/8Q4luaB0r8cdAT94Duf+3sSXSkZi j7ofexjbw6MsHoOfi1TbEguQsvRS48Fv1WGUUx7Pu0YMlV9CwHauwyd4IYwjXyglUkdm kmwwju4RkK+K+xYRmSW7/7JTRCStq47V14Z1s3/qC8XisR97Y16YXyKrqvq7FEjwTrj5 iUM9kAsXCdexIZ3g/VNzJUD9L3b3iEsBjcVQg1RoOJA3RH1MjvEHLM/4RUAzzOX2dGK3 nGcg== X-Gm-Message-State: AOAM532p/f7ygczW7bQysLSrLq5NTzXL402JvB90K5MoxgJ28I3h4o8H n9xjnJBLdLYN60xjNejcW6AeraT/fsIhq3QU X-Google-Smtp-Source: ABdhPJwxnFW6PeEaePKamXLaMGm0PZWA+huOyv/HlEVbC8AYh/7ImO/3IA5sHJHRCxTHDJOq9ElHww== X-Received: by 2002:a0c:a404:: with SMTP id w4mr7908028qvw.45.1615473699484; Thu, 11 Mar 2021 06:41:39 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 52/57] tcg/tci: Implement mulu2, muls2 Date: Thu, 11 Mar 2021 08:39:53 -0600 Message-Id: <20210311143958.562625-53-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2c; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We already had mulu2_i32 for a 32-bit host; expand this to 64-bit hosts as well. The muls2_i32 and the 64-bit opcodes are new. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 8 ++++---- tcg/tci.c | 35 +++++++++++++++++++++++++++++------ tcg/tci/tcg-target.c.inc | 16 ++++++++++------ 3 files changed, 43 insertions(+), 16 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 59859bd8a6..71a44bbfb0 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -83,7 +83,7 @@ #define TCG_TARGET_HAS_orc_i32 1 #define TCG_TARGET_HAS_rot_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 -#define TCG_TARGET_HAS_muls2_i32 0 +#define TCG_TARGET_HAS_muls2_i32 1 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_goto_ptr 1 @@ -120,13 +120,13 @@ #define TCG_TARGET_HAS_orc_i64 1 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 -#define TCG_TARGET_HAS_muls2_i64 0 +#define TCG_TARGET_HAS_muls2_i64 1 #define TCG_TARGET_HAS_add2_i32 0 #define TCG_TARGET_HAS_sub2_i32 0 -#define TCG_TARGET_HAS_mulu2_i32 0 +#define TCG_TARGET_HAS_mulu2_i32 1 #define TCG_TARGET_HAS_add2_i64 0 #define TCG_TARGET_HAS_sub2_i64 0 -#define TCG_TARGET_HAS_mulu2_i64 0 +#define TCG_TARGET_HAS_mulu2_i64 1 #define TCG_TARGET_HAS_muluh_i64 0 #define TCG_TARGET_HAS_mulsh_i64 0 #else diff --git a/tcg/tci.c b/tcg/tci.c index 068d742a80..d76b9f5798 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -39,7 +39,7 @@ __thread uintptr_t tci_tb_ptr; static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, uint32_t low_index, uint64_t value) { - regs[low_index] =3D value; + regs[low_index] =3D (uint32_t)value; regs[high_index] =3D value >> 32; } =20 @@ -169,7 +169,6 @@ static void tci_args_rrrrr(uint32_t insn, TCGReg *r0, T= CGReg *r1, *r4 =3D extract32(insn, 24, 4); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) { @@ -178,7 +177,6 @@ static void tci_args_rrrr(uint32_t insn, *r2 =3D extract32(insn, 16, 4); *r3 =3D extract32(insn, 20, 4); } -#endif =20 static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c= 5) @@ -670,11 +668,21 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 - T2); break; +#endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ +#if TCG_TARGET_HAS_mulu2_i32 case INDEX_op_mulu2_i32: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); - tci_write_reg64(regs, r1, r0, (uint64_t)regs[r2] * regs[r3]); + tmp64 =3D (uint64_t)(uint32_t)regs[r2] * (uint32_t)regs[r3]; + tci_write_reg64(regs, r1, r0, tmp64); break; -#endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ +#endif +#if TCG_TARGET_HAS_muls2_i32 + case INDEX_op_muls2_i32: + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); + tmp64 =3D (int64_t)(int32_t)regs[r2] * (int32_t)regs[r3]; + tci_write_reg64(regs, r1, r0, tmp64); + break; +#endif #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64 CASE_32_64(ext8s) tci_args_rr(insn, &r0, &r1); @@ -778,6 +786,18 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, regs[r0] =3D ctpop64(regs[r1]); break; #endif +#if TCG_TARGET_HAS_mulu2_i64 + case INDEX_op_mulu2_i64: + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); + mulu64(®s[r0], ®s[r1], regs[r2], regs[r3]); + break; +#endif +#if TCG_TARGET_HAS_muls2_i64 + case INDEX_op_muls2_i64: + tci_args_rrrr(insn, &r0, &r1, &r2, &r3); + muls64(®s[r0], ®s[r1], regs[r2], regs[r3]); + break; +#endif =20 /* Shift/rotate operations (64 bit). */ =20 @@ -1285,14 +1305,17 @@ int print_insn_tci(bfd_vma addr, disassemble_info *= info) str_r(r3), str_r(r4), str_c(c)); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_mulu2_i32: + case INDEX_op_mulu2_i64: + case INDEX_op_muls2_i32: + case INDEX_op_muls2_i64: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_r(r3)); break; =20 +#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 664d715440..eb48633fba 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -141,10 +141,14 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) return C_O2_I4(r, r, r, r, r, r); case INDEX_op_brcond2_i32: return C_O0_I4(r, r, r, r); - case INDEX_op_mulu2_i32: - return C_O2_I2(r, r, r, r); #endif =20 + case INDEX_op_mulu2_i32: + case INDEX_op_mulu2_i64: + case INDEX_op_muls2_i32: + case INDEX_op_muls2_i64: + return C_O2_I2(r, r, r, r); + case INDEX_op_movcond_i32: case INDEX_op_movcond_i64: case INDEX_op_setcond2_i32: @@ -434,7 +438,6 @@ static void tcg_out_op_rrrrr(TCGContext *s, TCGOpcode o= p, TCGReg r0, tcg_out32(s, insn); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3) { @@ -447,7 +450,6 @@ static void tcg_out_op_rrrr(TCGContext *s, TCGOpcode op, insn =3D deposit32(insn, 20, 4, r3); tcg_out32(s, insn); } -#endif =20 static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, @@ -728,10 +730,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, args[0], args[1], args[2], args[3], args[4]); tcg_out_op_rl(s, INDEX_op_brcond_i32, TCG_REG_TMP, arg_label(args[= 5])); break; - case INDEX_op_mulu2_i32: +#endif + + CASE_32_64(mulu2) + CASE_32_64(muls2) tcg_out_op_rrrr(s, opc, args[0], args[1], args[2], args[3]); break; -#endif =20 case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_st_i32: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615476002; cv=none; d=zohomail.com; s=zohoarc; b=dP9hPJTj/o7Icj7fk9pKuqPvx5/MmKYXktXIpHfy1GIUkk7zJh0DbqUyVOXNbT0+GwxSzN1kGb4/6zmNL7/uUbf+G+DsX9k+XzsQiIE2b3IS4mdxZw3zbwdiUR3LdBZ+GgDBjFJJuGJVzZO+gF/UMNmcGCnPm1nFxIz1byF5RSo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615476002; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=BvlzLp6n+uhbL6lJ6/SY8kpsbMrMSqUUMDmNT2MwoZ8=; b=foTWl8UnxicgWzPaKoqQp2kZOuC8GXri9iVIQCf183B/1ic3Rt7NY5GdpsbB9G8mLKFrH1Hcb5YkNcwSi1PkF/BG6JgDovruxo7ARDIIMgDkXtcTACF5d5mzHlCE1sviN47N77bA+29SsyOPjGtgG9T//Ks3ZAO382taSP1x4Jg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615476002143373.6055450233579; Thu, 11 Mar 2021 07:20:02 -0800 (PST) Received: from localhost ([::1]:58064 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN6X-0000ai-06 for importer@patchew.org; Thu, 11 Mar 2021 10:20:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40546) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVV-0004MA-W4 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:46 -0500 Received: from mail-qv1-xf2c.google.com ([2607:f8b0:4864:20::f2c]:38713) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVR-000709-P3 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:44 -0500 Received: by mail-qv1-xf2c.google.com with SMTP id t5so2640783qvs.5 for ; Thu, 11 Mar 2021 06:41:41 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BvlzLp6n+uhbL6lJ6/SY8kpsbMrMSqUUMDmNT2MwoZ8=; b=d5A5eaI2z4s0UJKnwj8g3M/FF722KSD2V9Zv2GoRVbLLC+jOcMIMpOaO2ITsUkPpm8 hcH5oFAhxqxo4q7eiIXZqd7wTL5oDPoOj4rIy1ClPnjLRQhrOyWZFyGImQwuWh3Qw1G4 Y/DieB5l0VtHRDpep8zWhdVE3650LRnK03sxIQjhjtMBi2BUS4t9hF04nKTA3UFGkfY9 o5HUcqT1AGrgKTcUJUJRT74HjNv2rwALaFG5HCf+XJGb+Auf3+IAPcVgigLUxHxm6KJF iQ0O0bVyYogIrbOqptu9Ixv0nKDduP4kAKMy9CxqjGKGWN/cUSAyMVmkTezrmjH4EQPr pK7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BvlzLp6n+uhbL6lJ6/SY8kpsbMrMSqUUMDmNT2MwoZ8=; b=nHMM9xw7sqtgH9QyLSDRpKpmgsuKK8nzLAg0LhR8BVbdbW6iSAXdQPpIbAOvENgB6T lwKZp3McAA0SF2uuw4fOZfsdm8aG7ihRNAoLwbngUVHmaNbvdYE2bOTsIwd8+7Oc+vhi BIqF+jK7SiJdkYYaBMWModEf5DXZTUFTbE8Qg6pedaVgibCK5WYrPzoQnhsarUrnf6TX Wt2KxBkWzBue7RX0MQI0DlaUQGTyD0Bvp3tdw0QYJzvfujq3HNgLdYSqcBPcS9MI9g+b z71if36am/+VVtjUhOETffVcE35V/gT91sZaViCz50GCbTMu9b6AxlEwVR6K+ypYYtl+ 7wsw== X-Gm-Message-State: AOAM531Hh/qnz/xu16t/zzVTeJXGP+XmyxiEZ8ckaak/Y7chpbyDluYI 4DPvKcP9S+icHDlYI6DEyMU+LdEY0GSfVNio X-Google-Smtp-Source: ABdhPJxSOWx3nAsdYipJhRH+5gHAVlILlQu0GnQdzwCQAmp8iMaOEaISdpgUD35KstslnBbkPHp1bw== X-Received: by 2002:a0c:a954:: with SMTP id z20mr7764934qva.29.1615473700669; Thu, 11 Mar 2021 06:41:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 53/57] tcg/tci: Implement add2, sub2 Date: Thu, 11 Mar 2021 08:39:54 -0600 Message-Id: <20210311143958.562625-54-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2c; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" We already had the 32-bit versions for a 32-bit host; expand this to 64-bit hosts as well. The 64-bit opcodes are new. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci/tcg-target.h | 8 ++++---- tcg/tci.c | 40 ++++++++++++++++++++++++++-------------- tcg/tci/tcg-target.c.inc | 15 ++++++++------- 3 files changed, 38 insertions(+), 25 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 71a44bbfb0..515b3c7a56 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -121,11 +121,11 @@ #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_muls2_i64 1 -#define TCG_TARGET_HAS_add2_i32 0 -#define TCG_TARGET_HAS_sub2_i32 0 +#define TCG_TARGET_HAS_add2_i32 1 +#define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_mulu2_i32 1 -#define TCG_TARGET_HAS_add2_i64 0 -#define TCG_TARGET_HAS_sub2_i64 0 +#define TCG_TARGET_HAS_add2_i64 1 +#define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_mulu2_i64 1 #define TCG_TARGET_HAS_muluh_i64 0 #define TCG_TARGET_HAS_mulsh_i64 0 diff --git a/tcg/tci.c b/tcg/tci.c index d76b9f5798..0240d850cf 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -189,7 +189,6 @@ static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, = TCGReg *r1, *c5 =3D extract32(insn, 28, 4); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 static void tci_args_rrrrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGReg *r5) { @@ -200,7 +199,6 @@ static void tci_args_rrrrrr(uint32_t insn, TCGReg *r0, = TCGReg *r1, *r4 =3D extract32(insn, 24, 4); *r5 =3D extract32(insn, 28, 4); } -#endif =20 static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition) { @@ -351,17 +349,14 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, for (;;) { uint32_t insn; TCGOpcode opc; - TCGReg r0, r1, r2, r3, r4; + TCGReg r0, r1, r2, r3, r4, r5; tcg_target_ulong t1; TCGCond condition; target_ulong taddr; uint8_t pos, len; uint32_t tmp32; uint64_t tmp64; -#if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r5; uint64_t T1, T2; -#endif TCGMemOpIdx oi; int32_t ofs; void *ptr; @@ -655,20 +650,22 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, tb_ptr =3D ptr; } break; -#if TCG_TARGET_REG_BITS =3D=3D 32 +#if TCG_TARGET_REG_BITS =3D=3D 32 || TCG_TARGET_HAS_add2_i32 case INDEX_op_add2_i32: tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); T1 =3D tci_uint64(regs[r3], regs[r2]); T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 + T2); break; +#endif +#if TCG_TARGET_REG_BITS =3D=3D 32 || TCG_TARGET_HAS_sub2_i32 case INDEX_op_sub2_i32: tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); T1 =3D tci_uint64(regs[r3], regs[r2]); T2 =3D tci_uint64(regs[r5], regs[r4]); tci_write_reg64(regs, r1, r0, T1 - T2); break; -#endif /* TCG_TARGET_REG_BITS =3D=3D 32 */ +#endif #if TCG_TARGET_HAS_mulu2_i32 case INDEX_op_mulu2_i32: tci_args_rrrr(insn, &r0, &r1, &r2, &r3); @@ -798,6 +795,24 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, muls64(®s[r0], ®s[r1], regs[r2], regs[r3]); break; #endif +#if TCG_TARGET_HAS_add2_i64 + case INDEX_op_add2_i64: + tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); + T1 =3D regs[r2] + regs[r4]; + T2 =3D regs[r3] + regs[r5] + (T1 < regs[r2]); + regs[r0] =3D T1; + regs[r1] =3D T2; + break; +#endif +#if TCG_TARGET_HAS_add2_i64 + case INDEX_op_sub2_i64: + tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); + T1 =3D regs[r2] - regs[r4]; + T2 =3D regs[r3] - regs[r5] - (regs[r2] < regs[r4]); + regs[r0] =3D T1; + regs[r1] =3D T2; + break; +#endif =20 /* Shift/rotate operations (64 bit). */ =20 @@ -1114,10 +1129,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *i= nfo) const char *op_name; uint32_t insn; TCGOpcode op; - TCGReg r0, r1, r2, r3, r4; -#if TCG_TARGET_REG_BITS =3D=3D 32 - TCGReg r5; -#endif + TCGReg r0, r1, r2, r3, r4, r5; tcg_target_ulong i1; int32_t s2; TCGCond c; @@ -1315,15 +1327,15 @@ int print_insn_tci(bfd_vma addr, disassemble_info *= info) str_r(r2), str_r(r3)); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_add2_i32: + case INDEX_op_add2_i64: case INDEX_op_sub2_i32: + case INDEX_op_sub2_i64: tci_args_rrrrrr(insn, &r0, &r1, &r2, &r3, &r4, &r5); info->fprintf_func(info->stream, "%-12s %s,%s,%s,%s,%s,%s", op_name, str_r(r0), str_r(r1), str_r(r2), str_r(r3), str_r(r4), str_r(r5)); break; -#endif =20 case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index eb48633fba..9b2e2c32a1 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -134,11 +134,13 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpc= ode op) case INDEX_op_brcond_i64: return C_O0_I2(r, r); =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 - /* TODO: Support R, R, R, R, RI, RI? Will it be faster? */ case INDEX_op_add2_i32: + case INDEX_op_add2_i64: case INDEX_op_sub2_i32: + case INDEX_op_sub2_i64: return C_O2_I4(r, r, r, r, r, r); + +#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_brcond2_i32: return C_O0_I4(r, r, r, r); #endif @@ -467,7 +469,6 @@ static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode = op, tcg_out32(s, insn); } =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode op, TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4, TCGReg r5) @@ -483,7 +484,6 @@ static void tcg_out_op_rrrrrr(TCGContext *s, TCGOpcode = op, insn =3D deposit32(insn, 28, 4, r5); tcg_out32(s, insn); } -#endif =20 static void tcg_out_ldst(TCGContext *s, TCGOpcode op, TCGReg val, TCGReg base, intptr_t offset) @@ -719,12 +719,13 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, = const TCGArg *args, tcg_out_op_rr(s, opc, args[0], args[1]); break; =20 -#if TCG_TARGET_REG_BITS =3D=3D 32 - case INDEX_op_add2_i32: - case INDEX_op_sub2_i32: + CASE_32_64(add2) + CASE_32_64(sub2) tcg_out_op_rrrrrr(s, opc, args[0], args[1], args[2], args[3], args[4], args[5]); break; + +#if TCG_TARGET_REG_BITS =3D=3D 32 case INDEX_op_brcond2_i32: tcg_out_op_rrrrrc(s, INDEX_op_setcond2_i32, TCG_REG_TMP, args[0], args[1], args[2], args[3], args[4]); --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475199; cv=none; d=zohomail.com; s=zohoarc; b=aiSTMGWeFglPk2yWsFDU7FjCn/89Pt0JZ8J/+ADwPeWDMSHju6H3XlTfvwxT1dvRR225VXli+6mcjTn0Qkei/b4rRYda1dGrzHYghJ0Bh2xHhfheWQDaU1r79+VbzcocEYj0ir1VjgueqmTjYeKeMQulqkeuziKRLelDhyA7NXY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475199; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Ao4OKRpDcfbemUwRIlrAeEvX8kliF+Y+aAzUNEwCXa8=; b=Ne8FMPvkU/VaX5BiXPVMtNrwWM6bH/Yeq9jk4TPLpAnlQibQYdo7RqXeUYakQQcVKwpo58yc7ZiKVvlX3FB7ecSQYn0XnkWrOp//uzy5ijdySMNnP7x6NqCnWFKXnSGD914Pe4INDUwBUabVzmXAY1OrkToxtHLXumaXYgH5QAE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475199482891.4488873206801; Thu, 11 Mar 2021 07:06:39 -0800 (PST) Received: from localhost ([::1]:42606 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMta-00076U-D2 for importer@patchew.org; Thu, 11 Mar 2021 10:06:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40604) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVX-0004QX-Cq for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:48 -0500 Received: from mail-qv1-xf2f.google.com ([2607:f8b0:4864:20::f2f]:38716) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVT-00070W-1K for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:47 -0500 Received: by mail-qv1-xf2f.google.com with SMTP id t5so2640825qvs.5 for ; Thu, 11 Mar 2021 06:41:42 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ao4OKRpDcfbemUwRIlrAeEvX8kliF+Y+aAzUNEwCXa8=; b=mdbRQBwY96147loXb1jY9MBnnn9ld4wQpyFKGxG7tKoMbrwyPK+vx5eDqWM2lew64E UV6qJ/Pfd293JBTCuD4BmlimPV7HPvyJQd9SHrDNSv58cCrZ9dJmNoFkDDB4ytaesKUD 15wsKtcZXnLIzHL3N564r7fPk0k5x0s3LVLqed1rINipxseVrJ//bwhJF1DwkoCQWBFu mgUuxCFjb7xhxHMim2XE3POEK0Fha+ogYk4cxRP5PzE3yjrwWK4Jtav3GJQ4ZYTPDbPc INgVezaUQ6hKs40IQqO9ysHXIUn+9dJafFZgbsuEPliFNPgiwMduTlWRU/K6Q+afc1Z+ 6PXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ao4OKRpDcfbemUwRIlrAeEvX8kliF+Y+aAzUNEwCXa8=; b=B7MzWqWPWUKv2UEv+hIEn2Q2+8oB1WklOytTRHqp+qGLMTjCb4L1YM3a49dZYCuYNy HnIhi3NVo9oYVKsn2TWfuGEfYAwhkmLGYTuo8uezKIjOXh2wdV58eHb7Jn8aYDFytpaR 2UdKKuI/dASblLZX6bILPgwO8wYg5NKDU5Ttu1KSSRYK6cUm0YtLvr4luflpwQX8DYr8 /pKiXdMYWKFE6VfkqVSdO8Hk911E8hXYCHG6W5+WXoy20qjnYqx+8urjFAX67hHsvBoP YGCqB4xNnkDaDBP8yCZfhxUVLcn69EsrLS7A9Pk+YrCMDX7mQkbEFRRgXCH/k0OQL/fN Snhw== X-Gm-Message-State: AOAM532PnZkpavUsfOcunMgyGBG+T7ZjtRqeEUs+TPyxIiOS/XsjMtVv xN2tk5Nm4OcfVqob5MZjMrSjILqnc8+5i3NF X-Google-Smtp-Source: ABdhPJy+g6wJRxVzk4+9KM11t+RJ7PZubFqzFbQAxQ40GSJsCJySxwrGxspGO/DGuk+BvfhH+XmXyw== X-Received: by 2002:a05:6214:1c47:: with SMTP id if7mr7932154qvb.50.1615473702094; Thu, 11 Mar 2021 06:41:42 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 54/57] tcg/tci: Split out tci_qemu_ld, tci_qemu_st Date: Thu, 11 Mar 2021 08:39:55 -0600 Message-Id: <20210311143958.562625-55-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f2f; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Expand the single-use macros into the new functions. Use cpu_ldsb_mmuidx_ra and cpu_ldsw_le_mmuidx_ra so that the trace event receives the correct sign flag. Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tci.c | 215 +++++++++++++++++++----------------------------------- 1 file changed, 75 insertions(+), 140 deletions(-) diff --git a/tcg/tci.c b/tcg/tci.c index 0240d850cf..84bef41af3 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -284,34 +284,77 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, T= CGCond condition) return result; } =20 -#define qemu_ld_ub \ - cpu_ldub_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leuw \ - cpu_lduw_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leul \ - cpu_ldl_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leq \ - cpu_ldq_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beuw \ - cpu_lduw_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beul \ - cpu_ldl_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beq \ - cpu_ldq_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_b(X) \ - cpu_stb_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_lew(X) \ - cpu_stw_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_lel(X) \ - cpu_stl_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_leq(X) \ - cpu_stq_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_bew(X) \ - cpu_stw_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_bel(X) \ - cpu_stl_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_beq(X) \ - cpu_stq_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr, + TCGMemOpIdx oi, const void *tb_ptr) +{ + uintptr_t ra =3D (uintptr_t)tb_ptr; + int mmu_idx =3D get_mmuidx(oi); + MemOp mop =3D get_memop(oi); + + switch (mop & (MO_BSWAP | MO_SSIZE)) { + case MO_UB: + return cpu_ldub_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_SB: + return cpu_ldsb_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_LEUW: + return cpu_lduw_le_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_BEUW: + return cpu_lduw_be_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_LESW: + return cpu_ldsw_le_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_BESW: + return cpu_ldsw_be_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_LEUL: + return cpu_ldl_le_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_BEUL: + return cpu_ldl_be_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_LESL: + return (int32_t)cpu_ldl_le_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_BESL: + return (int32_t)cpu_ldl_be_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_LEQ: + return cpu_ldq_le_mmuidx_ra(env, taddr, mmu_idx, ra); + case MO_BEQ: + return cpu_ldq_be_mmuidx_ra(env, taddr, mmu_idx, ra); + + default: + g_assert_not_reached(); + } +} + +static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t va= l, + TCGMemOpIdx oi, const void *tb_ptr) +{ + uintptr_t ra =3D (uintptr_t)tb_ptr; + int mmu_idx =3D get_mmuidx(oi); + MemOp mop =3D get_memop(oi); + + switch (mop & (MO_BSWAP | MO_SIZE)) { + case MO_UB: + cpu_stb_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_LEUW: + cpu_stw_le_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_BEUW: + cpu_stw_be_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_LEUL: + cpu_stl_le_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_BEUL: + cpu_stl_be_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_LEQ: + cpu_stq_le_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + case MO_BEQ: + cpu_stq_be_mmuidx_ra(env, taddr, val, mmu_idx, ra); + break; + default: + g_assert_not_reached(); + } +} =20 #if TCG_TARGET_REG_BITS =3D=3D 64 # define CASE_32_64(x) \ @@ -908,34 +951,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, tci_args_rrrm(insn, &r0, &r1, &r2, &oi); taddr =3D tci_uint64(regs[r2], regs[r1]); } - switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { - case MO_UB: - tmp32 =3D qemu_ld_ub; - break; - case MO_SB: - tmp32 =3D (int8_t)qemu_ld_ub; - break; - case MO_LEUW: - tmp32 =3D qemu_ld_leuw; - break; - case MO_LESW: - tmp32 =3D (int16_t)qemu_ld_leuw; - break; - case MO_LEUL: - tmp32 =3D qemu_ld_leul; - break; - case MO_BEUW: - tmp32 =3D qemu_ld_beuw; - break; - case MO_BESW: - tmp32 =3D (int16_t)qemu_ld_beuw; - break; - case MO_BEUL: - tmp32 =3D qemu_ld_beul; - break; - default: - g_assert_not_reached(); - } + tmp32 =3D tci_qemu_ld(env, taddr, oi, tb_ptr); regs[r0] =3D tmp32; break; =20 @@ -951,46 +967,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSta= te *env, taddr =3D tci_uint64(regs[r3], regs[r2]); oi =3D regs[r4]; } - switch (get_memop(oi) & (MO_BSWAP | MO_SSIZE)) { - case MO_UB: - tmp64 =3D qemu_ld_ub; - break; - case MO_SB: - tmp64 =3D (int8_t)qemu_ld_ub; - break; - case MO_LEUW: - tmp64 =3D qemu_ld_leuw; - break; - case MO_LESW: - tmp64 =3D (int16_t)qemu_ld_leuw; - break; - case MO_LEUL: - tmp64 =3D qemu_ld_leul; - break; - case MO_LESL: - tmp64 =3D (int32_t)qemu_ld_leul; - break; - case MO_LEQ: - tmp64 =3D qemu_ld_leq; - break; - case MO_BEUW: - tmp64 =3D qemu_ld_beuw; - break; - case MO_BESW: - tmp64 =3D (int16_t)qemu_ld_beuw; - break; - case MO_BEUL: - tmp64 =3D qemu_ld_beul; - break; - case MO_BESL: - tmp64 =3D (int32_t)qemu_ld_beul; - break; - case MO_BEQ: - tmp64 =3D qemu_ld_beq; - break; - default: - g_assert_not_reached(); - } + tmp64 =3D tci_qemu_ld(env, taddr, oi, tb_ptr); if (TCG_TARGET_REG_BITS =3D=3D 32) { tci_write_reg64(regs, r1, r0, tmp64); } else { @@ -1007,25 +984,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchSt= ate *env, taddr =3D tci_uint64(regs[r2], regs[r1]); } tmp32 =3D regs[r0]; - switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { - case MO_UB: - qemu_st_b(tmp32); - break; - case MO_LEUW: - qemu_st_lew(tmp32); - break; - case MO_LEUL: - qemu_st_lel(tmp32); - break; - case MO_BEUW: - qemu_st_bew(tmp32); - break; - case MO_BEUL: - qemu_st_bel(tmp32); - break; - default: - g_assert_not_reached(); - } + tci_qemu_st(env, taddr, tmp32, oi, tb_ptr); break; =20 case INDEX_op_qemu_st_i64: @@ -1044,31 +1003,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchS= tate *env, } tmp64 =3D tci_uint64(regs[r1], regs[r0]); } - switch (get_memop(oi) & (MO_BSWAP | MO_SIZE)) { - case MO_UB: - qemu_st_b(tmp64); - break; - case MO_LEUW: - qemu_st_lew(tmp64); - break; - case MO_LEUL: - qemu_st_lel(tmp64); - break; - case MO_LEQ: - qemu_st_leq(tmp64); - break; - case MO_BEUW: - qemu_st_bew(tmp64); - break; - case MO_BEUL: - qemu_st_bel(tmp64); - break; - case MO_BEQ: - qemu_st_beq(tmp64); - break; - default: - g_assert_not_reached(); - } + tci_qemu_st(env, taddr, tmp64, oi, tb_ptr); break; =20 case INDEX_op_mb: --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475838; cv=none; d=zohomail.com; s=zohoarc; b=RFUDTQ7k8EkHQ7UQq5T/0pGRUVf17uOcslM2pJSfKDzLNH9H0bCTtEe3/4lAIKL52R+57iz+psvPd/QDknIsB0EiBvaifyIF2c4TUiJB7zAQWhIZpjgC+7w4RqLvXtjD7ZY4F1sKsFbhgXkL5HU2nzqJany504U3sk1lspoZIv8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475838; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=EtFk4wSnOwjuUh6hagaoKS0TCdHIiNtFe13FGIUqDnw=; b=X9YfoO2z69JWF6zXvYZUWBnMR7Z2tCv9Ms0zqhC9Hl9PNA8g3uwoelgAk55M5xTEpKugk049ZAByOjoTT9MMiaefYyvs+S1D7OKFVvhUVYwcURo5lndZhEOraz4sEhkHjLgyTBXeyB0dZnidmrNRjkRy64Bp5MAVj19fW1vLq28= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161547583837949.03951977205713; Thu, 11 Mar 2021 07:17:18 -0800 (PST) Received: from localhost ([::1]:48510 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN3t-00051p-Fs for importer@patchew.org; Thu, 11 Mar 2021 10:17:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40662) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVe-0004Sf-RQ for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:56 -0500 Received: from mail-qt1-x82e.google.com ([2607:f8b0:4864:20::82e]:36440) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVU-000719-60 for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:54 -0500 Received: by mail-qt1-x82e.google.com with SMTP id 6so1263487qty.3 for ; Thu, 11 Mar 2021 06:41:43 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EtFk4wSnOwjuUh6hagaoKS0TCdHIiNtFe13FGIUqDnw=; b=qegANKqnPL3vmUImMmOUkpCnyCrG4ZA4S0RJpMy3bzJ10QpDUTaA/55RA2LxognTVu YbBaOhZ0Vfo1gnY7VlmyV6Y9m1GbQj0IOPpTm0AwK5jG85IZp5og8nYAeH+EC6MRHeSF yb3yEeeGlP7PBDi9uagYIdrjjDq2bxmvP5SX7sd1YwHxnop30VTY+ZAcO5YUX231YUoE sRJw2ugJAypwbAnPsAjOpz+pHpSZRzFib/KSId6NqyDsT0GUOw05cE4dEl6SSYUSVZs3 0gY7fSqpPH1A1KC/SVsrfw+/Zzhhv1+1uh+hb2uPNFif3b04bZ7Os2y8DvfYpE2ikQyK TY7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EtFk4wSnOwjuUh6hagaoKS0TCdHIiNtFe13FGIUqDnw=; b=XPG57gs7RpY2JUBK5T66P+b8EygnW/w36I8INfdI4aVa4Fg+3S5LoNDyDrsqHofAMn JQAhW6npDF019SB005nRv4pmjTrGuCPARNqzA8bJe7x9QWyPnn90OoVA3vRBu2whk3Wc UkUWB+KBHimBCMO57lphoKpn7vC53dSBMCpIODcXQJpWdHvqxAF1G5uiaNUyc1hJ8axW AKmRVKuCvn9Y46CdhNfXIUP3MuqKf/PXhO2yhMhesAPX/Sf7kJgUedIn7rsl8ghvhCcJ 7nhhusrwbdz9Zwbm+PpUuSbnjR4QaB8kTJ1+u3r2ZQqrJnW37f+Sp/Ry6BBKFg4Hjnuj HXqQ== X-Gm-Message-State: AOAM531cehj+Rf9N14mX8JQAJniwxYezRf9/sdLfd1gOZGruC5VWzaOZ 1KIm/GIxmIKn+omkkFlo2G8VwqVuq3cUIaSR X-Google-Smtp-Source: ABdhPJyN2+T3nTBk+3D+Qpyaykq3GH8HciuvZgKTDKMoV5jh0BU4lA2Lxuw8LsO1jC1f9H9zZhKSeA== X-Received: by 2002:ac8:3a41:: with SMTP id w59mr7776294qte.8.1615473703228; Thu, 11 Mar 2021 06:41:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 55/57] tests/tcg: Increase timeout for TCI Date: Thu, 11 Mar 2021 08:39:56 -0600 Message-Id: <20210311143958.562625-56-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::82e; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x82e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, Thomas Huth , alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The longest test at the moment seems to be a (slower) aarch64 host, for which test-mmap takes 64 seconds. Reviewed-by: Thomas Huth Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- configure | 3 +++ tests/tcg/Makefile.target | 6 ++++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/configure b/configure index 34fccaa2ba..5ce5b5b136 100755 --- a/configure +++ b/configure @@ -5792,6 +5792,9 @@ fi if test "$optreset" =3D "yes" ; then echo "HAVE_OPTRESET=3Dy" >> $config_host_mak fi +if test "$tcg" =3D "enabled" -a "$tcg_interpreter" =3D "true" ; then + echo "CONFIG_TCG_INTERPRETER=3Dy" >> $config_host_mak +fi if test "$fdatasync" =3D "yes" ; then echo "CONFIG_FDATASYNC=3Dy" >> $config_host_mak fi diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 24d75a5801..fa5813192a 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -77,8 +77,10 @@ LDFLAGS=3D QEMU_OPTS=3D =20 =20 -# If TCG debugging is enabled things are a lot slower -ifeq ($(CONFIG_DEBUG_TCG),y) +# If TCG debugging, or TCI is enabled things are a lot slower +ifneq ($(CONFIG_TCG_INTERPRETER),) +TIMEOUT=3D90 +else ifneq ($(CONFIG_DEBUG_TCG),) TIMEOUT=3D60 else TIMEOUT=3D15 --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615476142; cv=none; d=zohomail.com; s=zohoarc; b=kIaOyK6aLbEKQ6jaiAcg1JC/+cIdYJ73h+kkT2Of5hPPyuJOCdviDeOFKoUkbaInsvyznQFMS0eb/bZ856m4pYpT5sqvXhYMAhjqWLYKwViackU6Cnbvhd5iCtbuDgvRFoak8MqAJxLveeJ+otettIAlCVjB/ykGEGk/DP8AG7o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615476142; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LH70RiyHzxdek5Q28EGrMxuIKiWy1oDfjvApqs9uX0o=; b=QhLP3LyaQXs2kkKeyPGrtRiQ7PIZVGR+PO1qpifuAv6RjzU8/mTOnCDo5pBeDLb5P1QEPo8o6zioH1S6aBS5eiSYi3abqjIUUEACTjTAVGWLwd/NF14dgsj0C3f+Rbhb2/qosLGIxC5EW1CCW1oqA7lxQDsx6F7BfRuqXUx2Qfw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615476142564988.3743050417269; Thu, 11 Mar 2021 07:22:22 -0800 (PST) Received: from localhost ([::1]:38546 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKN8n-0004Nm-9G for importer@patchew.org; Thu, 11 Mar 2021 10:22:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40652) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVb-0004RZ-4K for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:52 -0500 Received: from mail-qv1-xf34.google.com ([2607:f8b0:4864:20::f34]:46722) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVV-00071q-FZ for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:50 -0500 Received: by mail-qv1-xf34.google.com with SMTP id j17so2639311qvo.13 for ; Thu, 11 Mar 2021 06:41:44 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LH70RiyHzxdek5Q28EGrMxuIKiWy1oDfjvApqs9uX0o=; b=xEBWWNapVaqd1o/zyqW0r+61BPvt8LidmifM2j+6j+ysMZ/WPPHEOM5Ln3X8YG+rFl TiedAt/dOC+FczHPAseudQv0TT521EuazRTnwmTAXFKKaA6Z3wlF1B3C3GKqr4AyWa+5 1O5LCZNeVZTjcAi0oSmzYM9C/nxr81BRdGnMTSYR/REeoY7AFLL1RN7Vtc45QQ1y8eRS ibyBThvIDYJWwpVuPT5dt+P47/z+4osHLNNI2RwoTvQpHXPY3rlVSgkdZUznG0i3Qm6R ewf6xmwidv1OYAXceF0NXdUaK4GBq4ZQ2bOvVwZNHqj1hDvsRIohxjzSatuxGRYze1IG 45+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LH70RiyHzxdek5Q28EGrMxuIKiWy1oDfjvApqs9uX0o=; b=uVZ11wKj3T2iz+nsjB2HNOH3ecVOw82jBYSTgzzG5XYfI6PJHXUpv4EOweTFPfqNKu WrS9pFmmbJ+gl7rkXO1AMPMABfIi8XZciykxSd07KWiv8bzCBLkthtIPt6churUaTj+c 8mftXhBMaA35MNXs5KrYnigyxWUqPVjVL56+wTjfIo6Ft9K/y0XMtoRhL7WASa9cH/fB kcMvDtH/8B/9LHRHH2leIxUyYyTL4ZRMR3IuMYiNrijib741dx0KWTJp3Cg/wxyXGvsi QygouXa4T4pU6vg5ZrpMgYcRcU5ytHP6tc+dQ7PpSWX+hDlBfZlIGfIDMjHYVYGGkd1n E9Mw== X-Gm-Message-State: AOAM532F/VT5ZoMslBxhy77+/sJ3jpUc4sUPvLd7QtkeOIjfCigF9wLd IswSVoKlw/Q6zwebxrCXe08k69NOpdkM4YT9 X-Google-Smtp-Source: ABdhPJzO4zlpxjwdbfGiutO/tAsWSq41uccp/Ju72G28l/4wsGnmgBm1+DauTnonRy21KarDkN7m9Q== X-Received: by 2002:ad4:4745:: with SMTP id c5mr8090071qvx.39.1615473704360; Thu, 11 Mar 2021 06:41:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 56/57] gitlab: Rename ACCEL_CONFIGURE_OPTS to EXTRA_CONFIGURE_OPTS Date: Thu, 11 Mar 2021 08:39:57 -0600 Message-Id: <20210311143958.562625-57-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::f34; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf34.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, Thomas Huth , alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Suggested-by: Thomas Huth Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- .gitlab-ci.d/crossbuilds.yml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml index d5098c986b..d573e431e5 100644 --- a/.gitlab-ci.d/crossbuilds.yml +++ b/.gitlab-ci.d/crossbuilds.yml @@ -16,7 +16,7 @@ # # Set the $ACCEL variable to select the specific accelerator (default to # KVM), and set extra options (such disabling other accelerators) via the -# $ACCEL_CONFIGURE_OPTS variable. +# $EXTRA_CONFIGURE_OPTS variable. .cross_accel_build_job: stage: build image: $CI_REGISTRY_IMAGE/qemu/$IMAGE:latest @@ -26,7 +26,7 @@ - cd build - PKG_CONFIG_PATH=3D$PKG_CONFIG_PATH ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-tools - --enable-${ACCEL:-kvm} $ACCEL_CONFIGURE_OPTS + --enable-${ACCEL:-kvm} $EXTRA_CONFIGURE_OPTS - make -j$(expr $(nproc) + 1) all check-build =20 .cross_user_build_job: @@ -173,7 +173,7 @@ cross-s390x-kvm-only: job: s390x-debian-cross-container variables: IMAGE: debian-s390x-cross - ACCEL_CONFIGURE_OPTS: --disable-tcg + EXTRA_CONFIGURE_OPTS: --disable-tcg =20 cross-win32-system: extends: .cross_system_build_job @@ -196,7 +196,7 @@ cross-amd64-xen-only: variables: IMAGE: debian-amd64-cross ACCEL: xen - ACCEL_CONFIGURE_OPTS: --disable-tcg --disable-kvm + EXTRA_CONFIGURE_OPTS: --disable-tcg --disable-kvm =20 cross-arm64-xen-only: extends: .cross_accel_build_job @@ -205,4 +205,4 @@ cross-arm64-xen-only: variables: IMAGE: debian-arm64-cross ACCEL: xen - ACCEL_CONFIGURE_OPTS: --disable-tcg --disable-kvm + EXTRA_CONFIGURE_OPTS: --disable-tcg --disable-kvm --=20 2.25.1 From nobody Sun May 19 07:31:49 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615475315; cv=none; d=zohomail.com; s=zohoarc; b=hWUMHP2emTSxmMoz6xETUZbNcg9uRwIRMVdtmwzDPOYrt/Q9iL8yjrmTc/5S9EMmyz0KynPnV+9AXAkvYUbIGsZWVG2+BiCi8nrRLdwOPrRmLeM1oQ8OT3FRFEo4NTs+3+DHiwEUqQunC18jL1jO4e5qJyCQqYvNWX8B4gj0eno= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615475315; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=mIbW7tk8kzPtUH9Z3cL5eHd0L1fqZoXvXXJa8VSBNBo=; b=mTgTRzbf1GVCKOYgaF1By088Rlvcffh0EMsebj1lnJSI2Bf7hbm36PuHksnbZBwgfb6H/gPOHq454HpjW6xJ+0V/lHNBaboTu9zVrc6o4Fcj6M4nWiglJAR1w0GH4+9a9kX6mRSQVgKaYuRGIN+eZsfKxV/MR4PvGdkGNp3Fpvo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615475315626634.2283615432282; Thu, 11 Mar 2021 07:08:35 -0800 (PST) Received: from localhost ([::1]:51246 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKMvS-0002DJ-Dc for importer@patchew.org; Thu, 11 Mar 2021 10:08:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKMVi-0004Tr-TP for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:42:00 -0500 Received: from mail-qt1-x834.google.com ([2607:f8b0:4864:20::834]:40792) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lKMVW-00073D-Bl for qemu-devel@nongnu.org; Thu, 11 Mar 2021 09:41:58 -0500 Received: by mail-qt1-x834.google.com with SMTP id r14so1265921qtt.7 for ; Thu, 11 Mar 2021 06:41:45 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-144.totalplay.net. [187.189.51.144]) by smtp.gmail.com with ESMTPSA id g14sm1962421qkm.98.2021.03.11.06.41.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 06:41:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mIbW7tk8kzPtUH9Z3cL5eHd0L1fqZoXvXXJa8VSBNBo=; b=uyPzs3WJIEtWsnJCLDudzCIZd3ffQv7vP7+YxAfmppXFmWpqoOVj/1x9YQEMsGtSUy 2kq/j1utYzALm/zU9oxp1uI+RGTr8HjpwB+rjuZ9ozlNfMhzTk4BEDX3zb3qzEMRA5Bo UDuWTfd9m/kmILcGZtu4Cpq5fLwDVVnvuH43ID9f1fuyaGG3VjBeDrQWhcNAxLP0WgFc 5WJbXVQ7OHNKZBeka4FPQ4cqZpHZFmGO//WROTPMHa5VOsNu1FjLlvQh02lhDa1F8YAt dQxdElze5HGCUzwdcVyw7k6iOGWfeYYwi1cvpbU6kREOMx0HeNmhXbWUA6cO9mWfrlSO ONrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mIbW7tk8kzPtUH9Z3cL5eHd0L1fqZoXvXXJa8VSBNBo=; b=sfAuUUeNQJ1SCVPMZ02N8r2T5aW1sq8tbR3CLb5PmXl3oB8EQ3Wpgto41MtUdlJ7qV 6NOQvWDDiS6Bw6H4QbWVeHMuxXFh6NpLZL5GF+rMpu4WTCR8qhNkg/UJDq/Hu/gDPnWy aq7uewPUI5f+jYtR0lLBgWcCQd6AFZQPdKKaFz2JSb7a8oAaOulmRZ2lzCLGt4IppJin nq6aBfC2Uezbo+L3mgWbttIsL8eVKReeQ9112vjWAPacJR+1x7Ak2X/3+DUIY6C7Ogbi 9g6SxwtMQtWLO3KaCq5HqExPv/DOEWG1AzT/nEI8fGPQovKkdYLl/fyorWfNLQbrXQ3S j/lw== X-Gm-Message-State: AOAM533XmDpqJMj2ACGFP5667KNmRjKrSDUvbbesgECAlIzpdEJkU66k zDiTULbp9gu5rjkAAzJp9WdVUsFJAqOC6QuU X-Google-Smtp-Source: ABdhPJwHJrHl8TVlzolNHqrbhyzYHZeO5DiZvPnaPqQwb758sUL9GIqFzIlpUiWSxr4ZvW/QMimO0w== X-Received: by 2002:aed:2ce3:: with SMTP id g90mr7600377qtd.308.1615473705455; Thu, 11 Mar 2021 06:41:45 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v5 57/57] gitlab: Enable cross-i386 builds of TCI Date: Thu, 11 Mar 2021 08:39:58 -0600 Message-Id: <20210311143958.562625-58-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311143958.562625-1-richard.henderson@linaro.org> References: <20210311143958.562625-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::834; envelope-from=richard.henderson@linaro.org; helo=mail-qt1-x834.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sw@weilnetz.de, Thomas Huth , alex.bennee@linaro.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We're currently only testing TCI with a 64-bit host -- also test with a 32-bit host. Enable a selection of softmmu and user-only targets, 32-bit LE, 64-bit LE, 32-bit BE, as there are ifdefs for each. Acked-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 --- .gitlab-ci.d/crossbuilds.yml | 11 ++++++++++- tests/docker/dockerfiles/fedora-i386-cross.docker | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml index d573e431e5..099f2ef2e5 100644 --- a/.gitlab-ci.d/crossbuilds.yml +++ b/.gitlab-ci.d/crossbuilds.yml @@ -27,7 +27,7 @@ - PKG_CONFIG_PATH=3D$PKG_CONFIG_PATH ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-tools --enable-${ACCEL:-kvm} $EXTRA_CONFIGURE_OPTS - - make -j$(expr $(nproc) + 1) all check-build + - make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS =20 .cross_user_build_job: stage: build @@ -97,6 +97,15 @@ cross-i386-user: IMAGE: fedora-i386-cross MAKE_CHECK_ARGS: check =20 +cross-i386-tci: + extends: .cross_accel_build_job + timeout: 60m + variables: + IMAGE: fedora-i386-cross + ACCEL: tcg-interpreter + EXTRA_CONFIGURE_OPTS: --target-list=3Di386-softmmu,i386-linux-user,aar= ch64-softmmu,aarch64-linux-user,ppc-softmmu,ppc-linux-user + MAKE_CHECK_ARGS: check check-tcg + cross-mips-system: extends: .cross_system_build_job needs: diff --git a/tests/docker/dockerfiles/fedora-i386-cross.docker b/tests/dock= er/dockerfiles/fedora-i386-cross.docker index 966072c08e..b620d7664d 100644 --- a/tests/docker/dockerfiles/fedora-i386-cross.docker +++ b/tests/docker/dockerfiles/fedora-i386-cross.docker @@ -5,6 +5,7 @@ ENV PACKAGES \ findutils \ gcc \ git \ + libffi-devel.i686 \ libtasn1-devel.i686 \ libzstd-devel.i686 \ make \ --=20 2.25.1