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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id x10sm23962ejd.69.2021.03.10.09.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395966; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LR/j1VN7s/QFD9E6lrCkzOBzVHMc/rhGkpQ4k1/cX1U=; b=XT6WgocUHx5kRNpXlEisr8rr/wyjjui5gJppb0SYE/PyqVRTiB4PKmgiNTcYsin4+7e3O4 gLuIVEmeIEGBG32+ldjikkvFOW4PFeh3N5OtDUf0PUK97uPJW5Vk+KTa9CeULgUGYM66Ae 7Sz+JeyYrrcwSqpo9pk69vtwK1oQErw= X-MC-Unique: C3fGns61Nk6O3KVaMZZNUw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LR/j1VN7s/QFD9E6lrCkzOBzVHMc/rhGkpQ4k1/cX1U=; b=i6/539NGNi8YQ1dZZYs1XH7gHhpsH8JO0pviqxX8XSSDkXwRKNn9lhIb/3tery8U90 jQW7zfn2tC1WlJmYFBWYgMNwBWhOLecsTxJCnvXwKULIhJfsFFOIXQ3Tr3DY2X4Od33q g9HRVxnfu/BNVjZ3fJDhoKfbILt7YH9tfmMVnLV/TdedXXRtPUbr/fl1fwvkixrQ+FXv QTJ+kuzOR7BoJvVe6jVjUGK1SkVt9Ht+c//vCbLQtmrx3P04+f7Z9eqA5dAevcYgobjQ fvsFotym36SW8VzOrYjW3E3V6VSn04Z8KGJdU96hSI6tpE0bw+8aTSTh2po1eD1o2v8G aymw== X-Gm-Message-State: AOAM532y1EucaoaefgLrq60G9CmW08LRP7Z5/XamVdEvRIZ8a6nR6yZp 7xt5opJbeAcGAhSdfjruckrASEros3CNGokjTn4+5buyGQx47SVwifnq1lyz3Ed8pSvQEFV8xU8 5XHtrWpjPsXPFiA== X-Received: by 2002:a17:907:7651:: with SMTP id kj17mr4688224ejc.127.1615395963319; Wed, 10 Mar 2021 09:06:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJxcgQ4k7EAo12NZMdHKfK0JyvmHm3LyG9gf53KUEjA1sdHOQq5GK6kh+fZZ1vaKTS7RKleplQ== X-Received: by 2002:a17:907:7651:: with SMTP id kj17mr4688202ejc.127.1615395963145; Wed, 10 Mar 2021 09:06:03 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 06/12] hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array Date: Wed, 10 Mar 2021 18:05:22 +0100 Message-Id: <20210310170528.1184868-7-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - When the timer expires and not in bypass mode - On a read access (on invalid command). - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. pflash_register_memory(rom_mode=3Dtrue) already sets the ROM device in "read array" mode (from I/O device to ROM one). Explicit that by renaming the function as pflash_mode_read_array(), adding a trace event and resetting wcycle. Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi02.c | 18 +++++++++--------- hw/block/trace-events | 1 + 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 897b7333222..2ba77a0171b 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -184,10 +184,13 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl) pfl->rom_mode =3D true; } =20 -static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode) +static void pflash_mode_read_array(PFlashCFI02 *pfl) { - memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode); - pfl->rom_mode =3D !!rom_mode; + trace_pflash_mode_read_array(); + pfl->cmd =3D 0x00; + pfl->wcycle =3D 0; + pfl->rom_mode =3D true; + memory_region_rom_device_set_romd(&pfl->orig_mem, true); } =20 static size_t pflash_regions_count(PFlashCFI02 *pfl) @@ -249,11 +252,10 @@ static void pflash_timer(void *opaque) toggle_dq7(pfl); if (pfl->bypass) { pfl->wcycle =3D 2; + pfl->cmd =3D 0; } else { - pflash_register_memory(pfl, 1); - pfl->wcycle =3D 0; + pflash_mode_read_array(pfl); } - pfl->cmd =3D 0; } =20 /* @@ -315,7 +317,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) /* Lazy reset to ROMD mode after a certain amount of read accesses */ if (!pfl->rom_mode && pfl->wcycle =3D=3D 0 && ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) { - pflash_register_memory(pfl, 1); + pflash_mode_read_array(pfl); } offset &=3D pfl->chip_len - 1; boff =3D offset & 0xFF; @@ -933,8 +935,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Erro= r **errp) sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); =20 timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); - pfl->wcycle =3D 0; - pfl->cmd =3D 0; pfl->status =3D 0; =20 pflash_cfi02_fill_cfi_table(pfl, nb_regions); diff --git a/hw/block/trace-events b/hw/block/trace-events index d32475c3989..f16d6e90cfd 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -7,6 +7,7 @@ fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%= 02x val 0x%02x" # pflash_cfi01.c # pflash_cfi02.c pflash_reset(void) "reset" +pflash_mode_read_array(void) "mode: read array" pflash_timer_expired(uint8_t cmd) "command 0x%02x done" pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd= , uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcy= cle:%u" pflash_io_write(uint64_t offset, unsigned size, uint32_t value, uint8_t wc= ycle) "offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u" --=20 2.26.2