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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id u15sm11548082eds.6.2021.03.10.09.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395988; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SwCwLAHcVK0o6cfVxU4Q/2p+2PaiP/5BkYG34ZdYu6g=; b=G2xZMz2FM6vj+HJSk+t0HgTC/u68was3hpqcBAqC18X49R6CyjEtoOHaplZXwZvHQUOE6w IMW3GBVVRPd4PSsjxlJ2ya0dSrvAvHeQvn0Dq60DXGKVx9z4rJ+PeHxxr+tH9f0a+6IE3O OjoEDw+I7u4id1XEK56nS58Q1GqqVKs= X-MC-Unique: MsBl-C4rNPuLo-ldAIdFlA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SwCwLAHcVK0o6cfVxU4Q/2p+2PaiP/5BkYG34ZdYu6g=; b=R00GWGCjKcR0rn9qhAM7oAue4yWgCpEZYxqs874i8TJ+X57walpzxsbw7TVPjkRgK6 ghlORbah+DBe6FHWF7qG35vmlzzlpAkU70ps2WyogqL7ou9fTXis3mklVp5NmKzcEArm ED8/zw4ctLzSx3Cavk17FE86ppZUlPHnSLuPDUacgm6bc5Cen5qdQGGnT3QtQi3HL619 lB9tkyxHkzyguDX8oB6bZsVm1/8j6ZTurXqJYYX0CLKmmfZx1dz/RYFC3VkehriQES8O sysngQhf3/zvsMzgPcjH1IUdM8QjkyOItk86yu3hd3N9C7l84ZAYxOF8I34L7EDyBlc1 bIxw== X-Gm-Message-State: AOAM533dpBHh8Vcfl5O7kRq/bV2ULxhYgvgbYj09xRE3DjWQ3rSP1fGf jAv0blftF4WFP5Ta2SguXIYH12WRQzqHiH3bfecM5fZauwPNKniqOndLKQ7BNvFrxX79hVsiI7n N7HxvxOSy8D1wpA== X-Received: by 2002:aa7:d1cd:: with SMTP id g13mr4373880edp.369.1615395984234; Wed, 10 Mar 2021 09:06:24 -0800 (PST) X-Google-Smtp-Source: ABdhPJx0VXK4siYttQLe5v1Q3B1ZvZUQi8D8bWKCpn5lNH+/u5cDGco8KuCHsiZI0obzZP1JGM0vOg== X-Received: by 2002:aa7:d1cd:: with SMTP id g13mr4373866edp.369.1615395984028; Wed, 10 Mar 2021 09:06:24 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf Subject: [PATCH v2 10/12] hw/block/pflash_cfi01: Extract pflash_mode_read_array() Date: Wed, 10 Mar 2021 18:05:26 +0100 Message-Id: <20210310170528.1184868-11-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - On a read access (on invalid command). - On a write access (on command failure, error, or explicitly asked) - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. Reviewed-by: Alistair Francis Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 40 +++++++++++++++++----------------------- 1 file changed, 17 insertions(+), 23 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 2618e00926d..32c9b289715 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -115,6 +115,19 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 +static void pflash_mode_read_array(PFlashCFI01 *pfl) +{ + trace_pflash_mode_read_array(); + /* + * The command 0x00 is not assigned by the CFI open standard, + * but QEMU historically uses it for the READ_ARRAY command (0xff). + */ + trace_pflash_mode_read_array(); + pfl->cmd =3D 0x00; + pfl->wcycle =3D 0; + memory_region_rom_device_set_romd(&pfl->mem, true); +} + /* * Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for @@ -283,12 +296,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr o= ffset, default: /* This should never happen : reset state & treat it as a read */ DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); - pfl->wcycle =3D 0; - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; + pflash_mode_read_array(pfl); /* fall through to read code */ case 0x00: /* This model reset value for READ_ARRAY (not CFI compliant= ) */ /* Flash area read */ @@ -663,10 +671,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, "\n", __func__, offset, pfl->wcycle, pfl->cmd, value); =20 mode_read_array: - trace_pflash_mode_read_array(); - memory_region_rom_device_set_romd(&pfl->mem, true); - pfl->wcycle =3D 0; - pfl->cmd =3D 0x00; /* This model reset value for READ_ARRAY (not CFI) = */ + pflash_mode_read_array(pfl); } =20 =20 @@ -872,13 +877,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Err= or **errp) pfl->max_device_width =3D pfl->device_width; } =20 - pfl->wcycle =3D 0; - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; pfl->status =3D 0x80; /* WSM ready */ + pflash_mode_read_array(pfl); pflash_cfi01_fill_cfi_table(pfl); } =20 @@ -887,13 +887,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev) PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); =20 trace_pflash_reset(); - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; - pfl->wcycle =3D 0; - memory_region_rom_device_set_romd(&pfl->mem, true); + pflash_mode_read_array(pfl); /* * The WSM ready timer occurs at most 150ns after system reset. * This model deliberately ignores this delay. --=20 2.26.2