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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id d23sm1675567edt.19.2021.03.10.09.05.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:05:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395939; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1lkAbNMznYy5sWjl9s/cdzvTCo04j/BVeg1zFkCfsN0=; b=AThUigeViVw2YUmmNyTUj5kRFyj1FeOaQY4urFzNNt/ylfDRGg2QkEzGlccAOaxlPIN0hs 33072ieYFEZgky8XyAHe+HPx5b8mbc621AL8eJhsW29Jj+N/6eeronljAYcO4G/FD98UJI sr12H5D+b+rGs0gP97WQjJ2x4nQ5cHI= X-MC-Unique: x5cAJvojN9eA5LLDfvuSXg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1lkAbNMznYy5sWjl9s/cdzvTCo04j/BVeg1zFkCfsN0=; b=NcjXj6teHWR8AGOM5uc7IYhFNqnpRQvsWvpjLf75bks6aWRHgYSQvs2kWm1i0Ow0AA h3f2h6fyCvvNcZ3/acEUOZl9NESIPzSp+54nA5FU35HBQAaGDGRg86X3VFKVg3h5k1JP lZ/mNKLPlEAiazyR9wcQvQXS/eIAswWAwoe6P7RacQ0e532rW1iT7TgNPgn2xJsrLibH nMw5kRVpLqSW0cR+B+aNAab/K68ooRO0LqcF2/eet4laUlgcnqTvzAJPE4BsuWEcsHgm gjZrpTVcejUwi7YcRBJjdzcG3uehvOQDAk6PBifA75QemlwSvLA4TgG/vw0fGV2Rbk68 Lk7g== X-Gm-Message-State: AOAM530XslTaAyAdLIBtJTRpU/fUV9uuSmaJ3USHoDwHKGbpe60GPcEl h+4x+j8ZJdxleAFGVAohFbg9d05H9ZWNd3npkbH8w6RB6/B7muF7GaTCjD2RQXgCs/khzrtNCAB C0ErEuRW13DEuUQ== X-Received: by 2002:a05:6402:278b:: with SMTP id b11mr4451928ede.380.1615395936439; Wed, 10 Mar 2021 09:05:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJzWFXqW5lobH1Y+HAtKnbFld9GonmGKh3V0LkGYjtPT47Xs2abr3fXUWpN8CBqUwYRLy7JDrA== X-Received: by 2002:a05:6402:278b:: with SMTP id b11mr4451905ede.380.1615395936199; Wed, 10 Mar 2021 09:05:36 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 01/12] hw/block/pflash_cfi: Fix code style for checkpatch.pl Date: Wed, 10 Mar 2021 18:05:17 +0100 Message-Id: <20210310170528.1184868-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) We are going to move this code, fix its style first. Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 36 ++++++++++++++++++++++++------------ hw/block/pflash_cfi02.c | 9 ++++++--- 2 files changed, 30 insertions(+), 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 22287a1522e..b6919bbe474 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -115,7 +115,8 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 -/* Perform a CFI query based on the bank width of the flash. +/* + * Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for * this flash. */ @@ -125,7 +126,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwad= dr offset) uint32_t resp =3D 0; hwaddr boff; =20 - /* Adjust incoming offset to match expected device-width + /* + * Adjust incoming offset to match expected device-width * addressing. CFI query addresses are always specified in terms of * the maximum supported width of the device. This means that x8 * devices and x8/x16 devices in x8 mode behave differently. For @@ -141,7 +143,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwad= dr offset) if (boff >=3D sizeof(pfl->cfi_table)) { return 0; } - /* Now we will construct the CFI response generated by a single + /* + * Now we will construct the CFI response generated by a single * device, then replicate that for all devices that make up the * bus. For wide parts used in x8 mode, CFI query responses * are different than native byte-wide parts. @@ -185,7 +188,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hw= addr offset) uint32_t resp; hwaddr boff; =20 - /* Adjust incoming offset to match expected device-width + /* + * Adjust incoming offset to match expected device-width * addressing. Device ID read addresses are always specified in * terms of the maximum supported width of the device. This means * that x8 devices and x8/x16 devices in x8 mode behave @@ -198,7 +202,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hw= addr offset) boff =3D offset >> (ctz32(pfl->bank_width) + ctz32(pfl->max_device_width) - ctz32(pfl->device_wid= th)); =20 - /* Mask off upper bits which may be used in to query block + /* + * Mask off upper bits which may be used in to query block * or sector lock status at other addresses. * Offsets 2/3 are block lock status, is not emulated. */ @@ -297,7 +302,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, case 0x60: /* Block /un)lock */ case 0x70: /* Status Register */ case 0xe8: /* Write block */ - /* Status register read. Return status from each device in + /* + * Status register read. Return status from each device in * bank. */ ret =3D pfl->status; @@ -308,7 +314,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, shift +=3D pfl->device_width * 8; } } else if (!pfl->device_width && width > 2) { - /* Handle 32 bit flash cases where device width is not + /* + * Handle 32 bit flash cases where device width is not * set. (Existing behavior before device width added.) */ ret |=3D pfl->status << 16; @@ -340,7 +347,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, break; } } else { - /* If we have a read larger than the bank_width, combine multi= ple + /* + * If we have a read larger than the bank_width, combine multi= ple * manufacturer/device ID queries into a single response. */ int i; @@ -367,7 +375,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, ret =3D 0; } } else { - /* If we have a read larger than the bank_width, combine multi= ple + /* + * If we have a read larger than the bank_width, combine multi= ple * CFI queries into a single response. */ int i; @@ -544,7 +553,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, =20 break; case 0xe8: - /* Mask writeblock size based on device width, or bank width if + /* + * Mask writeblock size based on device width, or bank width if * device width not specified. */ /* FIXME check @offset, @width */ @@ -718,7 +728,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) =20 total_len =3D pfl->sector_len * pfl->nb_blocs; =20 - /* These are only used to expose the parameters of each device + /* + * These are only used to expose the parameters of each device * in the cfi_table[]. */ num_devices =3D pfl->device_width ? (pfl->bank_width / pfl->device_wid= th) : 1; @@ -763,7 +774,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } } =20 - /* Default to devices being used at their maximum device width. This w= as + /* + * Default to devices being used at their maximum device width. This w= as * assumed before the device_width support was added. */ if (!pfl->max_device_width) { diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 7962cff7455..fa981465e12 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -100,7 +100,8 @@ struct PFlashCFI02 { uint16_t unlock_addr1; uint8_t cfi_table[0x4d]; QEMUTimer timer; - /* The device replicates the flash memory across its memory space. Em= ulate + /* + * The device replicates the flash memory across its memory space. Em= ulate * that by having a container (.mem) filled with an array of aliases * (.mem_mappings) pointing to the flash memory (.orig_mem). */ @@ -884,8 +885,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Err= or **errp) pfl->cfi_table[0x28] =3D 0x02; pfl->cfi_table[0x29] =3D 0x00; /* Max number of bytes in multi-bytes write */ - /* XXX: disable buffered write as it's not supported */ - // pfl->cfi_table[0x2A] =3D 0x05; + /* + * XXX: disable buffered write as it's not supported + * pfl->cfi_table[0x2A] =3D 0x05; + */ pfl->cfi_table[0x2A] =3D 0x00; pfl->cfi_table[0x2B] =3D 0x00; /* Number of erase block regions */ --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395947; cv=none; d=zohomail.com; s=zohoarc; b=KOfDe9Jm83y05G1WAHCampGewnV5+kMJZSS/MIYcGtJE3bPgF7XzhVRGmtRfOcdRTkgBjxY4CVzhCtAUg2anVAGN78MwJ4i/pe0KfB2pzyz1vEYalD9WmPRPDo8LVQRfAH+tMbNolwfWDdHr5e4tGogfukSvVKY3gAhan04/NVg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395947; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=s0XsNDgI0CDlEbZP3vlZQ/DMh7G89YHXSewtt1cAdSI=; b=X3GXvCR9+r/4F9l7qLCYUb6khd3CElikAZuwhtG/YLDUnsklY5tihRZGAShoWyudSUVy8Vjb036Ad+eaApWOYt1xRF4j8xvsAtCJGlhDpkwA5t3+/wSFtTCQ8K6jGv3k5Z7recZ30THqXzxFvGrOb/MfZmll+QmC3/gPDDsDf34= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395946958303.7788545745118; Wed, 10 Mar 2021 09:05:46 -0800 (PST) Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-439-_Sltnxd2PWm1er7iYBDvSw-1; Wed, 10 Mar 2021 12:05:43 -0500 Received: by mail-ed1-f71.google.com with SMTP id k8so8675033edn.19 for ; Wed, 10 Mar 2021 09:05:42 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id de17sm41418ejc.16.2021.03.10.09.05.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:05:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395944; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=s0XsNDgI0CDlEbZP3vlZQ/DMh7G89YHXSewtt1cAdSI=; b=VBcC9jfWCOqXxlAjw+DxPhZvpMVCAyYgb1AvyLwyFTrhexrRsTCPt23Nwrz06j4UweLrzI 8lTM+rnVlyksmyY5biyJU40tkx+pC5qnt0/+nfCFttLWYJnzlh/2yzzO+DMUa7wsQaHg30 uSpcdpNeW1jWgOBkgcWeiDxnb89HxOs= X-MC-Unique: _Sltnxd2PWm1er7iYBDvSw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s0XsNDgI0CDlEbZP3vlZQ/DMh7G89YHXSewtt1cAdSI=; b=pmjz8s/Ur49QawrEb0QZE7VNSCzv8dByD8yC0hozOJhnXf6HMQsjELehSDzdCmzPk2 ErRwquzXrfSKBuNp45W7/CT2lN0vjCqCoSrAkHBHM4D6UZD5KDwmYxDcR2Mte4vQbT16 R2mwt5UhmsB0v4r0gL3CtWJq0SRQ4gEEizpOuBX+IPRlzlHD22tF7Mjpsk6OtVuS1U+5 NUuaKof+4ydKHi00c69vIaw0gfWwPnuy4OR14Uj4WyZzr9Q/VgbzRD/ys1j/0BPyinCL FhIUcms7Hn7C85+JsNYvMAPlrJJoXXvbxdlzUKxlC2E1HZQ/bCJWAvSaYAp3YpRt47Dl suUg== X-Gm-Message-State: AOAM531SBr5PQFai2jJdrTHdELgkATXkuSX0OphCwZx7uk9dUNLYW7oL 5Zp+Q2vghtoAOwoLNN67u8PvJ+FAoXUNa6DLZugtUBVjI5JPj7/u6/3mXcqKrqQsuZQ7CsEZpuF 908B80APvkQxIYw== X-Received: by 2002:a17:906:4150:: with SMTP id l16mr4820210ejk.90.1615395941502; Wed, 10 Mar 2021 09:05:41 -0800 (PST) X-Google-Smtp-Source: ABdhPJyCdYgOOtn6sbnynnldYDbeZlnSg126+PI4KNMQHyBsLpnjgo6YNRnRqHGXmmrf6FgiaAwUiw== X-Received: by 2002:a17:906:4150:: with SMTP id l16mr4820191ejk.90.1615395941342; Wed, 10 Mar 2021 09:05:41 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 02/12] hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table() Date: Wed, 10 Mar 2021 18:05:18 +0100 Message-Id: <20210310170528.1184868-3-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Fill the CFI table in out of DeviceRealize() in a new function: pflash_cfi01_fill_cfi_table(). Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 140 +++++++++++++++++++++------------------- 1 file changed, 73 insertions(+), 67 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index b6919bbe474..03472ea5b64 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -704,30 +704,11 @@ static const MemoryRegionOps pflash_cfi01_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 -static void pflash_cfi01_realize(DeviceState *dev, Error **errp) +static void pflash_cfi01_fill_cfi_table(PFlashCFI01 *pfl) { - ERRP_GUARD(); - PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); - uint64_t total_len; - int ret; uint64_t blocks_per_device, sector_len_per_device, device_len; int num_devices; =20 - if (pfl->sector_len =3D=3D 0) { - error_setg(errp, "attribute \"sector-length\" not specified or zer= o."); - return; - } - if (pfl->nb_blocs =3D=3D 0) { - error_setg(errp, "attribute \"num-blocks\" not specified or zero."= ); - return; - } - if (pfl->name =3D=3D NULL) { - error_setg(errp, "attribute \"name\" not specified."); - return; - } - - total_len =3D pfl->sector_len * pfl->nb_blocs; - /* * These are only used to expose the parameters of each device * in the cfi_table[]. @@ -742,53 +723,6 @@ static void pflash_cfi01_realize(DeviceState *dev, Err= or **errp) } device_len =3D sector_len_per_device * blocks_per_device; =20 - memory_region_init_rom_device( - &pfl->mem, OBJECT(dev), - &pflash_cfi01_ops, - pfl, - pfl->name, total_len, errp); - if (*errp) { - return; - } - - pfl->storage =3D memory_region_get_ram_ptr(&pfl->mem); - sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); - - if (pfl->blk) { - uint64_t perm; - pfl->ro =3D !blk_supports_write_perm(pfl->blk); - perm =3D BLK_PERM_CONSISTENT_READ | (pfl->ro ? 0 : BLK_PERM_WRITE); - ret =3D blk_set_perm(pfl->blk, perm, BLK_PERM_ALL, errp); - if (ret < 0) { - return; - } - } else { - pfl->ro =3D 0; - } - - if (pfl->blk) { - if (!blk_check_size_and_read_all(pfl->blk, pfl->storage, total_len, - errp)) { - vmstate_unregister_ram(&pfl->mem, DEVICE(pfl)); - return; - } - } - - /* - * Default to devices being used at their maximum device width. This w= as - * assumed before the device_width support was added. - */ - if (!pfl->max_device_width) { - pfl->max_device_width =3D pfl->device_width; - } - - pfl->wcycle =3D 0; - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; - pfl->status =3D 0x80; /* WSM ready */ /* Hardcoded CFI table */ /* Standard "QRY" string */ pfl->cfi_table[0x10] =3D 'Q'; @@ -876,6 +810,78 @@ static void pflash_cfi01_realize(DeviceState *dev, Err= or **errp) pfl->cfi_table[0x3f] =3D 0x01; /* Number of protection fields */ } =20 +static void pflash_cfi01_realize(DeviceState *dev, Error **errp) +{ + ERRP_GUARD(); + PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); + uint64_t total_len; + int ret; + + if (pfl->sector_len =3D=3D 0) { + error_setg(errp, "attribute \"sector-length\" not specified or zer= o."); + return; + } + if (pfl->nb_blocs =3D=3D 0) { + error_setg(errp, "attribute \"num-blocks\" not specified or zero."= ); + return; + } + if (pfl->name =3D=3D NULL) { + error_setg(errp, "attribute \"name\" not specified."); + return; + } + + total_len =3D pfl->sector_len * pfl->nb_blocs; + + memory_region_init_rom_device( + &pfl->mem, OBJECT(dev), + &pflash_cfi01_ops, + pfl, + pfl->name, total_len, errp); + if (*errp) { + return; + } + + pfl->storage =3D memory_region_get_ram_ptr(&pfl->mem); + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); + + if (pfl->blk) { + uint64_t perm; + pfl->ro =3D !blk_supports_write_perm(pfl->blk); + perm =3D BLK_PERM_CONSISTENT_READ | (pfl->ro ? 0 : BLK_PERM_WRITE); + ret =3D blk_set_perm(pfl->blk, perm, BLK_PERM_ALL, errp); + if (ret < 0) { + return; + } + } else { + pfl->ro =3D 0; + } + + if (pfl->blk) { + if (!blk_check_size_and_read_all(pfl->blk, pfl->storage, total_len, + errp)) { + vmstate_unregister_ram(&pfl->mem, DEVICE(pfl)); + return; + } + } + + /* + * Default to devices being used at their maximum device width. This w= as + * assumed before the device_width support was added. + */ + if (!pfl->max_device_width) { + pfl->max_device_width =3D pfl->device_width; + } + + pfl->wcycle =3D 0; + /* + * The command 0x00 is not assigned by the CFI open standard, + * but QEMU historically uses it for the READ_ARRAY command (0xff). + */ + pfl->cmd =3D 0x00; + pfl->status =3D 0x80; /* WSM ready */ + pflash_cfi01_fill_cfi_table(pfl); +} + static void pflash_cfi01_system_reset(DeviceState *dev) { PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395953; cv=none; d=zohomail.com; s=zohoarc; b=Xn6wrTTIuRadgbstSHx0cNCoDbdcmOrmb7Glhxwoj5Y6q5tRXvH9gq4RIt0pNesjpjpFA2lb9APvEkZM+Can3ojwgYMcgzhpoE2JPiFxexQO51ewQzMhCd+3FffnJ256SYDBDlwIw7cCujaZpZ3XyM7SWZbHWePJVMzZg0ILC68= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395953; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=0p2T4LOlo1WwNURg6exWZWmw0vfUpBnGF9RSkW5uJpI=; b=M+go94UadVcPqAEZ0VzQhE1DSlFMEX01nUs6h9eK7s8Dzl0Dr1JzWkAVM6xP+Gysv1JSXGPyAGkNtXnJ+tlj54dpmWuZbTkdBwy4oHrDSLR5FAQOYoL7eEYDAgEqqM9wcmL6Cjt4bpynHsu+7mbMKMhnyWWdefWTliJAGY3UNwU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 161539595314797.80237814449595; Wed, 10 Mar 2021 09:05:53 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-297-JAHR_zyCMhqakIopZpCveg-1; Wed, 10 Mar 2021 12:05:49 -0500 Received: by mail-ej1-f71.google.com with SMTP id rl7so7485949ejb.16 for ; Wed, 10 Mar 2021 09:05:49 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id r17sm2642145edm.89.2021.03.10.09.05.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:05:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395950; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0p2T4LOlo1WwNURg6exWZWmw0vfUpBnGF9RSkW5uJpI=; b=YR2ZK102B2A+YXWmUODNEN4KXKRx7imnRsoADeH4UPqZbS4COolHNbadRR1eebx+N1o2Qy X2PMce8MjE6rWCdeSMsAKfde+yL8eqlviYDlGybrJv++zeuIJ16GhFuMLLLipeAccOIuaX fgVb03J550idy9U8E8fKXsQfu5LcwBg= X-MC-Unique: JAHR_zyCMhqakIopZpCveg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0p2T4LOlo1WwNURg6exWZWmw0vfUpBnGF9RSkW5uJpI=; b=ImEcu1qpSWm9JWKxWG0QovC1qIgJWqejU3Eze9bgUqrPB/VLmxpvEypm7KsmmjHYjY 4/JngT8s+9OjHLipmGpNSzPhkeMAHPyUUoPvn61a0xbKGTBeENOuRP+EmFGpCREWLnIn 3i6jKA7gb52Bd3ACUWV6v+V4RqVicNvV8oBwU7koJmbjuFez0/XB/JBR6iBLFok8QLRb ZMtmbcFntKs4uoF3Jm0KEfH5Io66Tr3K1B536C8MNSfpeeuyitVhcjLMogEthI+1iyAg 1tJC6oMI7jDNZK5EV9z9WqMIG+V1QasBVnYONMABQUeO5puXW/+2+ALkn1MJhyu8mbFf 6iow== X-Gm-Message-State: AOAM530BLQ4gX4qB7oFiHQSUt5PfCGqRzaHLp3qhTW7whPTL4RF7EWIX we0QosDIcYjnBIcxd8XgMiQ20/bdAeZFiH09PidaZZPnoyarCVs8VrzUBeUXP0du2HSNPhG1joM fsFwGGjAodVv9iA== X-Received: by 2002:a17:906:2504:: with SMTP id i4mr4733081ejb.115.1615395948208; Wed, 10 Mar 2021 09:05:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJzL4BGaDaskaudXSodstxoWEbJ5WyVz6yHWXhY64YFw++K8wXpzcP/22nWHKUMz9pVrVyyLmw== X-Received: by 2002:a17:906:2504:: with SMTP id i4mr4732978ejb.115.1615395947286; Wed, 10 Mar 2021 09:05:47 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 03/12] hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table() Date: Wed, 10 Mar 2021 18:05:19 +0100 Message-Id: <20210310170528.1184868-4-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Fill the CFI table in out of DeviceRealize() in a new function: pflash_cfi02_fill_cfi_table(). Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi02.c | 193 +++++++++++++++++++++------------------- 1 file changed, 99 insertions(+), 94 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index fa981465e12..845f50ed99b 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -724,6 +724,104 @@ static const MemoryRegionOps pflash_cfi02_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 +static void pflash_cfi02_fill_cfi_table(PFlashCFI02 *pfl, int nb_regions) +{ + /* Hardcoded CFI table (mostly from SG29 Spansion flash) */ + const uint16_t pri_ofs =3D 0x40; + /* Standard "QRY" string */ + pfl->cfi_table[0x10] =3D 'Q'; + pfl->cfi_table[0x11] =3D 'R'; + pfl->cfi_table[0x12] =3D 'Y'; + /* Command set (AMD/Fujitsu) */ + pfl->cfi_table[0x13] =3D 0x02; + pfl->cfi_table[0x14] =3D 0x00; + /* Primary extended table address */ + pfl->cfi_table[0x15] =3D pri_ofs; + pfl->cfi_table[0x16] =3D pri_ofs >> 8; + /* Alternate command set (none) */ + pfl->cfi_table[0x17] =3D 0x00; + pfl->cfi_table[0x18] =3D 0x00; + /* Alternate extended table (none) */ + pfl->cfi_table[0x19] =3D 0x00; + pfl->cfi_table[0x1A] =3D 0x00; + /* Vcc min */ + pfl->cfi_table[0x1B] =3D 0x27; + /* Vcc max */ + pfl->cfi_table[0x1C] =3D 0x36; + /* Vpp min (no Vpp pin) */ + pfl->cfi_table[0x1D] =3D 0x00; + /* Vpp max (no Vpp pin) */ + pfl->cfi_table[0x1E] =3D 0x00; + /* Timeout per single byte/word write (128 ms) */ + pfl->cfi_table[0x1F] =3D 0x07; + /* Timeout for min size buffer write (NA) */ + pfl->cfi_table[0x20] =3D 0x00; + /* Typical timeout for block erase (512 ms) */ + pfl->cfi_table[0x21] =3D 0x09; + /* Typical timeout for full chip erase (4096 ms) */ + pfl->cfi_table[0x22] =3D 0x0C; + /* Reserved */ + pfl->cfi_table[0x23] =3D 0x01; + /* Max timeout for buffer write (NA) */ + pfl->cfi_table[0x24] =3D 0x00; + /* Max timeout for block erase */ + pfl->cfi_table[0x25] =3D 0x0A; + /* Max timeout for chip erase */ + pfl->cfi_table[0x26] =3D 0x0D; + /* Device size */ + pfl->cfi_table[0x27] =3D ctz32(pfl->chip_len); + /* Flash device interface (8 & 16 bits) */ + pfl->cfi_table[0x28] =3D 0x02; + pfl->cfi_table[0x29] =3D 0x00; + /* Max number of bytes in multi-bytes write */ + /* + * XXX: disable buffered write as it's not supported + * pfl->cfi_table[0x2A] =3D 0x05; + */ + pfl->cfi_table[0x2A] =3D 0x00; + pfl->cfi_table[0x2B] =3D 0x00; + /* Number of erase block regions */ + pfl->cfi_table[0x2c] =3D nb_regions; + /* Erase block regions */ + for (int i =3D 0; i < nb_regions; ++i) { + uint32_t sector_len_per_device =3D pfl->sector_len[i]; + pfl->cfi_table[0x2d + 4 * i] =3D pfl->nb_blocs[i] - 1; + pfl->cfi_table[0x2e + 4 * i] =3D (pfl->nb_blocs[i] - 1) >> 8; + pfl->cfi_table[0x2f + 4 * i] =3D sector_len_per_device >> 8; + pfl->cfi_table[0x30 + 4 * i] =3D sector_len_per_device >> 16; + } + assert(0x2c + 4 * nb_regions < pri_ofs); + + /* Extended */ + pfl->cfi_table[0x00 + pri_ofs] =3D 'P'; + pfl->cfi_table[0x01 + pri_ofs] =3D 'R'; + pfl->cfi_table[0x02 + pri_ofs] =3D 'I'; + + /* Extended version 1.0 */ + pfl->cfi_table[0x03 + pri_ofs] =3D '1'; + pfl->cfi_table[0x04 + pri_ofs] =3D '0'; + + /* Address sensitive unlock required. */ + pfl->cfi_table[0x05 + pri_ofs] =3D 0x00; + /* Erase suspend to read/write. */ + pfl->cfi_table[0x06 + pri_ofs] =3D 0x02; + /* Sector protect not supported. */ + pfl->cfi_table[0x07 + pri_ofs] =3D 0x00; + /* Temporary sector unprotect not supported. */ + pfl->cfi_table[0x08 + pri_ofs] =3D 0x00; + + /* Sector protect/unprotect scheme. */ + pfl->cfi_table[0x09 + pri_ofs] =3D 0x00; + + /* Simultaneous operation not supported. */ + pfl->cfi_table[0x0a + pri_ofs] =3D 0x00; + /* Burst mode not supported. */ + pfl->cfi_table[0x0b + pri_ofs] =3D 0x00; + /* Page mode not supported. */ + pfl->cfi_table[0x0c + pri_ofs] =3D 0x00; + assert(0x0c + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); +} + static void pflash_cfi02_realize(DeviceState *dev, Error **errp) { ERRP_GUARD(); @@ -837,100 +935,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Er= ror **errp) pfl->cmd =3D 0; pfl->status =3D 0; =20 - /* Hardcoded CFI table (mostly from SG29 Spansion flash) */ - const uint16_t pri_ofs =3D 0x40; - /* Standard "QRY" string */ - pfl->cfi_table[0x10] =3D 'Q'; - pfl->cfi_table[0x11] =3D 'R'; - pfl->cfi_table[0x12] =3D 'Y'; - /* Command set (AMD/Fujitsu) */ - pfl->cfi_table[0x13] =3D 0x02; - pfl->cfi_table[0x14] =3D 0x00; - /* Primary extended table address */ - pfl->cfi_table[0x15] =3D pri_ofs; - pfl->cfi_table[0x16] =3D pri_ofs >> 8; - /* Alternate command set (none) */ - pfl->cfi_table[0x17] =3D 0x00; - pfl->cfi_table[0x18] =3D 0x00; - /* Alternate extended table (none) */ - pfl->cfi_table[0x19] =3D 0x00; - pfl->cfi_table[0x1A] =3D 0x00; - /* Vcc min */ - pfl->cfi_table[0x1B] =3D 0x27; - /* Vcc max */ - pfl->cfi_table[0x1C] =3D 0x36; - /* Vpp min (no Vpp pin) */ - pfl->cfi_table[0x1D] =3D 0x00; - /* Vpp max (no Vpp pin) */ - pfl->cfi_table[0x1E] =3D 0x00; - /* Timeout per single byte/word write (128 ms) */ - pfl->cfi_table[0x1F] =3D 0x07; - /* Timeout for min size buffer write (NA) */ - pfl->cfi_table[0x20] =3D 0x00; - /* Typical timeout for block erase (512 ms) */ - pfl->cfi_table[0x21] =3D 0x09; - /* Typical timeout for full chip erase (4096 ms) */ - pfl->cfi_table[0x22] =3D 0x0C; - /* Reserved */ - pfl->cfi_table[0x23] =3D 0x01; - /* Max timeout for buffer write (NA) */ - pfl->cfi_table[0x24] =3D 0x00; - /* Max timeout for block erase */ - pfl->cfi_table[0x25] =3D 0x0A; - /* Max timeout for chip erase */ - pfl->cfi_table[0x26] =3D 0x0D; - /* Device size */ - pfl->cfi_table[0x27] =3D ctz32(pfl->chip_len); - /* Flash device interface (8 & 16 bits) */ - pfl->cfi_table[0x28] =3D 0x02; - pfl->cfi_table[0x29] =3D 0x00; - /* Max number of bytes in multi-bytes write */ - /* - * XXX: disable buffered write as it's not supported - * pfl->cfi_table[0x2A] =3D 0x05; - */ - pfl->cfi_table[0x2A] =3D 0x00; - pfl->cfi_table[0x2B] =3D 0x00; - /* Number of erase block regions */ - pfl->cfi_table[0x2c] =3D nb_regions; - /* Erase block regions */ - for (int i =3D 0; i < nb_regions; ++i) { - uint32_t sector_len_per_device =3D pfl->sector_len[i]; - pfl->cfi_table[0x2d + 4 * i] =3D pfl->nb_blocs[i] - 1; - pfl->cfi_table[0x2e + 4 * i] =3D (pfl->nb_blocs[i] - 1) >> 8; - pfl->cfi_table[0x2f + 4 * i] =3D sector_len_per_device >> 8; - pfl->cfi_table[0x30 + 4 * i] =3D sector_len_per_device >> 16; - } - assert(0x2c + 4 * nb_regions < pri_ofs); - - /* Extended */ - pfl->cfi_table[0x00 + pri_ofs] =3D 'P'; - pfl->cfi_table[0x01 + pri_ofs] =3D 'R'; - pfl->cfi_table[0x02 + pri_ofs] =3D 'I'; - - /* Extended version 1.0 */ - pfl->cfi_table[0x03 + pri_ofs] =3D '1'; - pfl->cfi_table[0x04 + pri_ofs] =3D '0'; - - /* Address sensitive unlock required. */ - pfl->cfi_table[0x05 + pri_ofs] =3D 0x00; - /* Erase suspend to read/write. */ - pfl->cfi_table[0x06 + pri_ofs] =3D 0x02; - /* Sector protect not supported. */ - pfl->cfi_table[0x07 + pri_ofs] =3D 0x00; - /* Temporary sector unprotect not supported. */ - pfl->cfi_table[0x08 + pri_ofs] =3D 0x00; - - /* Sector protect/unprotect scheme. */ - pfl->cfi_table[0x09 + pri_ofs] =3D 0x00; - - /* Simultaneous operation not supported. */ - pfl->cfi_table[0x0a + pri_ofs] =3D 0x00; - /* Burst mode not supported. */ - pfl->cfi_table[0x0b + pri_ofs] =3D 0x00; - /* Page mode not supported. */ - pfl->cfi_table[0x0c + pri_ofs] =3D 0x00; - assert(0x0c + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); + pflash_cfi02_fill_cfi_table(pfl, nb_regions); } =20 static Property pflash_cfi02_properties[] =3D { --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395957; cv=none; d=zohomail.com; s=zohoarc; b=dijDiuaOssBD87Disoh6vetCI3491nOdqn1rr/Suprxiw6TXnXbUpKdE4tH3Rq6FcxefWbUyU4x0NSyqk+Lon0xFRHYzT6kGrDRgZufopr/v487Gycv3EyKdzko+Y0vdJl/xeh7U1SPFeaBYdH00NyqatiGKNPpPHTGOTYdgcqE= ARC-Message-Signature: i=1; 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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id v12sm18597ejh.94.2021.03.10.09.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:05:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395956; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qQO9biHCPAJnw7a1zkeuv52hwPL+u8u+MaxlaPRiSEo=; b=GUXsbTUAatpkZmp0W9AiWDsiCLRmFnHw74qZdm+Y4Z181P/Dc02KGDTmcVRSJyKxjVuhDA lBkPt3lEmhIXCM/EkIMcGkgTYy5z8WP3oWS3PHCKi1OORmNc9OX9cvjneemVUy77qvmnQZ glOUl/SaDmgEpkO63Z34pWS4PoFGfUw= X-MC-Unique: qq8QrMAqPUOhxod3_vTJeg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qQO9biHCPAJnw7a1zkeuv52hwPL+u8u+MaxlaPRiSEo=; b=lDDvA5QVkcGPibXQieMsbw6VI+aIOHRY6ETZmhPQnUQMc8SeHKGJZdrsZcT4ZzAwtI Srvj4tj2U3bnfrofpl3dHrxZiU/cML9R3ENWq5y9kEmiAku1Q3puG4IKSLzRZckPG8J+ c1mieyyvm/gPgJBZevNMg8XgmOETl8bkjj6SWBW5Gr7MRnkVEsCp0KdsSif9Y4cXlWj/ kmCySZWoLr3bAY8WCZxCqx8awDCQqIIDKLKFUk+0jhuvYrHxfpCzs3PSmt83Tww2Opar vErpL0aFg91War476eFVZX96TC/EQ1bdrvyi8wvzJR7HNkxoxZP3BLv3QmmgPQXZF4wJ uKzA== X-Gm-Message-State: AOAM533j/FRYx/k3The+iRkbr0VeIZEmItIzyeYudurO6epEHxdWoYHn ZIAugOa9u8zICvdllBrTkHyrvdiv5202QA/df0G+IHeajtlT0DIGbV1xABvURVzGvCJ7+zp3LmW ENMvVYI5obN+lig== X-Received: by 2002:aa7:d54a:: with SMTP id u10mr4492799edr.316.1615395952670; Wed, 10 Mar 2021 09:05:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJyOS4qzLs41HF0mG0I98Zsnk1nUUB2p++d/C4PaiupWqwDHXzFLG3McwoL7dZ0NHmtP/kR64A== X-Received: by 2002:aa7:d54a:: with SMTP id u10mr4492778edr.316.1615395952563; Wed, 10 Mar 2021 09:05:52 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 04/12] hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings() Date: Wed, 10 Mar 2021 18:05:20 +0100 Message-Id: <20210310170528.1184868-5-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) There is only one call to pflash_setup_mappings(). Convert 'rom_mode' to boolean and set it to true directly within pflash_setup_mappings(). Reviewed-by: Bin Meng Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Edmondson --- v2: Convert to bool in pflash_register_memory (David) --- hw/block/pflash_cfi02.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 845f50ed99b..0eb868ecd3d 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -108,7 +108,7 @@ struct PFlashCFI02 { MemoryRegion mem; MemoryRegion *mem_mappings; /* array; one per mapping */ MemoryRegion orig_mem; - int rom_mode; + bool rom_mode; int read_counter; /* used for lazy switch-back to rom mode */ int sectors_to_erase; uint64_t erase_time_remaining; @@ -181,12 +181,13 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl) "pflash-alias", &pfl->orig_mem, 0, size); memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mapping= s[i]); } + pfl->rom_mode =3D true; } =20 static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode) { memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode); - pfl->rom_mode =3D rom_mode; + pfl->rom_mode =3D !!rom_mode; } =20 static size_t pflash_regions_count(PFlashCFI02 *pfl) @@ -927,7 +928,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Erro= r **errp) pfl->sector_erase_map =3D bitmap_new(pfl->total_sectors); =20 pflash_setup_mappings(pfl); - pfl->rom_mode =3D 1; sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); =20 timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395961; cv=none; d=zohomail.com; s=zohoarc; b=nwPqHzUPSrOUmB/4KuSB0tUR2xugg4gcvPAZH7LjUlGG3Za0bcM9N6AhkeRUrwT0NzvHcFo0TMo2OVgz8J4qvf4dE6P+SSZjhLTS4U35ChvhRfiYGDHcuJNfHkPSF7t7Q8CxaEmdZiuF0QhHQqttdfXbFn0cJPwYtvLN9yNj7dI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395961; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=WcGfRNYJ0BsERVuaAzhPbzUUIPMEXjXUCFh4a0jlWNQ=; b=QXnx3T6ko+RVgtHmgkX7+iNQh9ozMQyI/pYSnt0y3rGq1/0apeKLzsjG3CGsUH0umlyphKetxWiFbGX2jXhtT0ljI6foKeKoEL2FxnJLczkh0DixqyLKYxsVWljJWKx14igAhgbfIS/MbnxCN06Ol1REzx0sSySxRyqSkHCtL30= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395961713911.6126950795569; Wed, 10 Mar 2021 09:06:01 -0800 (PST) Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-235-LTYtflJVPYCRT1sfS8rYtw-1; Wed, 10 Mar 2021 12:05:59 -0500 Received: by mail-ed1-f70.google.com with SMTP id p6so8643405edq.21 for ; Wed, 10 Mar 2021 09:05:58 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id u24sm34858ejr.34.2021.03.10.09.05.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:05:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395960; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WcGfRNYJ0BsERVuaAzhPbzUUIPMEXjXUCFh4a0jlWNQ=; b=SWw3VXm4QztITsIR8ZHvJQAx716YygaJMVnBMGoDcywGqqruZ6VYwgwLnSmk2qNA9Ds/xp SGeeVkDkcRx+Rxr6+5hfnPvOXIx6EGIjhW9F6i4Z2wYDcIAzqpZ3F6CdInAn+JVXxpvhDw /za06UFkS+osLqv/JSY9FaBM4Uz6kp4= X-MC-Unique: LTYtflJVPYCRT1sfS8rYtw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WcGfRNYJ0BsERVuaAzhPbzUUIPMEXjXUCFh4a0jlWNQ=; b=s1vD+vvcsP7XDPgZ+WM0NEDKied2LWDDZVG3zPg10urQ32f04+s1poUNJOQJPpP77M w1CttPQt9LVi8fMuec/BRZ94gCHO/nUYZg2ns+pPd73ihJQj1nVg4YHZf5cUHRQ6yVJb 1j2k5frEUWLNmBicl0u89tprmhNeXhL7a2sDg5tt5Ln0s4WNochjt0dFsjHy8W/MUZZQ Lx4Cdgv8mAgHfKe5djFyLwQYBFPnos9O9NzKCfae9oPaeKU2jNTwx9RhuaI0CjApU1Wy E2M3vVBRJEe7GTXCv3Kys6vm0nbUFzeBHyW0Lwq3mnLARSwCDesgVAFwT0n19Ycva3hz 8/Eg== X-Gm-Message-State: AOAM533CAsLvcOJmzOMvyeMIA7ZCS9oT5gIp9ojNt0/Zh1wGk3VSK8pX qJGXXu7ymIiraBMIFCPUMzO2IBRT55L906zwP65LIFyNC5VXFrCF6k36nMGu6mYbaZASzsBXCE2 pCuyy46DZa5CvIA== X-Received: by 2002:aa7:dc4e:: with SMTP id g14mr4526782edu.114.1615395957888; Wed, 10 Mar 2021 09:05:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJyvZ7K8yOFFJlQ6xMxkxrMQ34i1EbREce+mFhbUWaY5HpOF+n4yFRw+Keij723cXumQm4A4Sw== X-Received: by 2002:aa7:dc4e:: with SMTP id g14mr4526755edu.114.1615395957691; Wed, 10 Mar 2021 09:05:57 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 05/12] hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=false) Date: Wed, 10 Mar 2021 18:05:21 +0100 Message-Id: <20210310170528.1184868-6-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) There is only one call to pflash_register_memory() with rom_mode =3D=3D false. As we want to modify pflash_register_memory() in the next patch, open-code this trivial function in place for the 'rom_mode =3D=3D false' case. Reviewed-by: Bin Meng Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Edmondson --- hw/block/pflash_cfi02.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 0eb868ecd3d..897b7333222 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -467,8 +467,10 @@ static void pflash_write(void *opaque, hwaddr offset, = uint64_t value, switch (pfl->wcycle) { case 0: /* Set the device in I/O access mode if required */ - if (pfl->rom_mode) - pflash_register_memory(pfl, 0); + if (pfl->rom_mode) { + pfl->rom_mode =3D false; + memory_region_rom_device_set_romd(&pfl->orig_mem, false); + } pfl->read_counter =3D 0; /* We're in read mode */ check_unlock0: --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395967; cv=none; d=zohomail.com; s=zohoarc; b=kE72/CWkuOBVWxJPLv178iLNztAth7l9Ml/1oWeO4GOuZwLicdia4IycpmNAi+Qz4+yrq0RBDiRCIWvk2sOnAt0u+G0wP1h4XtJ0/jqdJUqQD9NAOSV52d5BFH8mMKYpkN7ocqxk2ZLTLaOGV4dBCTjPCXFcLKdcyvrfDQs7sGo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395967; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=LR/j1VN7s/QFD9E6lrCkzOBzVHMc/rhGkpQ4k1/cX1U=; b=j9jJ80liecS9kcnbVmiH6IbdBoIqQaI1IZ+0mfGvoQz3BlPDUAN27c2JaGJR3PF+yXLyq3aOkGzmVAhmhF4Lara871Cu49kyo52DM1+gDfaS+BUU0CNNN/YDvpz6qf1AQ0ZipeLYATHSgxgu07tbaJuAOPL/dLMkHYSWLWWYUAw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395967356883.1632182537655; Wed, 10 Mar 2021 09:06:07 -0800 (PST) Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-477-C3fGns61Nk6O3KVaMZZNUw-1; Wed, 10 Mar 2021 12:06:04 -0500 Received: by mail-ed1-f71.google.com with SMTP id bi17so8664774edb.6 for ; Wed, 10 Mar 2021 09:06:04 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id x10sm23962ejd.69.2021.03.10.09.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395966; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LR/j1VN7s/QFD9E6lrCkzOBzVHMc/rhGkpQ4k1/cX1U=; b=XT6WgocUHx5kRNpXlEisr8rr/wyjjui5gJppb0SYE/PyqVRTiB4PKmgiNTcYsin4+7e3O4 gLuIVEmeIEGBG32+ldjikkvFOW4PFeh3N5OtDUf0PUK97uPJW5Vk+KTa9CeULgUGYM66Ae 7Sz+JeyYrrcwSqpo9pk69vtwK1oQErw= X-MC-Unique: C3fGns61Nk6O3KVaMZZNUw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LR/j1VN7s/QFD9E6lrCkzOBzVHMc/rhGkpQ4k1/cX1U=; b=i6/539NGNi8YQ1dZZYs1XH7gHhpsH8JO0pviqxX8XSSDkXwRKNn9lhIb/3tery8U90 jQW7zfn2tC1WlJmYFBWYgMNwBWhOLecsTxJCnvXwKULIhJfsFFOIXQ3Tr3DY2X4Od33q g9HRVxnfu/BNVjZ3fJDhoKfbILt7YH9tfmMVnLV/TdedXXRtPUbr/fl1fwvkixrQ+FXv QTJ+kuzOR7BoJvVe6jVjUGK1SkVt9Ht+c//vCbLQtmrx3P04+f7Z9eqA5dAevcYgobjQ fvsFotym36SW8VzOrYjW3E3V6VSn04Z8KGJdU96hSI6tpE0bw+8aTSTh2po1eD1o2v8G aymw== X-Gm-Message-State: AOAM532y1EucaoaefgLrq60G9CmW08LRP7Z5/XamVdEvRIZ8a6nR6yZp 7xt5opJbeAcGAhSdfjruckrASEros3CNGokjTn4+5buyGQx47SVwifnq1lyz3Ed8pSvQEFV8xU8 5XHtrWpjPsXPFiA== X-Received: by 2002:a17:907:7651:: with SMTP id kj17mr4688224ejc.127.1615395963319; Wed, 10 Mar 2021 09:06:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJxcgQ4k7EAo12NZMdHKfK0JyvmHm3LyG9gf53KUEjA1sdHOQq5GK6kh+fZZ1vaKTS7RKleplQ== X-Received: by 2002:a17:907:7651:: with SMTP id kj17mr4688202ejc.127.1615395963145; Wed, 10 Mar 2021 09:06:03 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 06/12] hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array Date: Wed, 10 Mar 2021 18:05:22 +0100 Message-Id: <20210310170528.1184868-7-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - When the timer expires and not in bypass mode - On a read access (on invalid command). - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. pflash_register_memory(rom_mode=3Dtrue) already sets the ROM device in "read array" mode (from I/O device to ROM one). Explicit that by renaming the function as pflash_mode_read_array(), adding a trace event and resetting wcycle. Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi02.c | 18 +++++++++--------- hw/block/trace-events | 1 + 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 897b7333222..2ba77a0171b 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -184,10 +184,13 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl) pfl->rom_mode =3D true; } =20 -static void pflash_register_memory(PFlashCFI02 *pfl, int rom_mode) +static void pflash_mode_read_array(PFlashCFI02 *pfl) { - memory_region_rom_device_set_romd(&pfl->orig_mem, rom_mode); - pfl->rom_mode =3D !!rom_mode; + trace_pflash_mode_read_array(); + pfl->cmd =3D 0x00; + pfl->wcycle =3D 0; + pfl->rom_mode =3D true; + memory_region_rom_device_set_romd(&pfl->orig_mem, true); } =20 static size_t pflash_regions_count(PFlashCFI02 *pfl) @@ -249,11 +252,10 @@ static void pflash_timer(void *opaque) toggle_dq7(pfl); if (pfl->bypass) { pfl->wcycle =3D 2; + pfl->cmd =3D 0; } else { - pflash_register_memory(pfl, 1); - pfl->wcycle =3D 0; + pflash_mode_read_array(pfl); } - pfl->cmd =3D 0; } =20 /* @@ -315,7 +317,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) /* Lazy reset to ROMD mode after a certain amount of read accesses */ if (!pfl->rom_mode && pfl->wcycle =3D=3D 0 && ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) { - pflash_register_memory(pfl, 1); + pflash_mode_read_array(pfl); } offset &=3D pfl->chip_len - 1; boff =3D offset & 0xFF; @@ -933,8 +935,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Erro= r **errp) sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem); =20 timer_init_ns(&pfl->timer, QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); - pfl->wcycle =3D 0; - pfl->cmd =3D 0; pfl->status =3D 0; =20 pflash_cfi02_fill_cfi_table(pfl, nb_regions); diff --git a/hw/block/trace-events b/hw/block/trace-events index d32475c3989..f16d6e90cfd 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -7,6 +7,7 @@ fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%= 02x val 0x%02x" # pflash_cfi01.c # pflash_cfi02.c pflash_reset(void) "reset" +pflash_mode_read_array(void) "mode: read array" pflash_timer_expired(uint8_t cmd) "command 0x%02x done" pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd= , uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcy= cle:%u" pflash_io_write(uint64_t offset, unsigned size, uint32_t value, uint8_t wc= ycle) "offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u" --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395973; cv=none; d=zohomail.com; s=zohoarc; b=Bdpysz7UwAMHETWSCxBBlu0UOAPtYunDIvgZLkhuzxGYMRQ9YkF8X1plnTEiqzCqkdFyhzOqysXq1TaXPZ/3abbtfnTOBfeXgg+6nTmUSAAcQ6MXIbpPSD+Z8+LSnT+r9h0fgxe/IbwHxIi9cAmkt1ggObOgu1+S6L9aFP5GJVo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395973; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=j4UkoIyPvyQtBOyx7RE8awlWIoogi5VQBygbejCvWQI=; b=IvhdfGyk2WKuQMTTk3ZpxWgLGhnSm3tS3xdpptHQh4PRkU/fawlnMqbor5Fkh8M4nkMedr7aPb2T1cvSZ1zKA6HUOzGnbg/gRtNQFnhVd4v5zU14KEN+z2xfUJBlrrQJDjl38s4UrsdpjQ+O4TSVExlghLFMm5P2mptgOSTBp50= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395973153488.60226387193404; Wed, 10 Mar 2021 09:06:13 -0800 (PST) Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-513-lXUNBVk-PmG7Q5Mp9I0BhA-1; Wed, 10 Mar 2021 12:06:09 -0500 Received: by mail-ed1-f70.google.com with SMTP id h2so8657918edw.10 for ; Wed, 10 Mar 2021 09:06:09 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id g11sm6774582edt.35.2021.03.10.09.06.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395972; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j4UkoIyPvyQtBOyx7RE8awlWIoogi5VQBygbejCvWQI=; b=HKGZFKqr2T5zk9e7GbmzzPfUyu1WV+JCWy4GJFxiJC3O/oz59+/BGNnVeWkwHC6lyH+bKt P2hqRP1GKoSVO4qMw/g3crsV+TqSYGByOmv+3n/E5jJo6KcfB+ggiOuQqmt2UxYq8vsMV/ ObmLbhD0hm8RJjyvkvv8y719RtOeMpM= X-MC-Unique: lXUNBVk-PmG7Q5Mp9I0BhA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=j4UkoIyPvyQtBOyx7RE8awlWIoogi5VQBygbejCvWQI=; b=n0u7wBZM7QhwdPyAnYUg8Vgs635B5Iu1kyEAIbUD/plbAP/Lkiox4LEnxbwqK4eWRC lbdaGvwzX1feKyvQkAwlxMDNtRaoUKjWpLFS1UfoRySrEu3L8VEYbXlGVf4y7SIodXA3 V1OZEI1MgZ6bpeWlnM6N91ZfG8GZWQ2lGgXuk2UNW+lDA30eYULnGAdy5Cnz+NZwVC5C CjN12nsFUGSW7LBRlS4gpziaHONPTs4udYhxaojMaPkMGvbvv4FTxwIWgz0yc56gYgRy eFyozIRSN7imU6jWdAcQtS7WlnecajiUEavLQuSc88qUBfr6l7ATUEAhwii+ogXTEjtc keHQ== X-Gm-Message-State: AOAM532pBpvZAn9iAtcFzxWAMDna7JJomU9ugjcbhOBuoC6z7q8yIFzp bM4NbX63G0mKIyw5fQXy2HdKtNQ4MpfZ5HA6D3/rvzr5DGDs7yHIBEtLgHEQTCEioLuoq9Yl09d 4p/wgUpvLexGGRA== X-Received: by 2002:aa7:c496:: with SMTP id m22mr4386470edq.292.1615395968630; Wed, 10 Mar 2021 09:06:08 -0800 (PST) X-Google-Smtp-Source: ABdhPJzBMFp4IixcQQnl1T8fTttG0NATBcxqx5apjcFwGkQ4cWQaft/+OArUyp9e5D/N4ix337M64g== X-Received: by 2002:aa7:c496:: with SMTP id m22mr4386456edq.292.1615395968513; Wed, 10 Mar 2021 09:06:08 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf Subject: [PATCH v2 07/12] hw/block/pflash_cfi02: Factor out pflash_reset_state_machine() Date: Wed, 10 Mar 2021 18:05:23 +0100 Message-Id: <20210310170528.1184868-8-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) There is multiple places resetting the internal state machine. Factor the code out in a new pflash_reset_state_machine() method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bin Meng Reviewed-by: David Edmondson --- hw/block/pflash_cfi02.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 2ba77a0171b..aea47a99c61 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -184,11 +184,17 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl) pfl->rom_mode =3D true; } =20 +static void pflash_reset_state_machine(PFlashCFI02 *pfl) +{ + trace_pflash_reset(); + pfl->cmd =3D 0x00; + pfl->wcycle =3D 0; +} + static void pflash_mode_read_array(PFlashCFI02 *pfl) { trace_pflash_mode_read_array(); - pfl->cmd =3D 0x00; - pfl->wcycle =3D 0; + pflash_reset_state_machine(pfl); pfl->rom_mode =3D true; memory_region_rom_device_set_romd(&pfl->orig_mem, true); } @@ -330,8 +336,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) default: /* This should never happen : reset state & treat it as a read*/ DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); - pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pflash_reset_state_machine(pfl); /* fall through to the read code */ case 0x80: /* Erase (unlock) */ /* We accept reads during second unlock sequence... */ @@ -669,8 +674,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, } reset_dq3(pfl); timer_del(&pfl->timer); - pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pflash_reset_state_machine(pfl); return; } /* @@ -710,10 +714,8 @@ static void pflash_write(void *opaque, hwaddr offset, = uint64_t value, =20 /* Reset flash */ reset_flash: - trace_pflash_reset(); pfl->bypass =3D 0; - pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pflash_reset_state_machine(pfl); return; =20 do_bypass: --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395977; cv=none; d=zohomail.com; s=zohoarc; b=V14oQ3ku9VvT6K1HoIZnwm+ebNUT8IuL7TyGmOAHptcyguGCCJ93mucie0EJSwoj4V7TkNYL66nf23oEY1YFSRW9/y0NH6IWbSgYVhJCYFtSPhbU1UFqWAqlByTdWg8Kk28zbiSYfK96Ykm8qxtxvtbAHygYW5b80OF4InMDu2c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395977; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=XgHB9Xq4JwDA4FPpoAiA/3Du3vBPCn/Cbea9/ueFNnI=; b=Rs6Sx5epgBZyo29Z7uSiqFPZtEfFc5e6/e2GLAxJogN4r8gNthIi5w1pSLdHaEhqS5l0XKQHdBWv+GOqoBZn9bu3u5hzEPrXnOsBi2NGvM8zbrZ9vneMklhT0c8sVQmKj7GQzFAhacnCwvdDircyrT6hmC33T4cxFykqQhDGRMU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1615395977781485.6363115432631; Wed, 10 Mar 2021 09:06:17 -0800 (PST) Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-376-L1MGWzuYNyCKyegHSwrSjQ-1; Wed, 10 Mar 2021 12:06:15 -0500 Received: by mail-ed1-f69.google.com with SMTP id p12so8682525edw.9 for ; Wed, 10 Mar 2021 09:06:14 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id k22sm10754965edv.33.2021.03.10.09.06.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395976; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XgHB9Xq4JwDA4FPpoAiA/3Du3vBPCn/Cbea9/ueFNnI=; b=gMvPi0NdRzHEyZ2uqPwpeQPhWKG5P+C/yM3/h0O8QGcSv8dUzX5EdY8R2ZoWF9eyqafwDW cecdm6zBip6L0isOC07pRJpLby4zEACLttpEjErsjz6MstAm3ha/4k6YnQTBDZrwVEKb5/ eOiYeEAc4TY99FZBuzGYWjDOzNO/glI= X-MC-Unique: L1MGWzuYNyCKyegHSwrSjQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XgHB9Xq4JwDA4FPpoAiA/3Du3vBPCn/Cbea9/ueFNnI=; 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auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bin Meng Reviewed-by: David Edmondson --- hw/block/pflash_cfi02.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index aea47a99c61..c40febd2a41 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -942,6 +942,13 @@ static void pflash_cfi02_realize(DeviceState *dev, Err= or **errp) pflash_cfi02_fill_cfi_table(pfl, nb_regions); } =20 +static void pflash_cfi02_reset(DeviceState *dev) +{ + PFlashCFI02 *pfl =3D PFLASH_CFI02(dev); + + pflash_reset_state_machine(pfl); +} + static Property pflash_cfi02_properties[] =3D { DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk), DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, uniform_nb_blocs, 0), @@ -979,6 +986,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass,= void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->realize =3D pflash_cfi02_realize; + dc->reset =3D pflash_cfi02_reset; dc->unrealize =3D pflash_cfi02_unrealize; device_class_set_props(dc, pflash_cfi02_properties); set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395985; cv=none; d=zohomail.com; s=zohoarc; b=OKe8LF7FZPlhVbQBqmpUp9P/0eLgbMjmKmg7msXPsGrEnblEeq5E//H/14ydy8QnUUE7zWEHqHeWojK6O9kbLhklVgxsUjRMIbugfxYh0coq05cw59tSsGfMIAhCQB2EMIf6mR9y2fyIVCxMqn6Ps/vbrl5MyRcnkIbw+2wvCNw= ARC-Message-Signature: i=1; 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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id q26sm36453eja.45.2021.03.10.09.06.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395984; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Xx92GyJcKDec9ihkE2KCgTkx1XXRENYEtB83EjOcbgc=; b=e0290WGerB05/YrDlg0Y7sX/NxPE6NNwVrkFEljfHlh6lwavtOKyUsMOjZncOA1gc/1rja wDBWElp6O2HnL+hpyBs9hoCzDbz9X5h+Tf/PneJxBfY7x2uhcP7guXYQHolvkFYkbut2bt 9bLVnIaS5CbM1C1KNGwd/o2NW+wXZ+4= X-MC-Unique: THS8bjooPWKSV_Cddhp4Dg-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Xx92GyJcKDec9ihkE2KCgTkx1XXRENYEtB83EjOcbgc=; b=p3UnuQE1X4QEcACNF4gQo+uYKnna7gABLLZJzlugytu1uB9FeCJJcHBxSRK+GwoexD SYPha2jER6XBUqRxNQs52OxAqx+3dFn4vSb2J9X/kLWnVe3UsT3xl9GVz6dQCtKH8ECd heLjqXHGekLZJaAubkBaHAMtxw1or5SkXCCOqfVB5gy3ufB9+frzSJXFC5zDJ7FNDW8k jWvX0Wpn490ub/45rqRODOvOJT2a/Ugul8YnbA955yKgkItW/54cc99az0TteudnCsXp ejD4eJ8nSRuW3SVEkxPr6aB282eWCc75NouFjDU5nDUY8BCoRkwGOTl0dacj0fa2uYIe 2vrw== X-Gm-Message-State: AOAM531Dk2NmGBu8OrNXA5Ep0oEJJM6TM+rwP1XloG/WrjPENbB1Ze5C gGAAPixshmSuL91Jec9aLX/pMHmE3y3IAY8gFA6UbKEdVsAwJ2fRunVZDHFTITG8hoZCx4VI4yR 3Ae7ZnsuicSN+JA== X-Received: by 2002:a50:ec07:: with SMTP id g7mr4438451edr.72.1615395979088; Wed, 10 Mar 2021 09:06:19 -0800 (PST) X-Google-Smtp-Source: ABdhPJzltBhQM/nIoGAXOTteIpW4DjJt2eiK6oPdsWyVC5ftA50YZpxSfRXnhjHY6DNQf7DAZbIQZw== X-Received: by 2002:a50:ec07:: with SMTP id g7mr4438439edr.72.1615395978996; Wed, 10 Mar 2021 09:06:18 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf , Bin Meng Subject: [PATCH v2 09/12] hw/block/pflash_cfi01: Clarify trace events Date: Wed, 10 Mar 2021 18:05:25 +0100 Message-Id: <20210310170528.1184868-10-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Use the 'mode_read_array' event when we set the device in such mode, and use the 'reset' event in DeviceReset handler. Reviewed-by: Bin Meng Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 03472ea5b64..2618e00926d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -663,7 +663,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, "\n", __func__, offset, pfl->wcycle, pfl->cmd, value); =20 mode_read_array: - trace_pflash_reset(); + trace_pflash_mode_read_array(); memory_region_rom_device_set_romd(&pfl->mem, true); pfl->wcycle =3D 0; pfl->cmd =3D 0x00; /* This model reset value for READ_ARRAY (not CFI) = */ @@ -886,6 +886,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev) { PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); =20 + trace_pflash_reset(); /* * The command 0x00 is not assigned by the CFI open standard, * but QEMU historically uses it for the READ_ARRAY command (0xff). --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395989; cv=none; d=zohomail.com; s=zohoarc; b=RzHfc3xOhaI/3rb68KLPkoEr4hCNlFC2N7n9G2ZWfg/DYZRMqxujT48o2/V8RHTj9LdftQYFn9H09aRKT03Mzhs/TEHJqtqpxmUYRJaSmQ0ic8Um7SPVL2m8fsU37LgZ5Vg6cBdkNI6hc1Zi1k19GtjFwwBCHSPDsF4Lghwsx/4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395989; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=SwCwLAHcVK0o6cfVxU4Q/2p+2PaiP/5BkYG34ZdYu6g=; b=YLnY6e6igOS7ac1jWZFhCtd1FznujNpByg+zG0/KuTyJG9jmtRXIeMMDybld2kCO2oC2y+WnTklX2Fq/NnMrK7JsLgM0HuUR3/u7MKQu/3ioSu8SrvuuoM6wPQixXbZtsVs0IPt5mM0HINN6103E2R4zVc+lxk2VlO9uHDsan3I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395989540907.4059960087785; Wed, 10 Mar 2021 09:06:29 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-593-MsBl-C4rNPuLo-ldAIdFlA-1; Wed, 10 Mar 2021 12:06:25 -0500 Received: by mail-ej1-f71.google.com with SMTP id gv58so7491927ejc.6 for ; Wed, 10 Mar 2021 09:06:25 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id u15sm11548082eds.6.2021.03.10.09.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395988; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SwCwLAHcVK0o6cfVxU4Q/2p+2PaiP/5BkYG34ZdYu6g=; b=G2xZMz2FM6vj+HJSk+t0HgTC/u68was3hpqcBAqC18X49R6CyjEtoOHaplZXwZvHQUOE6w IMW3GBVVRPd4PSsjxlJ2ya0dSrvAvHeQvn0Dq60DXGKVx9z4rJ+PeHxxr+tH9f0a+6IE3O OjoEDw+I7u4id1XEK56nS58Q1GqqVKs= X-MC-Unique: MsBl-C4rNPuLo-ldAIdFlA-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SwCwLAHcVK0o6cfVxU4Q/2p+2PaiP/5BkYG34ZdYu6g=; b=R00GWGCjKcR0rn9qhAM7oAue4yWgCpEZYxqs874i8TJ+X57walpzxsbw7TVPjkRgK6 ghlORbah+DBe6FHWF7qG35vmlzzlpAkU70ps2WyogqL7ou9fTXis3mklVp5NmKzcEArm ED8/zw4ctLzSx3Cavk17FE86ppZUlPHnSLuPDUacgm6bc5Cen5qdQGGnT3QtQi3HL619 lB9tkyxHkzyguDX8oB6bZsVm1/8j6ZTurXqJYYX0CLKmmfZx1dz/RYFC3VkehriQES8O sysngQhf3/zvsMzgPcjH1IUdM8QjkyOItk86yu3hd3N9C7l84ZAYxOF8I34L7EDyBlc1 bIxw== X-Gm-Message-State: AOAM533dpBHh8Vcfl5O7kRq/bV2ULxhYgvgbYj09xRE3DjWQ3rSP1fGf jAv0blftF4WFP5Ta2SguXIYH12WRQzqHiH3bfecM5fZauwPNKniqOndLKQ7BNvFrxX79hVsiI7n N7HxvxOSy8D1wpA== X-Received: by 2002:aa7:d1cd:: with SMTP id g13mr4373880edp.369.1615395984234; Wed, 10 Mar 2021 09:06:24 -0800 (PST) X-Google-Smtp-Source: ABdhPJx0VXK4siYttQLe5v1Q3B1ZvZUQi8D8bWKCpn5lNH+/u5cDGco8KuCHsiZI0obzZP1JGM0vOg== X-Received: by 2002:aa7:d1cd:: with SMTP id g13mr4373866edp.369.1615395984028; Wed, 10 Mar 2021 09:06:24 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf Subject: [PATCH v2 10/12] hw/block/pflash_cfi01: Extract pflash_mode_read_array() Date: Wed, 10 Mar 2021 18:05:26 +0100 Message-Id: <20210310170528.1184868-11-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used three times: - On a read access (on invalid command). - On a write access (on command failure, error, or explicitly asked) - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. Reviewed-by: Alistair Francis Reviewed-by: David Edmondson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 40 +++++++++++++++++----------------------- 1 file changed, 17 insertions(+), 23 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 2618e00926d..32c9b289715 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -115,6 +115,19 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 +static void pflash_mode_read_array(PFlashCFI01 *pfl) +{ + trace_pflash_mode_read_array(); + /* + * The command 0x00 is not assigned by the CFI open standard, + * but QEMU historically uses it for the READ_ARRAY command (0xff). + */ + trace_pflash_mode_read_array(); + pfl->cmd =3D 0x00; + pfl->wcycle =3D 0; + memory_region_rom_device_set_romd(&pfl->mem, true); +} + /* * Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for @@ -283,12 +296,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr o= ffset, default: /* This should never happen : reset state & treat it as a read */ DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); - pfl->wcycle =3D 0; - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; + pflash_mode_read_array(pfl); /* fall through to read code */ case 0x00: /* This model reset value for READ_ARRAY (not CFI compliant= ) */ /* Flash area read */ @@ -663,10 +671,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, "\n", __func__, offset, pfl->wcycle, pfl->cmd, value); =20 mode_read_array: - trace_pflash_mode_read_array(); - memory_region_rom_device_set_romd(&pfl->mem, true); - pfl->wcycle =3D 0; - pfl->cmd =3D 0x00; /* This model reset value for READ_ARRAY (not CFI) = */ + pflash_mode_read_array(pfl); } =20 =20 @@ -872,13 +877,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Err= or **errp) pfl->max_device_width =3D pfl->device_width; } =20 - pfl->wcycle =3D 0; - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; pfl->status =3D 0x80; /* WSM ready */ + pflash_mode_read_array(pfl); pflash_cfi01_fill_cfi_table(pfl); } =20 @@ -887,13 +887,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev) PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); =20 trace_pflash_reset(); - /* - * The command 0x00 is not assigned by the CFI open standard, - * but QEMU historically uses it for the READ_ARRAY command (0xff). - */ - pfl->cmd =3D 0x00; - pfl->wcycle =3D 0; - memory_region_rom_device_set_romd(&pfl->mem, true); + pflash_mode_read_array(pfl); /* * The WSM ready timer occurs at most 150ns after system reset. * This model deliberately ignores this delay. --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395995; cv=none; d=zohomail.com; s=zohoarc; b=cmicLV5atLV3+RqDWxof/k1DCkgmjKBvCmRA5fTxbmKEQzUbjzKCSJ2QweFLyGOkRCYbe+8nCimoTo82V0558SMEN84530hL4Zwaa19WmRntn9++mbvle4AjL0GyMFX3hLgWuuhrQPXBZkjRYcEBrmYkyIkn0eyhWhr9bemtXk8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395995; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=DiFt/bunDuWc+GWqxvzEWiyWpy7maT5GLWM3/1nEM9A=; b=gqAa41knLyOH+8DanUuHA1EuPFpAEeCX+/RiN4UwD6NZciAF6Mv4gC0be4T5mSbD2FFvaxAAbVOMQkNyL6wfO3zWDJEJvTk0371DO2lDPjAQHP6qMsIXZa8Q7kV+uNiNSvEhDuY3W8GfWrXulEi6ibVDNobN6qjTJJLKh3RjwPw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1615395995480705.357082046925; Wed, 10 Mar 2021 09:06:35 -0800 (PST) Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-111-PmlhZgo_Pd-MeDDSMBqpFQ-1; Wed, 10 Mar 2021 12:06:30 -0500 Received: by mail-ed1-f72.google.com with SMTP id v27so8695913edx.1 for ; Wed, 10 Mar 2021 09:06:30 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id v1sm42743ejd.3.2021.03.10.09.06.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395994; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DiFt/bunDuWc+GWqxvzEWiyWpy7maT5GLWM3/1nEM9A=; b=GZz2Q1bVXF4K7fcA2ofmONH5mgoHM9NeH0R1TKe6ggQEnPgvjOpRCLkqQNJ0HLZQPPxBJf f9dUVJ06oiqK7f9MyIYDFyS9bN4MSKqLNuglBliEYgUqH31U6ozPDbh5dZJeRoVDxqyF6Z GxUVCvsR8yimx69fO7aaoN7oEX0qvlc= X-MC-Unique: PmlhZgo_Pd-MeDDSMBqpFQ-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DiFt/bunDuWc+GWqxvzEWiyWpy7maT5GLWM3/1nEM9A=; b=Dovsce/Srvm1W8Apzyuqr6pYyPPiqdOV8QGOoiiktCo7zERBptnxqi4zUX9m4hOZP6 diDA0NrtdN86FP4jgqyYzBiyD+b8SUS7wJcoup9zxTrji0XR9bAlW4wkopg3PsQ/axpq RQVg5q/RFPEYnszbHRj7qJwqX12OtzajUfaxC1PmxhQctSJOZxGiNbMBjz7vtNh6vnu0 kE8c/R7imp7opBeoHYK9lmviMJU+yZcDviXwNTjWbj/MKKo7cdC0aj0PBzHbmbjAnMno 9tKccrfHk1rNoE6FUpibGUHL4OjhPusZTsNJgkoFhD3lUq34DhmqHIgiT/d24V8VTBmg 2klA== X-Gm-Message-State: AOAM533i3YlugRcQ8zl6IKnMl66rjpH9XbUdBW4CYlGTQQJ41kxT8EzC GWquo2yMVyNZdhJvOxBL31Mu4Tdh/9FrwMces40/dC3hI8gNa3hO4cdboiQNyO9w0LfC6fqzoNd zxJqFRItGrmhErQ== X-Received: by 2002:a05:6402:12d5:: with SMTP id k21mr4523039edx.318.1615395989394; Wed, 10 Mar 2021 09:06:29 -0800 (PST) X-Google-Smtp-Source: ABdhPJw5jsZvbUpg2B3B0dIO7abvtqnLN0IyGttpA5dAmgARREaemkdlpx0hegUUjxJRg385QyiQRg== X-Received: by 2002:a05:6402:12d5:: with SMTP id k21mr4523022edx.318.1615395989289; Wed, 10 Mar 2021 09:06:29 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf Subject: [PATCH v2 11/12] hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro Date: Wed, 10 Mar 2021 18:05:27 +0100 Message-Id: <20210310170528.1184868-12-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) From: David Edmondson PFlashCFI01.ro is a bool, declare it as such. Signed-off-by: David Edmondson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210216142721.1985543-3-david.edmondson@oracle.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 32c9b289715..787466b249f 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -82,7 +82,7 @@ struct PFlashCFI01 { uint8_t max_device_width; /* max device width in bytes */ uint32_t features; uint8_t wcycle; /* if 0, the flash is read normally */ - int ro; + bool ro; uint8_t cmd; uint8_t status; uint16_t ident0; @@ -858,7 +858,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) return; } } else { - pfl->ro =3D 0; + pfl->ro =3D false; } =20 if (pfl->blk) { --=20 2.26.2 From nobody Wed Nov 19 07:04:21 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1615395999; cv=none; d=zohomail.com; s=zohoarc; b=EaCU7tUubSmK/tz/YptB5JfZbPhKsw1laaFRbEh72p4q2E6SYM3ZKdAEgWoCXUgxCc6VyqM6FaxRNmi21FYUaWswVoVoiO0PSoesa6QlVrMXUmQSMTsB5gkuzHRIdlBL1t366ZiARpBVDBnd1niXTbF8WEkTa4FR93UOpDwM77U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615395999; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=YN1kcLqlTXrLvLvZmQR3vctr6rcRl7BAsmHQ7VnnfmQ=; b=C5knh1+uF3Ggfq13IRlA1a6antLy6hjYyEdLUAwyQ0/YO+ts5WhOAkp0KfKuzDxERpYiXzKinnCM0bh0crQqL0j+qbLN3EBZygIdo+8GKKzeShnwf6XxQrzxCY9fdqLBu4ooV90ByUmcWlwdCLQFzCPTe4Z7NY/IAyH4DmaYaCk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 63.128.21.124 as permitted sender) smtp.mailfrom=philmd@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [63.128.21.124]) by mx.zohomail.com with SMTPS id 1615395999357108.73712502660601; Wed, 10 Mar 2021 09:06:39 -0800 (PST) Received: from mail-ej1-f69.google.com (mail-ej1-f69.google.com [209.85.218.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-556-WQykR5DXMNy07G8JUKXNyw-1; Wed, 10 Mar 2021 12:06:36 -0500 Received: by mail-ej1-f69.google.com with SMTP id h14so7536906ejg.7 for ; Wed, 10 Mar 2021 09:06:36 -0800 (PST) Return-Path: Return-Path: Received: from x1w.redhat.com (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id ho19sm29066ejc.57.2021.03.10.09.06.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 09:06:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615395998; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YN1kcLqlTXrLvLvZmQR3vctr6rcRl7BAsmHQ7VnnfmQ=; b=BrIT7oLcblgmE2jClb55evckcIvK/uw9HlTVT7hq9ua4hWhHgC0reaULKE+wH7lVDxG7CV e+aIekh1TKAMa1hPK96Qznff5cQmAt5P1tQtuJo1Hg8LN3FydZtME1Hz/76a12ocraNdaq 2Mamq9dAjd1LHtUhfSiqnTBKYbnMJ0w= X-MC-Unique: WQykR5DXMNy07G8JUKXNyw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YN1kcLqlTXrLvLvZmQR3vctr6rcRl7BAsmHQ7VnnfmQ=; b=Mb+IRG1zraCweY984LAw/FzbeeWSY63frX32VgpY+1bSVvwkEFMwj63BqLIiMBw2jF VfuRgB5S2HP/DhydeP2R8UU2auW3u5U9MXssvnHfpFv52CKMbtjzRN66RiwbiNPUcfFX nM7PjqYVbMiv9MJM24t+Jb+e9HvAJKqUVBhpWP+l+bamUyDNVzGTSSKEFZtaPjbSrXKm 2rIzfEECPLN6T4VLY6RQQ2mV1HvqgzRdD7EQ7O2RlUsoXc+rBGgMIhRqIajZ/06O4j6+ o82EBghj+E2Q1sYDOTpTSWTdCmamPY+/xX7+SN3zxiOuWrd9gR33wuc+EJCXTkq3IrQj Rtsw== X-Gm-Message-State: AOAM533PkJTgpOgET8LVvNwJtAY7uNLMq6wBNlVKONaVzDEcJ9tWirjl 6oEeqdwtfncD0fBfYKLaboCfNOhsvUrEfjxsZGTbPySVElyA+azTx6zoZmbe+JV/J4zIy1zZARw wxEpCazwUbr9j8g== X-Received: by 2002:aa7:dbd3:: with SMTP id v19mr4387999edt.314.1615395994893; Wed, 10 Mar 2021 09:06:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJxNoC3R7xAECZK+Wx+vZoUpLoeVmEr836MZ6AljsG0uo6fh2dVbbwwJDq/yOYtzgEOmNIhbKg== X-Received: by 2002:aa7:dbd3:: with SMTP id v19mr4387952edt.314.1615395994588; Wed, 10 Mar 2021 09:06:34 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , David Edmondson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-block@nongnu.org, Stephen Checkoway , Kevin Wolf Subject: [PATCH v2 12/12] hw/block/pflash_cfi: Replace DPRINTF with trace events Date: Wed, 10 Mar 2021 18:05:28 +0100 Message-Id: <20210310170528.1184868-13-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210310170528.1184868-1-philmd@redhat.com> References: <20210310170528.1184868-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) From: David Edmondson Rather than having a device specific debug implementation in pflash_cfi01.c and pflash_cfi02.c, use the standard tracing facility. Signed-off-by: David Edmondson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210216142721.1985543-2-david.edmondson@oracle.com> [PMD: Rebased] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bin Meng --- hw/block/pflash_cfi01.c | 81 +++++++++++++++++------------------------ hw/block/pflash_cfi02.c | 78 ++++++++++++++++----------------------- hw/block/trace-events | 41 ++++++++++++++++----- 3 files changed, 95 insertions(+), 105 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 787466b249f..108425402b3 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -56,16 +56,6 @@ #include "sysemu/runstate.h" #include "trace.h" =20 -/* #define PFLASH_DEBUG */ -#ifdef PFLASH_DEBUG -#define DPRINTF(fmt, ...) \ -do { \ - fprintf(stderr, "PFLASH: " fmt , ## __VA_ARGS__); \ -} while (0) -#else -#define DPRINTF(fmt, ...) do { } while (0) -#endif - #define PFLASH_BE 0 #define PFLASH_SECURE 1 =20 @@ -117,12 +107,11 @@ static const VMStateDescription vmstate_pflash =3D { =20 static void pflash_mode_read_array(PFlashCFI01 *pfl) { - trace_pflash_mode_read_array(); + trace_pflash_mode_read_array(pfl->name); /* * The command 0x00 is not assigned by the CFI open standard, * but QEMU historically uses it for the READ_ARRAY command (0xff). */ - trace_pflash_mode_read_array(); pfl->cmd =3D 0x00; pfl->wcycle =3D 0; memory_region_rom_device_set_romd(&pfl->mem, true); @@ -168,10 +157,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwa= ddr offset) * wider part. */ if (pfl->device_width !=3D 1 || pfl->bank_width > 4) { - DPRINTF("%s: Unsupported device configuration: " - "device_width=3D%d, max_device_width=3D%d\n", - __func__, pfl->device_width, - pfl->max_device_width); + trace_pflash_unsupported_device_configuration(pfl->name, + pfl->device_width, pfl->max_device_wid= th); return 0; } /* CFI query data is repeated, rather than zero padded for @@ -223,14 +210,14 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, = hwaddr offset) switch (boff & 0xFF) { case 0: resp =3D pfl->ident0; - trace_pflash_manufacturer_id(resp); + trace_pflash_manufacturer_id(pfl->name, resp); break; case 1: resp =3D pfl->ident1; - trace_pflash_device_id(resp); + trace_pflash_device_id(pfl->name, resp); break; default: - trace_pflash_device_info(offset); + trace_pflash_device_info(pfl->name, offset); return 0; } /* Replicate responses for each device in bank. */ @@ -278,10 +265,9 @@ static uint32_t pflash_data_read(PFlashCFI01 *pfl, hwa= ddr offset, } break; default: - DPRINTF("BUG in %s\n", __func__); abort(); } - trace_pflash_data_read(offset, width, ret); + trace_pflash_data_read(pfl->name, offset, width, ret); return ret; } =20 @@ -295,7 +281,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, switch (pfl->cmd) { default: /* This should never happen : reset state & treat it as a read */ - DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); + trace_pflash_read_unknown_state(pfl->name, pfl->cmd); pflash_mode_read_array(pfl); /* fall through to read code */ case 0x00: /* This model reset value for READ_ARRAY (not CFI compliant= ) */ @@ -328,7 +314,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, */ ret |=3D pfl->status << 16; } - DPRINTF("%s: status %x\n", __func__, ret); + trace_pflash_read_status(pfl->name, ret); break; case 0x90: if (!pfl->device_width) { @@ -343,14 +329,14 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr = offset, switch (boff) { case 0: ret =3D pfl->ident0 << 8 | pfl->ident1; - trace_pflash_manufacturer_id(ret); + trace_pflash_manufacturer_id(pfl->name, ret); break; case 1: ret =3D pfl->ident2 << 8 | pfl->ident3; - trace_pflash_device_id(ret); + trace_pflash_device_id(pfl->name, ret); break; default: - trace_pflash_device_info(boff); + trace_pflash_device_info(pfl->name, boff); ret =3D 0; break; } @@ -397,7 +383,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, =20 break; } - trace_pflash_io_read(offset, width, ret, pfl->cmd, pfl->wcycle); + trace_pflash_io_read(pfl->name, offset, width, ret, pfl->cmd, pfl->wcy= cle); =20 return ret; } @@ -427,7 +413,7 @@ static inline void pflash_data_write(PFlashCFI01 *pfl, = hwaddr offset, { uint8_t *p =3D pfl->storage; =20 - trace_pflash_data_write(offset, width, value, pfl->counter); + trace_pflash_data_write(pfl->name, offset, width, value, pfl->counter); switch (width) { case 1: p[offset] =3D value; @@ -466,7 +452,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, =20 cmd =3D value; =20 - trace_pflash_io_write(offset, width, value, pfl->wcycle); + trace_pflash_io_write(pfl->name, offset, width, value, pfl->wcycle); if (!pfl->wcycle) { /* Set the device in I/O access mode */ memory_region_rom_device_set_romd(&pfl->mem, false); @@ -480,14 +466,13 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, goto mode_read_array; case 0x10: /* Single Byte Program */ case 0x40: /* Single Byte Program */ - DPRINTF("%s: Single Byte Program\n", __func__); + trace_pflash_write(pfl->name, "single byte program (0)"); break; case 0x20: /* Block erase */ p =3D pfl->storage; offset &=3D ~(pfl->sector_len - 1); =20 - DPRINTF("%s: block erase at " TARGET_FMT_plx " bytes %x\n", - __func__, offset, (unsigned)pfl->sector_len); + trace_pflash_write_block_erase(pfl->name, offset, pfl->sector_= len); =20 if (!pfl->ro) { memset(p + offset, 0xff, pfl->sector_len); @@ -498,25 +483,25 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, pfl->status |=3D 0x80; /* Ready! */ break; case 0x50: /* Clear status bits */ - DPRINTF("%s: Clear status bits\n", __func__); + trace_pflash_write(pfl->name, "clear status bits"); pfl->status =3D 0x0; goto mode_read_array; case 0x60: /* Block (un)lock */ - DPRINTF("%s: Block unlock\n", __func__); + trace_pflash_write(pfl->name, "block unlock"); break; case 0x70: /* Status Register */ - DPRINTF("%s: Read status register\n", __func__); + trace_pflash_write(pfl->name, "read status register"); pfl->cmd =3D cmd; return; case 0x90: /* Read Device ID */ - DPRINTF("%s: Read Device information\n", __func__); + trace_pflash_write(pfl->name, "read device information"); pfl->cmd =3D cmd; return; case 0x98: /* CFI query */ - DPRINTF("%s: CFI query\n", __func__); + trace_pflash_write(pfl->name, "CFI query"); break; case 0xe8: /* Write to buffer */ - DPRINTF("%s: Write to buffer\n", __func__); + trace_pflash_write(pfl->name, "write to buffer"); /* FIXME should save @offset, @width for case 1+ */ qemu_log_mask(LOG_UNIMP, "%s: Write to buffer emulation is flawed\n", @@ -524,10 +509,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, pfl->status |=3D 0x80; /* Ready! */ break; case 0xf0: /* Probe for AMD flash */ - DPRINTF("%s: Probe for AMD flash\n", __func__); + trace_pflash_write(pfl->name, "probe for AMD flash"); goto mode_read_array; case 0xff: /* Read Array */ - DPRINTF("%s: Read array mode\n", __func__); + trace_pflash_write(pfl->name, "read array mode"); goto mode_read_array; default: goto error_flash; @@ -539,7 +524,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, switch (pfl->cmd) { case 0x10: /* Single Byte Program */ case 0x40: /* Single Byte Program */ - DPRINTF("%s: Single Byte Program\n", __func__); + trace_pflash_write(pfl->name, "single byte program (1)"); if (!pfl->ro) { pflash_data_write(pfl, offset, value, width, be); pflash_update(pfl, offset, width); @@ -571,7 +556,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, } else { value =3D extract32(value, 0, pfl->bank_width * 8); } - DPRINTF("%s: block write of %x bytes\n", __func__, value); + trace_pflash_write_block(pfl->name, value); pfl->counter =3D value; pfl->wcycle++; break; @@ -585,7 +570,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, } else if (cmd =3D=3D 0xff) { /* Read Array */ goto mode_read_array; } else { - DPRINTF("%s: Unknown (un)locking command\n", __func__); + trace_pflash_write(pfl->name, "unknown (un)locking command= "); goto mode_read_array; } break; @@ -593,7 +578,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, if (cmd =3D=3D 0xff) { /* Read Array */ goto mode_read_array; } else { - DPRINTF("%s: leaving query mode\n", __func__); + trace_pflash_write(pfl->name, "leaving query mode"); } break; default: @@ -621,7 +606,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, hwaddr mask =3D pfl->writeblock_size - 1; mask =3D ~mask; =20 - DPRINTF("%s: block write finished\n", __func__); + trace_pflash_write(pfl->name, "block write finished"); pfl->wcycle++; if (!pfl->ro) { /* Flush the entire write buffer onto backing storage.= */ @@ -660,7 +645,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, break; default: /* Should never happen */ - DPRINTF("%s: invalid write state\n", __func__); + trace_pflash_write(pfl->name, "invalid write state"); goto mode_read_array; } return; @@ -886,7 +871,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev) { PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); =20 - trace_pflash_reset(); + trace_pflash_reset(pfl->name); pflash_mode_read_array(pfl); /* * The WSM ready timer occurs at most 150ns after system reset. @@ -1035,7 +1020,7 @@ static void postload_update_cb(void *opaque, int runn= ing, RunState state) qemu_del_vm_change_state_handler(pfl->vmstate); pfl->vmstate =3D NULL; =20 - DPRINTF("%s: updating bdrv for %s\n", __func__, pfl->name); + trace_pflash_postload_cb(pfl->name); pflash_update(pfl, 0, pfl->sector_len * pfl->nb_blocs); } =20 diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index c40febd2a41..25c053693ce 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -48,14 +48,6 @@ #include "migration/vmstate.h" #include "trace.h" =20 -#define PFLASH_DEBUG false -#define DPRINTF(fmt, ...) \ -do { \ - if (PFLASH_DEBUG) { \ - fprintf(stderr, "PFLASH: " fmt, ## __VA_ARGS__); \ - } \ -} while (0) - #define PFLASH_LAZY_ROMD_THRESHOLD 42 =20 /* @@ -186,14 +178,14 @@ static void pflash_setup_mappings(PFlashCFI02 *pfl) =20 static void pflash_reset_state_machine(PFlashCFI02 *pfl) { - trace_pflash_reset(); + trace_pflash_reset(pfl->name); pfl->cmd =3D 0x00; pfl->wcycle =3D 0; } =20 static void pflash_mode_read_array(PFlashCFI02 *pfl) { - trace_pflash_mode_read_array(); + trace_pflash_mode_read_array(pfl->name); pflash_reset_state_machine(pfl); pfl->rom_mode =3D true; memory_region_rom_device_set_romd(&pfl->orig_mem, true); @@ -231,7 +223,7 @@ static void pflash_timer(void *opaque) { PFlashCFI02 *pfl =3D opaque; =20 - trace_pflash_timer_expired(pfl->cmd); + trace_pflash_timer_expired(pfl->name, pfl->cmd); if (pfl->cmd =3D=3D 0x30) { /* * Sector erase. If DQ3 is 0 when the timer expires, then the 50 @@ -244,11 +236,10 @@ static void pflash_timer(void *opaque) uint64_t timeout =3D pflash_erase_time(pfl); timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); - DPRINTF("%s: erase timeout fired; erasing %d sectors\n", - __func__, pfl->sectors_to_erase); + trace_pflash_erase_timeout(pfl->name, pfl->sectors_to_erase); return; } - DPRINTF("%s: sector erase complete\n", __func__); + trace_pflash_erase_complete(pfl->name); bitmap_zero(pfl->sector_erase_map, pfl->total_sectors); pfl->sectors_to_erase =3D 0; reset_dq3(pfl); @@ -272,7 +263,7 @@ static uint64_t pflash_data_read(PFlashCFI02 *pfl, hwad= dr offset, { uint8_t *p =3D (uint8_t *)pfl->storage + offset; uint64_t ret =3D pfl->be ? ldn_be_p(p, width) : ldn_le_p(p, width); - trace_pflash_data_read(offset, width, ret); + trace_pflash_data_read(pfl->name, offset, width, ret); return ret; } =20 @@ -335,7 +326,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) switch (pfl->cmd) { default: /* This should never happen : reset state & treat it as a read*/ - DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); + trace_pflash_read_unknown_state(pfl->name, pfl->cmd); pflash_reset_state_machine(pfl); /* fall through to the read code */ case 0x80: /* Erase (unlock) */ @@ -347,7 +338,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) toggle_dq2(pfl); /* Status register read */ ret =3D pfl->status; - DPRINTF("%s: status %" PRIx64 "\n", __func__, ret); + trace_pflash_read_status(pfl->name, ret); break; } /* Flash area read */ @@ -372,7 +363,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) default: ret =3D pflash_data_read(pfl, offset, width); } - DPRINTF("%s: ID " TARGET_FMT_plx " %" PRIx64 "\n", __func__, boff,= ret); + trace_pflash_read_done(pfl->name, boff, ret); break; case 0x10: /* Chip Erase */ case 0x30: /* Sector Erase */ @@ -384,7 +375,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) toggle_dq6(pfl); /* Status register read */ ret =3D pfl->status; - DPRINTF("%s: status %" PRIx64 "\n", __func__, ret); + trace_pflash_read_status(pfl->name, ret); break; case 0x98: /* CFI query mode */ @@ -395,7 +386,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset= , unsigned int width) } break; } - trace_pflash_io_read(offset, width, ret, pfl->cmd, pfl->wcycle); + trace_pflash_io_read(pfl->name, offset, width, ret, pfl->cmd, pfl->wcy= cle); =20 return ret; } @@ -424,9 +415,8 @@ static void pflash_sector_erase(PFlashCFI02 *pfl, hwadd= r offset) SectorInfo sector_info =3D pflash_sector_info(pfl, offset); uint64_t sector_len =3D sector_info.len; offset &=3D ~(sector_len - 1); - DPRINTF("%s: start sector erase at %0*" PRIx64 "-%0*" PRIx64 "\n", - __func__, pfl->width * 2, offset, - pfl->width * 2, offset + sector_len - 1); + trace_pflash_sector_erase_start(pfl->name, pfl->width * 2, offset, + pfl->width * 2, offset + sector_len - = 1); if (!pfl->ro) { uint8_t *p =3D pfl->storage; memset(p + offset, 0xff, sector_len); @@ -447,7 +437,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, uint8_t *p; uint8_t cmd; =20 - trace_pflash_io_write(offset, width, value, pfl->wcycle); + trace_pflash_io_write(pfl->name, offset, width, value, pfl->wcycle); cmd =3D value; if (pfl->cmd !=3D 0xA0) { /* Reset does nothing during chip erase and sector erase. */ @@ -507,27 +497,25 @@ static void pflash_write(void *opaque, hwaddr offset,= uint64_t value, return; } if (boff !=3D pfl->unlock_addr0 || cmd !=3D 0xAA) { - DPRINTF("%s: unlock0 failed " TARGET_FMT_plx " %02x %04x\n", - __func__, boff, cmd, pfl->unlock_addr0); + trace_pflash_unlock0_failed(pfl->name, boff, + cmd, pfl->unlock_addr0); goto reset_flash; } - DPRINTF("%s: unlock sequence started\n", __func__); + trace_pflash_write(pfl->name, "unlock sequence started"); break; case 1: /* We started an unlock sequence */ check_unlock1: if (boff !=3D pfl->unlock_addr1 || cmd !=3D 0x55) { - DPRINTF("%s: unlock1 failed " TARGET_FMT_plx " %02x\n", __func= __, - boff, cmd); + trace_pflash_unlock1_failed(pfl->name, boff, cmd); goto reset_flash; } - DPRINTF("%s: unlock sequence done\n", __func__); + trace_pflash_write(pfl->name, "unlock sequence done"); break; case 2: /* We finished an unlock sequence */ if (!pfl->bypass && boff !=3D pfl->unlock_addr0) { - DPRINTF("%s: command failed " TARGET_FMT_plx " %02x\n", __func= __, - boff, cmd); + trace_pflash_write_failed(pfl->name, boff, cmd); goto reset_flash; } switch (cmd) { @@ -538,10 +526,10 @@ static void pflash_write(void *opaque, hwaddr offset,= uint64_t value, case 0x90: /* Autoselect */ case 0xA0: /* Program */ pfl->cmd =3D cmd; - DPRINTF("%s: starting command %02x\n", __func__, cmd); + trace_pflash_write_start(pfl->name, cmd); break; default: - DPRINTF("%s: unknown command %02x\n", __func__, cmd); + trace_pflash_write_unknown(pfl->name, cmd); goto reset_flash; } break; @@ -559,7 +547,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, } goto reset_flash; } - trace_pflash_data_write(offset, width, value, 0); + trace_pflash_data_write(pfl->name, offset, width, value, 0); if (!pfl->ro) { p =3D (uint8_t *)pfl->storage + offset; if (pfl->be) { @@ -597,8 +585,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, } /* fall through */ default: - DPRINTF("%s: invalid write for command %02x\n", - __func__, pfl->cmd); + trace_pflash_write_invalid(pfl->name, pfl->cmd); goto reset_flash; } case 4: @@ -611,8 +598,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, goto check_unlock1; default: /* Should never happen */ - DPRINTF("%s: invalid command state %02x (wc 4)\n", - __func__, pfl->cmd); + trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 5); goto reset_flash; } break; @@ -624,12 +610,11 @@ static void pflash_write(void *opaque, hwaddr offset,= uint64_t value, switch (cmd) { case 0x10: /* Chip Erase */ if (boff !=3D pfl->unlock_addr0) { - DPRINTF("%s: chip erase: invalid address " TARGET_FMT_plx = "\n", - __func__, offset); + trace_pflash_chip_erase_invalid(pfl->name, offset); goto reset_flash; } /* Chip erase */ - DPRINTF("%s: start chip erase\n", __func__); + trace_pflash_chip_erase_start(pfl->name); if (!pfl->ro) { memset(pfl->storage, 0xff, pfl->chip_len); pflash_update(pfl, 0, pfl->chip_len); @@ -643,7 +628,7 @@ static void pflash_write(void *opaque, hwaddr offset, u= int64_t value, pflash_sector_erase(pfl, offset); break; default: - DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd); + trace_pflash_write_invalid_command(pfl->name, cmd); goto reset_flash; } pfl->cmd =3D cmd; @@ -693,19 +678,18 @@ static void pflash_write(void *opaque, hwaddr offset,= uint64_t value, return; default: /* Should never happen */ - DPRINTF("%s: invalid command state %02x (wc 6)\n", - __func__, pfl->cmd); + trace_pflash_write_invalid_state(pfl->name, pfl->cmd, 6); goto reset_flash; } break; /* Special values for CFI queries */ case WCYCLE_CFI: case WCYCLE_AUTOSELECT_CFI: - DPRINTF("%s: invalid write in CFI query mode\n", __func__); + trace_pflash_write(pfl->name, "invalid write in CFI query mode"); goto reset_flash; default: /* Should never happen */ - DPRINTF("%s: invalid write state (wc 7)\n", __func__); + trace_pflash_write(pfl->name, "invalid write state (wc 7)"); goto reset_flash; } pfl->wcycle++; diff --git a/hw/block/trace-events b/hw/block/trace-events index f16d6e90cfd..f655f997597 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -6,16 +6,37 @@ fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0= x%02x val 0x%02x" =20 # pflash_cfi01.c # pflash_cfi02.c -pflash_reset(void) "reset" -pflash_mode_read_array(void) "mode: read array" -pflash_timer_expired(uint8_t cmd) "command 0x%02x done" -pflash_io_read(uint64_t offset, unsigned size, uint32_t value, uint8_t cmd= , uint8_t wcycle) "offset:0x%04"PRIx64" size:%u value:0x%04x cmd:0x%02x wcy= cle:%u" -pflash_io_write(uint64_t offset, unsigned size, uint32_t value, uint8_t wc= ycle) "offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u" -pflash_data_read(uint64_t offset, unsigned size, uint32_t value) "data off= set:0x%04"PRIx64" size:%u value:0x%04x" -pflash_data_write(uint64_t offset, unsigned size, uint32_t value, uint64_t= counter) "data offset:0x%04"PRIx64" size:%u value:0x%04x counter:0x%016"PR= Ix64 -pflash_manufacturer_id(uint16_t id) "Read Manufacturer ID: 0x%04x" -pflash_device_id(uint16_t id) "Read Device ID: 0x%04x" -pflash_device_info(uint64_t offset) "Read Device Information offset:0x%04"= PRIx64 +pflash_chip_erase_invalid(const char *name, uint64_t offset) "%s: chip era= se: invalid address 0x%" PRIx64 +pflash_chip_erase_start(const char *name) "%s: start chip erase" +pflash_data_read(const char *name, uint64_t offset, unsigned size, uint32_= t value) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x" +pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32= _t value, uint64_t counter) "%s: data offset:0x%04"PRIx64" size:%u value:0x= %04x counter:0x%016"PRIx64 +pflash_device_id(const char *name, uint16_t id) "%s: read device ID: 0x%04= x" +pflash_device_info(const char *name, uint64_t offset) "%s: read device inf= ormation offset:0x%04" PRIx64 +pflash_erase_complete(const char *name) "%s: sector erase complete" +pflash_erase_timeout(const char *name, int count) "%s: erase timeout fired= ; erasing %d sectors" +pflash_io_read(const char *name, uint64_t offset, unsigned int size, uint3= 2_t value, uint8_t cmd, uint8_t wcycle) "%s: offset:0x%04" PRIx64 " size:%u= value:0x%04x cmd:0x%02x wcycle:%u" +pflash_io_write(const char *name, uint64_t offset, unsigned int size, uint= 32_t value, uint8_t wcycle) "%s: offset:0x%04"PRIx64" size:%u value:0x%04x = wcycle:%u" +pflash_manufacturer_id(const char *name, uint16_t id) "%s: read manufactur= er ID: 0x%04x" +pflash_mode_read_array(const char *name) "%s: read array mode" +pflash_postload_cb(const char *name) "%s: updating bdrv" +pflash_read_done(const char *name, uint64_t offset, uint64_t ret) "%s: ID:= 0x%" PRIx64 " ret:0x%" PRIx64 +pflash_read_status(const char *name, uint32_t ret) "%s: status:0x%x" +pflash_read_unknown_state(const char *name, uint8_t cmd) "%s: unknown comm= and state:0x%x" +pflash_reset(const char *name) "%s: reset" +pflash_sector_erase_start(const char *name, int width1, uint64_t start, in= t width2, uint64_t end) "%s: start sector erase at: 0x%0*" PRIx64 "-0x%0*" = PRIx64 +pflash_timer_expired(const char *name, uint8_t cmd) "%s: command 0x%02x do= ne" +pflash_unlock0_failed(const char *name, uint64_t offset, uint8_t cmd, uint= 16_t addr0) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x 0x%04x" +pflash_unlock1_failed(const char *name, uint64_t offset, uint8_t cmd) "%s:= unlock0 failed 0x%" PRIx64 " 0x%02x" +pflash_unsupported_device_configuration(const char *name, uint8_t width, u= int8_t max) "%s: unsupported device configuration: device_width:%d max_devi= ce_width:%d" +pflash_write(const char *name, const char *str) "%s: %s" +pflash_write_block(const char *name, uint32_t value) "%s: block write: byt= es:0x%x" +pflash_write_block_erase(const char *name, uint64_t offset, uint64_t len) = "%s: block erase offset:0x%" PRIx64 " bytes:0x%lx" +pflash_write_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: c= ommand failed 0x%" PRIx64 " 0x%02x" +pflash_write_invalid(const char *name, uint8_t cmd) "%s: invalid write for= command 0x%02x" +pflash_write_invalid_command(const char *name, uint8_t cmd) "%s: invalid c= ommand 0x%02x (wc 5)" +pflash_write_invalid_state(const char *name, uint8_t cmd, int wc) "%s: inv= alid command state 0x%02x (wc %d)" +pflash_write_start(const char *name, uint8_t cmd) "%s: starting command 0x= %02x" +pflash_write_unknown(const char *name, uint8_t cmd) "%s: unknown command 0= x%02x" =20 # virtio-blk.c virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p= status %d" --=20 2.26.2