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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: John Snow , Thomas Huth , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, Stefan Hajnoczi Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We all know the QEMU command line can become a fiendishly complex beast. Lets gently prepare our user for the horrors to come by referencing where other example command lines can be found in the manual. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Stefan Hajnoczi Reviewed-by: John Snow Reviewed-by: Thomas Huth Message-Id: <20210305092328.31792-3-alex.bennee@linaro.org> diff --git a/docs/system/quickstart.rst b/docs/system/quickstart.rst index 3a3acab5e7..681678c86e 100644 --- a/docs/system/quickstart.rst +++ b/docs/system/quickstart.rst @@ -11,3 +11,11 @@ Download and uncompress a PC hard disk image with Linux = installed (e.g. |qemu_system| linux.img =20 Linux should boot and give you a prompt. + +Users should be aware the above example elides a lot of the complexity +of setting up a VM with x86_64 specific defaults and assumes the +first non switch argument is a PC compatible disk image with a boot +sector. For a non-x86 system where we emulate a broad range of machine +types, the command lines are generally more explicit in defining the +machine and boot behaviour. You will find more example command lines +in the :ref:`system-targets-ref` section of the manual. diff --git a/docs/system/targets.rst b/docs/system/targets.rst index 75ed1087fd..9dcd95dd84 100644 --- a/docs/system/targets.rst +++ b/docs/system/targets.rst @@ -1,3 +1,5 @@ +.. _system-targets-ref: + QEMU System Emulator Targets =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D =20 --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615392322; cv=none; d=zohomail.com; s=zohoarc; b=QZNJaG9yeTAYFoZYkN9vSOmxDUbAi9lngOeQlBT/fUD68BfeDKSij39DHLTk5nPuTgKsBhGHWJ1Go2TqxrRxH2I/avtvuC5j65rS5slyTPuUXfPl5s46WdiptvkU6XgMAOdfsDC/7yH+yw2daSPLfprrW4eDy5FLlKcnyFwN9oE= ARC-Message-Signature: i=1; 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Wed, 10 Mar 2021 08:00:07 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 02/15] tests/docker: add a test-tcg for building then running check-tcg Date: Wed, 10 Mar 2021 15:59:49 +0000 Message-Id: <20210310160002.11659-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is mostly useful for verifying containers will work on the CI setup. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210305092328.31792-4-alex.bennee@linaro.org> diff --git a/tests/docker/test-tcg b/tests/docker/test-tcg new file mode 100755 index 0000000000..00993b73ba --- /dev/null +++ b/tests/docker/test-tcg @@ -0,0 +1,22 @@ +#!/bin/bash -e +# +# Build and run the TCG tests +# +# Copyright (c) 2021 Linaro Ltd. +# +# Authors: +# Alex Benn=C3=A9e +# +# This work is licensed under the terms of the GNU GPL, version 2 +# or (at your option) any later version. See the COPYING file in +# the top-level directory. + +. common.rc + +cd "$BUILD_DIR" + +# although we are not building QEMU itself we still need a configured +# build for the unit tests to be built and run +TARGET_LIST=3D${TARGET_LIST:-$DEF_TARGET_LIST} \ +build_qemu +check_qemu check-tcg --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615393501; cv=none; d=zohomail.com; s=zohoarc; b=QPPfJubj8dh3zXMpjpSjhADNrt5sObDx50veGCEG3S2bLU/K5mT7NWYwlVS9hs8Zq4nBNFLeoMxuN3FIJBLrlRgtMP16u7Rc8Ok6dI1uzqOdGmzofaRAEuqoRG/20z5VWPLwcqP7QM2rmpgB67TMiRBHPXptoOugjwHRrX20BT4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615393501; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Wainer dos Santos Moschetta , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Daniele Buono Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Daniele Buono Define a new variable LD_JOBS, that can be used to select the maximum number of linking jobs to be executed in parallel. If the variable is not defined, maintain the default given by make -j Currently, make parallelism at build time is based on the number of cpus available. This doesn't work well with LTO at linking, because with LTO the linker has to load in memory all the intermediate object files for optimization. The end result is that, if the gitlab runner happens to run two linking processes at the same time, the job will fail with an out-of-memory error, This patch leverages the ability to maintain high parallelism at compile time, but limit the number of linkers executed in parallel. Signed-off-by: Daniele Buono Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Daniel P. Berrang=C3=A9 Message-Id: <20210304030948.9367-2-dbuono@linux.vnet.ibm.com> Message-Id: <20210305092328.31792-8-alex.bennee@linaro.org> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 8b6d495288..814f51873f 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -27,6 +27,10 @@ include: else ../configure --enable-werror $CONFIGURE_ARGS ; fi || { cat config.log meson-logs/meson-log.txt && exit 1; } + - if test -n "$LD_JOBS"; + then + meson configure . -Dbackend_max_links=3D"$LD_JOBS" ; + fi || exit 1; - make -j"$JOBS" - if test -n "$MAKE_CHECK_ARGS"; then --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615392688; cv=none; d=zohomail.com; s=zohoarc; b=cdYXPvRz1ZatscFEwWT6aVIMhKwcbbpPTtdqrhdJnw93KSdHzbiHOrs4DS5IwSOUgHNMPCm5Jov+e7NjkCvtqJOTqxCI3wae1hym+vZMAlzsOEWAfmDR9OTVQ4uOM3Vm1HunvdNjly3GF+fU+y8Iqxt7DAo8CI6Oh1sq9lqyZaU= ARC-Message-Signature: i=1; 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Wed, 10 Mar 2021 08:00:10 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 04/15] gitlab-ci.yml: Add jobs to test CFI flags Date: Wed, 10 Mar 2021 15:59:51 +0000 Message-Id: <20210310160002.11659-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, Wainer dos Santos Moschetta , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Daniele Buono Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Daniele Buono QEMU has had options to enable control-flow integrity features for a few months now. Add two sets of build/check/acceptance jobs to ensure the binary produced is working fine. The three sets allow testing of x86_64 binaries for x86_64, s390x, ppc64 and aarch64 targets [AJB: tweak job names to avoid brands] Signed-off-by: Daniele Buono Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210304030948.9367-3-dbuono@linux.vnet.ibm.com> Message-Id: <20210305092328.31792-9-alex.bennee@linaro.org> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 814f51873f..b23364bf3a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -483,6 +483,125 @@ clang-user: --extra-cflags=3D-fsanitize=3Dundefined --extra-cflags=3D-fno-saniti= ze-recover=3Dundefined MAKE_CHECK_ARGS: check-unit check-tcg =20 +# Set LD_JOBS=3D1 because this requires LTO and ld consumes a large amount= of memory. +# On gitlab runners, default value sometimes end up calling 2 lds concurre= ntly and +# triggers an Out-Of-Memory error +# +# Since slirp callbacks are used in QEMU Timers, slirp needs to be compile= d together +# with QEMU and linked as a static library to avoid false positives in CFI= checks. +# This can be accomplished by using -enable-slirp=3Dgit, which avoids the = use of +# a system-wide version of the library +# +# Split in three sets of build/check/acceptance to limit the execution tim= e of each +# job +build-cfi-aarch64: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=3Dclang --cxx=3Dclang++ --enable-cfi --enable-cfi= -debug + --enable-safe-stack --enable-slirp=3Dgit + TARGETS: aarch64-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-aarch64: + <<: *native_test_job_definition + needs: + - job: build-cfi-aarch64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-aarch64: + <<: *native_test_job_definition + needs: + - job: build-cfi-aarch64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + +build-cfi-ppc64-s390x: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=3Dclang --cxx=3Dclang++ --enable-cfi --enable-cfi= -debug + --enable-safe-stack --enable-slirp=3Dgit + TARGETS: ppc64-softmmu s390x-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-ppc64-s390x: + <<: *native_test_job_definition + needs: + - job: build-cfi-ppc64-s390x + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-ppc64-s390x: + <<: *native_test_job_definition + needs: + - job: build-cfi-ppc64-s390x + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + +build-cfi-x86_64: + <<: *native_build_job_definition + needs: + - job: amd64-fedora-container + variables: + LD_JOBS: 1 + AR: llvm-ar + IMAGE: fedora + CONFIGURE_ARGS: --cc=3Dclang --cxx=3Dclang++ --enable-cfi --enable-cfi= -debug + --enable-safe-stack --enable-slirp=3Dgit + TARGETS: x86_64-softmmu + MAKE_CHECK_ARGS: check-build + artifacts: + expire_in: 2 days + paths: + - build + +check-cfi-x86_64: + <<: *native_test_job_definition + needs: + - job: build-cfi-x86_64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check + +acceptance-cfi-x86_64: + <<: *native_test_job_definition + needs: + - job: build-cfi-x86_64 + artifacts: true + variables: + IMAGE: fedora + MAKE_CHECK_ARGS: check-acceptance + <<: *acceptance_definition + tsan-build: <<: *native_build_job_definition variables: --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, Christian Ehrhardt , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 When building a Docker image based on debian10.docker on a non-x86 host, we get: [2/4] RUN apt update && DEBIAN_FRONTEND=3Dnoninteractive eatmydata = apt build-dep -yy qemu Reading package lists... Done Building dependency tree Reading state information... Done Some packages could not be installed. This may mean that you have requested an impossible situation or if you are using the unstable distribution that some required packages have not yet been created or been moved out of Incoming. The following information may help to resolve the situation: The following packages have unmet dependencies: builddeps:qemu : Depends: gcc-s390x-linux-gnu but it is not installable Depends: gcc-alpha-linux-gnu but it is not installable E: Unable to correct problems, you have held broken packages. Fix by using the --arch-only option suggested here: https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1866032/comments/1 Suggested-by: Christian Ehrhardt Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alex Benn=C3=A9e Message-Id: <20210223211115.2971565-1-f4bug@amsat.org> Message-Id: <20210305092328.31792-10-alex.bennee@linaro.org> diff --git a/tests/docker/dockerfiles/debian10.docker b/tests/docker/docker= files/debian10.docker index 9d42b5a4b8..d034acbd25 100644 --- a/tests/docker/dockerfiles/debian10.docker +++ b/tests/docker/dockerfiles/debian10.docker @@ -32,6 +32,6 @@ RUN apt update && \ psmisc \ python3 \ python3-sphinx \ - $(apt-get -s build-dep qemu | egrep ^Inst | fgrep '[all]' | cut -d= \ -f2) + $(apt-get -s build-dep --arch-only qemu | egrep ^Inst | fgrep '[al= l]' | cut -d\ -f2) =20 ENV FEATURES docs --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1U/ORcIBWROYJWFUfscqlCNl6s4lUhCxpTPOOlyuiKA=; b=aSDSBtYkZ4Hwxw+OI7SeNF9CCMopPvsq8TGspXSHe6XjzCAg8ONhfqn8uvppv6Esbh nEHRP1ZTX6S8xkSNZIX0la/AWGlveYMe1ZGb8JFvugUyad6D6hkiBsebZWOwj6OqeBpi kAatXwrot2LDbG1UQ4J4c7XS0fcCiv+cu1JaiUz9o9r63YaMw+RM5EmJJxsiIIRwC21v AOhz4oeoo9XbiD1IxhUiAkemW2QQjk4EhSfjP4R/XmwL4Ae4On7pCLXC81ArkKvRS4PY +OyhNyFx5+FO1GeOWnbAo7rUuoxVPD/tCjStCCiCInUayHH0XyLdD7zpeILsjy1H18Fq lfMA== X-Gm-Message-State: AOAM5328r0G53mUIuHRGhOVWNrGJ97zIncyQgnieQziu02/voroS+SF0 +MMYS8lQ13H22YovszKHNxBB8g== X-Google-Smtp-Source: ABdhPJy+4RqgFmCrlGn2oFI+qTZcBFcJ8CxGvIYNeqa9PTbQJQ1JBtmb0m80fzywiI9L97mT9kwEkg== X-Received: by 2002:aa7:d4ca:: with SMTP id t10mr4062784edr.388.1615392011409; Wed, 10 Mar 2021 08:00:11 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 06/15] .editorconfig: update the automatic mode setting for Emacs Date: Wed, 10 Mar 2021 15:59:53 +0000 Message-Id: <20210310160002.11659-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) It seems the editor specific keywords have been deprecated in the main editorconfig plugin: https://github.com/editorconfig/editorconfig-emacs#file-type-file_type_ex= t-file_type_emacs Update the keywords to the suggested one and point users at the extension. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Marc-Andr=C3=A9 Lureau Message-Id: <20210305144839.6558-1-alex.bennee@linaro.org> diff --git a/.editorconfig b/.editorconfig index 22681d91c6..7303759ed7 100644 --- a/.editorconfig +++ b/.editorconfig @@ -4,6 +4,11 @@ # plugin. # # Check https://editorconfig.org for details. +# +# Emacs: you need https://github.com/10sr/editorconfig-custom-majormode-el +# to automatically enable the appropriate major-mode for your files +# that aren't already caught by your existing config. +# =20 root =3D true =20 @@ -15,17 +20,17 @@ charset =3D utf-8 [*.mak] indent_style =3D tab indent_size =3D 8 -file_type_emacs =3D makefile +emacs_mode =3D makefile =20 [Makefile*] indent_style =3D tab indent_size =3D 8 -file_type_emacs =3D makefile +emacs_mode =3D makefile =20 [*.{c,h,c.inc,h.inc}] indent_style =3D space indent_size =3D 4 -file_type_emacs =3D c +emacs_mode =3D c =20 [*.sh] indent_style =3D space @@ -34,11 +39,11 @@ indent_size =3D 4 [*.{s,S}] indent_style =3D tab indent_size =3D 8 -file_type_emacs =3D asm +emacs_mode =3D asm =20 [*.{vert,frag}] -file_type_emacs =3D glsl +emacs_mode =3D glsl =20 [*.json] indent_style =3D space -file_type_emacs =3D python +emacs_mode =3D python --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xgE9V9DtnRL9QrGkXlRiVpJ3oUWVlB8PL3fF6X62Kk8=; b=L3tQ8ynNvFkn9RsTdwL2JfLZdGyXBW1DYJ0eMwLrydGrovhxN/l9/EEkz4YZidDV/I wip3S1UX8biezMH+tsrI+UFILlp6EE8YiTSlt993AnzztVvhXfj3YlD8auu3BgPTNVZd fJaT4/TwjC6Xkzbg6tONDy7TXyuLi7ivb4ZS4dx+CIRlTIOe2xh3JCv/a/Z66ZepLIlw 4OuB8UOcLj7XSMQXfIXN0kGspHuDVpoyBQU3jTMFNVg9/bSQpilaczpIfLzn52tqLx/b N8XIZV0UXenSvtDwWgrwxu+w1H7lmOwzcTVP78wET04qDBlyfMPzvvoJJjl/s9wWiejf cq0g== X-Gm-Message-State: AOAM533IsEh3TvER2E4zm/fi85ylVHDbr+4kEXZCk7RD/vEHfJNCdY3p NLwi1GecF+oe1Vm7RrNVXlog0YiNlaqi0w== X-Google-Smtp-Source: ABdhPJypCcrhyi0lXP3nW8y5TauXCmLPfx722gWZMcPHOHeub1PVdX9B6AtrjsLCu3L3waGtEaCfYg== X-Received: by 2002:a17:907:7637:: with SMTP id jy23mr4265658ejc.12.1615392014620; Wed, 10 Mar 2021 08:00:14 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 07/15] hw/board: promote fdt from ARM VirtMachineState to MachineState Date: Wed, 10 Mar 2021 15:59:54 +0000 Message-Id: <20210310160002.11659-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, "open list:Virt" , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The use of FDT's is quite common across our various platforms. To allow the guest loader to tweak it we need to make it available in the generic state. This creates the field and migrates the initial user to use the generic field. Other boards will be updated in later patches. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210303173642.3805-2-alex.bennee@linaro.org> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index ee9a93101e..921416f918 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -153,7 +153,6 @@ struct VirtMachineState { MemMapEntry *memmap; char *pciehb_nodename; const int *irqmap; - void *fdt; int fdt_size; uint32_t clock_phandle; uint32_t gic_phandle; diff --git a/include/hw/boards.h b/include/hw/boards.h index a46dfe5d1a..5fda5fd128 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -258,6 +258,7 @@ struct MachineState { =20 /*< public >*/ =20 + void *fdt; char *dtb; char *dumpdtb; int phandle_start; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 371147f3ae..c08bf11297 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -218,14 +218,14 @@ static bool cpu_type_valid(const char *cpu) return false; } =20 -static void create_kaslr_seed(VirtMachineState *vms, const char *node) +static void create_kaslr_seed(MachineState *ms, const char *node) { uint64_t seed; =20 if (qemu_guest_getrandom(&seed, sizeof(seed), NULL)) { return; } - qemu_fdt_setprop_u64(vms->fdt, node, "kaslr-seed", seed); + qemu_fdt_setprop_u64(ms->fdt, node, "kaslr-seed", seed); } =20 static void create_fdt(VirtMachineState *vms) @@ -239,7 +239,7 @@ static void create_fdt(VirtMachineState *vms) exit(1); } =20 - vms->fdt =3D fdt; + ms->fdt =3D fdt; =20 /* Header */ qemu_fdt_setprop_string(fdt, "/", "compatible", "linux,dummy-virt"); @@ -248,11 +248,11 @@ static void create_fdt(VirtMachineState *vms) =20 /* /chosen must exist for load_dtb to fill in necessary properties lat= er */ qemu_fdt_add_subnode(fdt, "/chosen"); - create_kaslr_seed(vms, "/chosen"); + create_kaslr_seed(ms, "/chosen"); =20 if (vms->secure) { qemu_fdt_add_subnode(fdt, "/secure-chosen"); - create_kaslr_seed(vms, "/secure-chosen"); + create_kaslr_seed(ms, "/secure-chosen"); } =20 /* Clock node, for the benefit of the UART. The kernel device tree @@ -316,6 +316,7 @@ static void fdt_add_timer_nodes(const VirtMachineState = *vms) ARMCPU *armcpu; VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms =3D MACHINE(vms); =20 if (vmc->claim_edge_triggered_timers) { irqflags =3D GIC_FDT_IRQ_FLAGS_EDGE_LO_HI; @@ -327,19 +328,19 @@ static void fdt_add_timer_nodes(const VirtMachineStat= e *vms) (1 << MACHINE(vms)->smp.cpus) - 1); } =20 - qemu_fdt_add_subnode(vms->fdt, "/timer"); + qemu_fdt_add_subnode(ms->fdt, "/timer"); =20 armcpu =3D ARM_CPU(qemu_get_cpu(0)); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] =3D "arm,armv8-timer\0arm,armv7-timer"; - qemu_fdt_setprop(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop(ms->fdt, "/timer", "compatible", compat, sizeof(compat)); } else { - qemu_fdt_setprop_string(vms->fdt, "/timer", "compatible", + qemu_fdt_setprop_string(ms->fdt, "/timer", "compatible", "arm,armv7-timer"); } - qemu_fdt_setprop(vms->fdt, "/timer", "always-on", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, "/timer", "interrupts", + qemu_fdt_setprop(ms->fdt, "/timer", "always-on", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, "/timer", "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflag= s, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqfla= gs, GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, @@ -375,35 +376,35 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) } } =20 - qemu_fdt_add_subnode(vms->fdt, "/cpus"); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#address-cells", addr_cells); - qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#size-cells", 0x0); + qemu_fdt_add_subnode(ms->fdt, "/cpus"); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", addr_cells); + qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0); =20 for (cpu =3D smp_cpus - 1; cpu >=3D 0; cpu--) { char *nodename =3D g_strdup_printf("/cpus/cpu@%d", cpu); ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(cpu)); CPUState *cs =3D CPU(armcpu); =20 - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "cpu"); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu"); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", armcpu->dtb_compatible); =20 if (vms->psci_conduit !=3D QEMU_PSCI_CONDUIT_DISABLED && smp_cpus = > 1) { - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_setprop_string(ms->fdt, nodename, "enable-method", "psci"); } =20 if (addr_cells =3D=3D 2) { - qemu_fdt_setprop_u64(vms->fdt, nodename, "reg", + qemu_fdt_setprop_u64(ms->fdt, nodename, "reg", armcpu->mp_affinity); } else { - qemu_fdt_setprop_cell(vms->fdt, nodename, "reg", + qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", armcpu->mp_affinity); } =20 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { - qemu_fdt_setprop_cell(vms->fdt, nodename, "numa-node-id", + qemu_fdt_setprop_cell(ms->fdt, nodename, "numa-node-id", ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } =20 @@ -414,71 +415,74 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) static void fdt_add_its_gic_node(VirtMachineState *vms) { char *nodename; + MachineState *ms =3D MACHINE(vms); =20 - vms->msi_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->msi_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); nodename =3D g_strdup_printf("/intc/its@%" PRIx64, vms->memmap[VIRT_GIC_ITS].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3-its"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_ITS].base, 2, vms->memmap[VIRT_GIC_ITS].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } =20 static void fdt_add_v2m_gic_node(VirtMachineState *vms) { + MachineState *ms =3D MACHINE(vms); char *nodename; =20 nodename =3D g_strdup_printf("/intc/v2m@%" PRIx64, vms->memmap[VIRT_GIC_V2M].base); - vms->msi_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + vms->msi_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v2m-frame"); - qemu_fdt_setprop(vms->fdt, nodename, "msi-controller", NULL, 0); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop(ms->fdt, nodename, "msi-controller", NULL, 0); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_V2M].base, 2, vms->memmap[VIRT_GIC_V2M].size); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->msi_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->msi_phandle); g_free(nodename); } =20 static void fdt_add_gic_node(VirtMachineState *vms) { + MachineState *ms =3D MACHINE(vms); char *nodename; =20 - vms->gic_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); - qemu_fdt_setprop_cell(vms->fdt, "/", "interrupt-parent", vms->gic_phan= dle); + vms->gic_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_setprop_cell(ms->fdt, "/", "interrupt-parent", vms->gic_phand= le); =20 nodename =3D g_strdup_printf("/intc@%" PRIx64, vms->memmap[VIRT_GIC_DIST].base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 3); - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-controller", NULL, 0); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 0x2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 0x2); - qemu_fdt_setprop(vms->fdt, nodename, "ranges", NULL, 0); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 3); + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 0x2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 0x2); + qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0); if (vms->gic_version =3D=3D VIRT_GIC_VERSION_3) { int nb_redist_regions =3D virt_gicv3_redist_region_count(vms); =20 - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,gic-v3"); =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, + qemu_fdt_setprop_cell(ms->fdt, nodename, "#redistributor-regions", nb_redist_regions); =20 if (nb_redist_regions =3D=3D 1) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_REDIST].b= ase, 2, vms->memmap[VIRT_GIC_REDIST].s= ize); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].base, 2, vms->memmap[VIRT_GIC_DIST].size, 2, vms->memmap[VIRT_GIC_REDIST].base, @@ -488,22 +492,22 @@ static void fdt_add_gic_node(VirtMachineState *vms) } =20 if (vms->virt) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IR= Q, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } else { /* 'cortex-a15-gic' means 'GIC v2' */ - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "arm,cortex-a15-gic"); if (!vms->virt) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_CPU].base, 2, vms->memmap[VIRT_GIC_CPU].size= ); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, vms->memmap[VIRT_GIC_DIST].bas= e, 2, vms->memmap[VIRT_GIC_DIST].siz= e, 2, vms->memmap[VIRT_GIC_CPU].base, @@ -512,13 +516,13 @@ static void fdt_add_gic_node(VirtMachineState *vms) 2, vms->memmap[VIRT_GIC_HYP].size, 2, vms->memmap[VIRT_GIC_VCPU].bas= e, 2, vms->memmap[VIRT_GIC_VCPU].siz= e); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IR= Q, GIC_FDT_IRQ_FLAGS_LEVEL_HI); } } =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", vms->gic_phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", vms->gic_phandle); g_free(nodename); } =20 @@ -526,6 +530,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *v= ms) { ARMCPU *armcpu =3D ARM_CPU(first_cpu); uint32_t irqflags =3D GIC_FDT_IRQ_FLAGS_LEVEL_HI; + MachineState *ms =3D MACHINE(vms); =20 if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); @@ -538,12 +543,12 @@ static void fdt_add_pmu_nodes(const VirtMachineState = *vms) (1 << MACHINE(vms)->smp.cpus) - 1); } =20 - qemu_fdt_add_subnode(vms->fdt, "/pmu"); + qemu_fdt_add_subnode(ms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] =3D "arm,armv8-pmuv3"; - qemu_fdt_setprop(vms->fdt, "/pmu", "compatible", + qemu_fdt_setprop(ms->fdt, "/pmu", "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_cells(vms->fdt, "/pmu", "interrupts", + qemu_fdt_setprop_cells(ms->fdt, "/pmu", "interrupts", GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_PMU_IRQ, irqf= lags); } } @@ -749,6 +754,7 @@ static void create_uart(const VirtMachineState *vms, in= t uart, const char clocknames[] =3D "uartclk\0apb_pclk"; DeviceState *dev =3D qdev_new(TYPE_PL011); SysBusDevice *s =3D SYS_BUS_DEVICE(dev); + MachineState *ms =3D MACHINE(vms); =20 qdev_prop_set_chr(dev, "chardev", chr); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -757,28 +763,28 @@ static void create_uart(const VirtMachineState *vms, = int uart, sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl011@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_add_subnode(ms->fdt, nodename); /* Note that we can't use setprop_string because of the embedded NUL */ - qemu_fdt_setprop(vms->fdt, nodename, "compatible", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cells(vms->fdt, nodename, "clocks", + qemu_fdt_setprop_cells(ms->fdt, nodename, "clocks", vms->clock_phandle, vms->clock_phandle); - qemu_fdt_setprop(vms->fdt, nodename, "clock-names", + qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, sizeof(clocknames)); =20 if (uart =3D=3D VIRT_UART) { - qemu_fdt_setprop_string(vms->fdt, "/chosen", "stdout-path", nodena= me); + qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodenam= e); } else { /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay= "); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"= ); =20 - qemu_fdt_setprop_string(vms->fdt, "/secure-chosen", "stdout-path", + qemu_fdt_setprop_string(ms->fdt, "/secure-chosen", "stdout-path", nodename); } =20 @@ -792,19 +798,20 @@ static void create_rtc(const VirtMachineState *vms) hwaddr size =3D vms->memmap[VIRT_RTC].size; int irq =3D vms->irqmap[VIRT_RTC]; const char compat[] =3D "arm,pl031\0arm,primecell"; + MachineState *ms =3D MACHINE(vms); =20 sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl031@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(comp= at)); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle= ); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); g_free(nodename); } =20 @@ -821,32 +828,30 @@ static void virt_powerdown_req(Notifier *n, void *opa= que) } } =20 -static void create_gpio_keys(const VirtMachineState *vms, - DeviceState *pl061_dev, +static void create_gpio_keys(char *fdt, DeviceState *pl061_dev, uint32_t phandle) { gpio_key_dev =3D sysbus_create_simple("gpio-key", -1, qdev_get_gpio_in(pl061_dev, 3)); =20 - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys", "compatible", "gpio-ke= ys"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#size-cells", 0); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys", "#address-cells", 1); + qemu_fdt_add_subnode(fdt, "/gpio-keys"); + qemu_fdt_setprop_string(fdt, "/gpio-keys", "compatible", "gpio-keys"); + qemu_fdt_setprop_cell(fdt, "/gpio-keys", "#size-cells", 0); + qemu_fdt_setprop_cell(fdt, "/gpio-keys", "#address-cells", 1); =20 - qemu_fdt_add_subnode(vms->fdt, "/gpio-keys/poweroff"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_add_subnode(fdt, "/gpio-keys/poweroff"); + qemu_fdt_setprop_string(fdt, "/gpio-keys/poweroff", "label", "GPIO Key Poweroff"); - qemu_fdt_setprop_cell(vms->fdt, "/gpio-keys/poweroff", "linux,code", + qemu_fdt_setprop_cell(fdt, "/gpio-keys/poweroff", "linux,code", KEY_POWER); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-keys/poweroff", + qemu_fdt_setprop_cells(fdt, "/gpio-keys/poweroff", "gpios", phandle, 3, 0); } =20 #define SECURE_GPIO_POWEROFF 0 #define SECURE_GPIO_RESET 1 =20 -static void create_secure_gpio_pwr(const VirtMachineState *vms, - DeviceState *pl061_dev, +static void create_secure_gpio_pwr(char *fdt, DeviceState *pl061_dev, uint32_t phandle) { DeviceState *gpio_pwr_dev; @@ -860,22 +865,22 @@ static void create_secure_gpio_pwr(const VirtMachineS= tate *vms, qdev_connect_gpio_out(pl061_dev, SECURE_GPIO_POWEROFF, qdev_get_gpio_in_named(gpio_pwr_dev, "shutdown",= 0)); =20 - qemu_fdt_add_subnode(vms->fdt, "/gpio-poweroff"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "compatible", + qemu_fdt_add_subnode(fdt, "/gpio-poweroff"); + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "compatible", "gpio-poweroff"); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-poweroff", + qemu_fdt_setprop_cells(fdt, "/gpio-poweroff", "gpios", phandle, SECURE_GPIO_POWEROFF, 0); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "status", "disable= d"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-poweroff", "secure-status", + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "status", "disabled"); + qemu_fdt_setprop_string(fdt, "/gpio-poweroff", "secure-status", "okay"); =20 - qemu_fdt_add_subnode(vms->fdt, "/gpio-restart"); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "compatible", + qemu_fdt_add_subnode(fdt, "/gpio-restart"); + qemu_fdt_setprop_string(fdt, "/gpio-restart", "compatible", "gpio-restart"); - qemu_fdt_setprop_cells(vms->fdt, "/gpio-restart", + qemu_fdt_setprop_cells(fdt, "/gpio-restart", "gpios", phandle, SECURE_GPIO_RESET, 0); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "status", "disabled= "); - qemu_fdt_setprop_string(vms->fdt, "/gpio-restart", "secure-status", + qemu_fdt_setprop_string(fdt, "/gpio-restart", "status", "disabled"); + qemu_fdt_setprop_string(fdt, "/gpio-restart", "secure-status", "okay"); } =20 @@ -889,6 +894,7 @@ static void create_gpio_devices(const VirtMachineState = *vms, int gpio, int irq =3D vms->irqmap[gpio]; const char compat[] =3D "arm,pl061\0arm,primecell"; SysBusDevice *s; + MachineState *ms =3D MACHINE(vms); =20 pl061_dev =3D qdev_new("pl061"); s =3D SYS_BUS_DEVICE(pl061_dev); @@ -896,33 +902,33 @@ static void create_gpio_devices(const VirtMachineStat= e *vms, int gpio, memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); =20 - uint32_t phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + uint32_t phandle =3D qemu_fdt_alloc_phandle(ms->fdt); nodename =3D g_strdup_printf("/pl061@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "compatible", compat, sizeof(comp= at)); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#gpio-cells", 2); - qemu_fdt_setprop(vms->fdt, nodename, "gpio-controller", NULL, 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#gpio-cells", 2); + qemu_fdt_setprop(ms->fdt, nodename, "gpio-controller", NULL, 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_cell(vms->fdt, nodename, "clocks", vms->clock_phandle= ); - qemu_fdt_setprop_string(vms->fdt, nodename, "clock-names", "apb_pclk"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", phandle); + qemu_fdt_setprop_cell(ms->fdt, nodename, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "clock-names", "apb_pclk"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", phandle); =20 if (gpio !=3D VIRT_GPIO) { /* Mark as not usable by the normal world */ - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay= "); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"= ); } g_free(nodename); =20 /* Child gpio devices */ if (gpio =3D=3D VIRT_GPIO) { - create_gpio_keys(vms, pl061_dev, phandle); + create_gpio_keys(ms->fdt, pl061_dev, phandle); } else { - create_secure_gpio_pwr(vms, pl061_dev, phandle); + create_secure_gpio_pwr(ms->fdt, pl061_dev, phandle); } } =20 @@ -930,6 +936,7 @@ static void create_virtio_devices(const VirtMachineStat= e *vms) { int i; hwaddr size =3D vms->memmap[VIRT_MMIO].size; + MachineState *ms =3D MACHINE(vms); =20 /* We create the transports in forwards order. Since qbus_realize() * prepends (not appends) new child buses, the incrementing loop below= will @@ -979,15 +986,15 @@ static void create_virtio_devices(const VirtMachineSt= ate *vms) hwaddr base =3D vms->memmap[VIRT_MMIO].base + i * size; =20 nodename =3D g_strdup_printf("/virtio_mmio@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "virtio,mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); } } @@ -1068,17 +1075,18 @@ static void virt_flash_fdt(VirtMachineState *vms, { hwaddr flashsize =3D vms->memmap[VIRT_FLASH].size / 2; hwaddr flashbase =3D vms->memmap[VIRT_FLASH].base; + MachineState *ms =3D MACHINE(vms); char *nodename; =20 if (sysmem =3D=3D secure_sysmem) { /* Report both flash devices as a single node in the DT */ nodename =3D g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsiz= e); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } else { /* @@ -1086,21 +1094,21 @@ static void virt_flash_fdt(VirtMachineState *vms, * only visible to the secure world. */ nodename =3D g_strdup_printf("/secflash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase, 2, flashsize); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay= "); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"= ); g_free(nodename); =20 nodename =3D g_strdup_printf("/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cfi-fla= sh"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flas= h"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, flashbase + flashsize, 2, flashsiz= e); - qemu_fdt_setprop_cell(vms->fdt, nodename, "bank-width", 4); + qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4); g_free(nodename); } } @@ -1167,17 +1175,17 @@ static FWCfgState *create_fw_cfg(const VirtMachineS= tate *vms, AddressSpace *as) fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); =20 nodename =3D g_strdup_printf("/fw-cfg@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "qemu,fw-cfg-mmio"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, size); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); return fw_cfg; } =20 -static void create_pcie_irq_map(const VirtMachineState *vms, +static void create_pcie_irq_map(const MachineState *ms, uint32_t gic_phandle, int first_irq, const char *nodename) { @@ -1205,10 +1213,10 @@ static void create_pcie_irq_map(const VirtMachineSt= ate *vms, } } =20 - qemu_fdt_setprop(vms->fdt, nodename, "interrupt-map", + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-map", full_irq_map, sizeof(full_irq_map)); =20 - qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupt-map-mask", + qemu_fdt_setprop_cells(ms->fdt, nodename, "interrupt-map-mask", cpu_to_be16(PCI_DEVFN(3, 0)), /* Slot 3 */ 0, 0, 0x7 /* PCI irq */); @@ -1225,6 +1233,7 @@ static void create_smmu(const VirtMachineState *vms, hwaddr size =3D vms->memmap[VIRT_SMMU].size; const char irq_names[] =3D "eventq\0priq\0cmdq-sync\0gerror"; DeviceState *dev; + MachineState *ms =3D MACHINE(vms); =20 if (vms->iommu !=3D VIRT_IOMMU_SMMUV3 || !vms->iommu_phandle) { return; @@ -1242,26 +1251,26 @@ static void create_smmu(const VirtMachineState *vms, } =20 node =3D g_strdup_printf("/smmuv3@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", 2, base, 2, size); + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 2, base, 2, size); =20 - qemu_fdt_setprop_cells(vms->fdt, node, "interrupts", + qemu_fdt_setprop_cells(ms->fdt, node, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq , GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 1, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 2, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, GIC_FDT_IRQ_TYPE_SPI, irq + 3, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); =20 - qemu_fdt_setprop(vms->fdt, node, "interrupt-names", irq_names, + qemu_fdt_setprop(ms->fdt, node, "interrupt-names", irq_names, sizeof(irq_names)); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "clocks", vms->clock_phandle); - qemu_fdt_setprop_string(vms->fdt, node, "clock-names", "apb_pclk"); - qemu_fdt_setprop(vms->fdt, node, "dma-coherent", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, node, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(ms->fdt, node, "clock-names", "apb_pclk"); + qemu_fdt_setprop(ms->fdt, node, "dma-coherent", NULL, 0); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); } =20 @@ -1269,22 +1278,23 @@ static void create_virtio_iommu_dt_bindings(VirtMac= hineState *vms) { const char compat[] =3D "virtio,pci-iommu"; uint16_t bdf =3D vms->virtio_iommu_bdf; + MachineState *ms =3D MACHINE(vms); char *node; =20 - vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); =20 node =3D g_strdup_printf("%s/virtio_iommu@%d", vms->pciehb_nodename, b= df); - qemu_fdt_add_subnode(vms->fdt, node); - qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat)); - qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", + qemu_fdt_add_subnode(ms->fdt, node); + qemu_fdt_setprop(ms->fdt, node, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(ms->fdt, node, "reg", 1, bdf << 8, 1, 0, 1, 0, 1, 0, 1, 0); =20 - qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1); - qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle); + qemu_fdt_setprop_cell(ms->fdt, node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(ms->fdt, node, "phandle", vms->iommu_phandle); g_free(node); =20 - qemu_fdt_setprop_cells(vms->fdt, vms->pciehb_nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, vms->pciehb_nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, bdf, bdf + 1, vms->iommu_phandle, bdf + 1, 0xffff - = bdf); } @@ -1309,6 +1319,7 @@ static void create_pcie(VirtMachineState *vms) char *nodename; int i, ecam_id; PCIHostState *pci; + MachineState *ms =3D MACHINE(vms); =20 dev =3D qdev_new(TYPE_GPEX_HOST); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); @@ -1369,27 +1380,27 @@ static void create_pcie(VirtMachineState *vms) } =20 nodename =3D vms->pciehb_nodename =3D g_strdup_printf("/pcie@%" PRIx64= , base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "pci-host-ecam-generic"); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "pci"); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#address-cells", 3); - qemu_fdt_setprop_cell(vms->fdt, nodename, "#size-cells", 2); - qemu_fdt_setprop_cell(vms->fdt, nodename, "linux,pci-domain", 0); - qemu_fdt_setprop_cells(vms->fdt, nodename, "bus-range", 0, + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "pci"); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 3); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0); + qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0, nr_pcie_buses - 1); - qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); + qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); =20 if (vms->msi_phandle) { - qemu_fdt_setprop_cells(vms->fdt, nodename, "msi-parent", + qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-parent", vms->msi_phandle); } =20 - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base_ecam, 2, size_ecam); =20 if (vms->highmem) { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, @@ -1398,23 +1409,23 @@ static void create_pcie(VirtMachineState *vms) 2, base_mmio_high, 2, base_mmio_high, 2, size_mmio_high); } else { - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "ranges", + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, 2, base_mmio, 2, size_mmio); } =20 - qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 1); - create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); + create_pcie_irq_map(ms, vms->gic_phandle, irq, nodename); =20 if (vms->iommu) { - vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + vms->iommu_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); =20 switch (vms->iommu) { case VIRT_IOMMU_SMMUV3: create_smmu(vms, vms->bus); - qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", + qemu_fdt_setprop_cells(ms->fdt, nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, 0x10000); break; default: @@ -1466,17 +1477,18 @@ static void create_secure_ram(VirtMachineState *vms, char *nodename; hwaddr base =3D vms->memmap[VIRT_SECURE_MEM].base; hwaddr size =3D vms->memmap[VIRT_SECURE_MEM].size; + MachineState *ms =3D MACHINE(vms); =20 memory_region_init_ram(secram, NULL, "virt.secure-ram", size, &error_fatal); memory_region_add_subregion(secure_sysmem, base, secram); =20 nodename =3D g_strdup_printf("/secram@%" PRIx64, base); - qemu_fdt_add_subnode(vms->fdt, nodename); - qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "memory"); - qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", 2, base, 2, si= ze); - qemu_fdt_setprop_string(vms->fdt, nodename, "status", "disabled"); - qemu_fdt_setprop_string(vms->fdt, nodename, "secure-status", "okay"); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "memory"); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 2, base, 2, siz= e); + qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); + qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); =20 if (secure_tag_sysmem) { create_tag_ram(secure_tag_sysmem, base, size, "mach-virt.secure-ta= g"); @@ -1489,9 +1501,11 @@ static void *machvirt_dtb(const struct arm_boot_info= *binfo, int *fdt_size) { const VirtMachineState *board =3D container_of(binfo, VirtMachineState, bootinfo); + MachineState *ms =3D MACHINE(board); + =20 *fdt_size =3D board->fdt_size; - return board->fdt; + return ms->fdt; } =20 static void virt_build_smbios(VirtMachineState *vms) @@ -1539,7 +1553,7 @@ void virt_machine_done(Notifier *notifier, void *data) * while qemu takes charge of the qom stuff. */ if (info->dtb_filename =3D=3D NULL) { - platform_bus_add_all_fdt_nodes(vms->fdt, "/intc", + platform_bus_add_all_fdt_nodes(ms->fdt, "/intc", vms->memmap[VIRT_PLATFORM_BUS].base, vms->memmap[VIRT_PLATFORM_BUS].size, vms->irqmap[VIRT_PLATFORM_BUS]); --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615393687; cv=none; d=zohomail.com; s=zohoarc; b=Y173jdekCmmLWL1033eCxIZVcH604+zt/JmJalIloF8TmYffNL8ATXVzPGxKFgy7/TDLU3PLqUf+9Ec8o24HFZMKJEnQKEWacMqFqFJ0OAJa+X3H35dviwaVRM4bllwchxTMCnanIcX7EhgymWVtwo5fkJKZSkRcqTl6LZn4nPk= ARC-Message-Signature: i=1; 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Wed, 10 Mar 2021 08:00:13 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 08/15] hw/riscv: migrate fdt field to generic MachineState Date: Wed, 10 Mar 2021 15:59:55 +0000 Message-Id: <20210310160002.11659-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Sagar Karandikar , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is a mechanical change to make the fdt available through MachineState. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 84b7a3848f..632da52018 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -41,7 +41,6 @@ struct RISCVVirtState { DeviceState *plic[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; =20 - void *fdt; int fdt_size; }; =20 diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4f0c2fbca0..0b39101a5e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -195,14 +195,14 @@ static void create_fdt(RISCVVirtState *s, const MemMa= pEntry *memmap, hwaddr flashbase =3D virt_memmap[VIRT_FLASH].base; =20 if (mc->dtb) { - fdt =3D s->fdt =3D load_device_tree(mc->dtb, &s->fdt_size); + fdt =3D mc->fdt =3D load_device_tree(mc->dtb, &s->fdt_size); if (!fdt) { error_report("load_device_tree() failed"); exit(1); } goto update_bootargs; } else { - fdt =3D s->fdt =3D create_device_tree(&s->fdt_size); + fdt =3D mc->fdt =3D create_device_tree(&s->fdt_size); if (!fdt) { error_report("create_device_tree() failed"); exit(1); @@ -444,12 +444,12 @@ static void create_fdt(RISCVVirtState *s, const MemMa= pEntry *memmap, g_free(name); =20 name =3D g_strdup_printf("/soc/flash@%" PRIx64, flashbase); - qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_string(s->fdt, name, "compatible", "cfi-flash"); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + qemu_fdt_add_subnode(mc->fdt, name); + qemu_fdt_setprop_string(mc->fdt, name, "compatible", "cfi-flash"); + qemu_fdt_setprop_sized_cells(mc->fdt, name, "reg", 2, flashbase, 2, flashsize, 2, flashbase + flashsize, 2, flashsize); - qemu_fdt_setprop_cell(s->fdt, name, "bank-width", 4); + qemu_fdt_setprop_cell(mc->fdt, name, "bank-width", 4); g_free(name); =20 update_bootargs: @@ -667,9 +667,9 @@ static void virt_machine_init(MachineState *machine) hwaddr end =3D riscv_load_initrd(machine->initrd_filename, machine->ram_size, kernel_entry, &start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-start", start); - qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", + qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-e= nd", end); } } else { @@ -690,12 +690,12 @@ static void virt_machine_init(MachineState *machine) =20 /* Compute the fdt load address in dram */ fdt_load_addr =3D riscv_load_fdt(memmap[VIRT_DRAM].base, - machine->ram_size, s->fdt); + machine->ram_size, machine->fdt); /* load the reset vector */ riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, virt_memmap[VIRT_MROM].base, virt_memmap[VIRT_MROM].size, kernel_entry, - fdt_load_addr, s->fdt); + fdt_load_addr, machine->fdt); =20 /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base); --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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b=NQtsvq8pg3UkI4y6togsbFSNveeDIPEIklXgNdkXEikWITWZQ/SMPT3PaGaHFdr7NX H1u+PDGRfqE9aiCLUJZYz0uvzroVXUmRVWWalqRNp0z7xAH97PLFkNh303jaga+iDYww cJifQ95sZixek/+guhYm+skfPTdQeKrcgLCoC2Hb9gz3+CZP10FS9/3EzgCq5J2TEfQg HJzW+xIN2woFxjuxXWxWfhkpHNjjO8mioAZ4znjsK1P3vQtqNAU2VDWhld2F6ZV4N/2f vgMlcYnllvZKWE2S+wDqq6vR7lr5eS6otO7g1f8IGmR2Jn3IQlJe3m5rS5DnLUpjTdGE Lwpg== X-Gm-Message-State: AOAM531LGl06GjikSzic/POS5IU0+EAF6Ygemq1dTL1RLLPdaQwGV2I8 zxQR4AfySI+Mmk55Pau8ss8E7g== X-Google-Smtp-Source: ABdhPJz7g+5ULJ/0KsDTaVZVnzHb6WhyTh97a3Lua8M387fMYPqMzJYHTqRsq6lZRza9M5yXHKwXug== X-Received: by 2002:a17:906:1444:: with SMTP id q4mr4474861ejc.343.1615392476168; Wed, 10 Mar 2021 08:07:56 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 09/15] device_tree: add qemu_fdt_setprop_string_array helper Date: Wed, 10 Mar 2021 15:59:56 +0000 Message-Id: <20210310160002.11659-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) A string array in device tree is simply a series of \0 terminated strings next to each other. As libfdt doesn't support that directly we need to build it ourselves. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-4-alex.bennee@linaro.org> diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 982c89345f..8a2fe55622 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -70,6 +70,23 @@ int qemu_fdt_setprop_u64(void *fdt, const char *node_pat= h, const char *property, uint64_t val); int qemu_fdt_setprop_string(void *fdt, const char *node_path, const char *property, const char *string); + +/** + * qemu_fdt_setprop_string_array: set a string array property + * + * @fdt: pointer to the dt blob + * @name: node name + * @prop: property array + * @array: pointer to an array of string pointers + * @len: length of array + * + * assigns a string array to a property. This function converts and + * array of strings to a sequential string with \0 separators before + * setting the property. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, + const char *prop, char **array, int len); + int qemu_fdt_setprop_phandle(void *fdt, const char *node_path, const char *property, const char *target_node_path); diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c index b9a3ddc518..2691c58cf6 100644 --- a/softmmu/device_tree.c +++ b/softmmu/device_tree.c @@ -21,6 +21,7 @@ #include "qemu/error-report.h" #include "qemu/option.h" #include "qemu/bswap.h" +#include "qemu/cutils.h" #include "sysemu/device_tree.h" #include "sysemu/sysemu.h" #include "hw/loader.h" @@ -397,6 +398,31 @@ int qemu_fdt_setprop_string(void *fdt, const char *nod= e_path, return r; } =20 +/* + * libfdt doesn't allow us to add string arrays directly but they are + * test a series of null terminated strings with a length. We build + * the string up here so we can calculate the final length. + */ +int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, + const char *prop, char **array, int len) +{ + int ret, i, total_len =3D 0; + char *str, *p; + for (i =3D 0; i < len; i++) { + total_len +=3D strlen(array[i]) + 1; + } + p =3D str =3D g_malloc0(total_len); + for (i =3D 0; i < len; i++) { + int len =3D strlen(array[i]) + 1; + pstrcpy(p, len, array[i]); + p +=3D len; + } + + ret =3D qemu_fdt_setprop(fdt, node_path, prop, str, total_len); + g_free(str); + return ret; +} + const void *qemu_fdt_getprop(void *fdt, const char *node_path, const char *property, int *lenp, Error **errp) { --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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b=p402tBrJzkGV9YfTJgepGJzYTyMG9tSCzA46Amuz1JuY2iRzP/j2kxsf6IxGDg01rv e4K/fZiN7BvRwrN9AQdQeaDQL5it2osiyeHvvLhVKXHxExdFJMF7HlCGizGHX19CYI32 uGx7KJnACZBkRZ9TS3PDRujie7HkvbFVmMdszZquaVUSiFPaQCzg0OxkrcLmOHn42ZPE 0zczAw2i4F64y0cS1JaQ9Av7hZ7ZhL8UwomBrkZO2q2HD7TZOJ3MowBtLycYVj3SfLGv ncLBAXXM7uL0KMbmlrTS/90x7KZPvIgpZrBTE1AwXLdphgi57I/a1kjQAF0qAv9TVQhU 6Yzw== X-Gm-Message-State: AOAM530Ht7ZvLHMJIQiJEO2LihTNHJwHfpk4ilU1MaaTJOrgJ/CAKLcn roEgxl/gWv0ADayZJdXRnBpV3g== X-Google-Smtp-Source: ABdhPJyGenWSeK/VJOBKr8inP2WB4PhGRMZslLc676+0vaYW72E7G8zKRp4KWGr0kLHYMqH4GnW6Qg== X-Received: by 2002:a17:906:ae88:: with SMTP id md8mr4256142ejb.264.1615392019543; Wed, 10 Mar 2021 08:00:19 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 10/15] hw/core: implement a guest-loader to support static hypervisor guests Date: Wed, 10 Mar 2021 15:59:57 +0000 Message-Id: <20210310160002.11659-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Hypervisors, especially type-1 ones, need the firmware/bootcode to put their initial guest somewhere in memory and pass the information to it via platform data. The guest-loader is modelled after the generic loader for exactly this sort of purpose: $QEMU $ARGS -kernel ~/xen.git/xen/xen \ -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \ -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"root= =3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \ -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org> diff --git a/hw/core/guest-loader.h b/hw/core/guest-loader.h new file mode 100644 index 0000000000..07f4b4884b --- /dev/null +++ b/hw/core/guest-loader.h @@ -0,0 +1,34 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Benn=C3=A9e + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef GUEST_LOADER_H +#define GUEST_LOADER_H + +#include "hw/qdev-core.h" +#include "qom/object.h" + +struct GuestLoaderState { + /* */ + DeviceState parent_obj; + + /* */ + uint64_t addr; + char *kernel; + char *args; + char *initrd; +}; + +#define TYPE_GUEST_LOADER "guest-loader" +OBJECT_DECLARE_SIMPLE_TYPE(GuestLoaderState, GUEST_LOADER) + +#endif diff --git a/hw/core/guest-loader.c b/hw/core/guest-loader.c new file mode 100644 index 0000000000..bde44e27b4 --- /dev/null +++ b/hw/core/guest-loader.c @@ -0,0 +1,145 @@ +/* + * Guest Loader + * + * Copyright (C) 2020 Linaro + * Written by Alex Benn=C3=A9e + * (based on the generic-loader by Li Guang ) + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +/* + * Much like the generic-loader this is treated as a special device + * inside QEMU. However unlike the generic-loader this device is used + * to load guest images for hypervisors. As part of that process the + * hypervisor needs to have platform information passed to it by the + * lower levels of the stack (e.g. firmware/bootloader). If you boot + * the hypervisor directly you use the guest-loader to load the Dom0 + * or equivalent guest images in the right place in the same way a + * boot loader would. + * + * This is only relevant for full system emulation. + */ + +#include "qemu/osdep.h" +#include "hw/core/cpu.h" +#include "hw/sysbus.h" +#include "sysemu/dma.h" +#include "hw/loader.h" +#include "hw/qdev-properties.h" +#include "qapi/error.h" +#include "qemu/module.h" +#include "guest-loader.h" +#include "sysemu/device_tree.h" +#include "hw/boards.h" + +/* + * Insert some FDT nodes for the loaded blob. + */ +static void loader_insert_platform_data(GuestLoaderState *s, int size, + Error **errp) +{ + MachineState *machine =3D MACHINE(qdev_get_machine()); + void *fdt =3D machine->fdt; + g_autofree char *node =3D g_strdup_printf("/chosen/module@0x%08" PRIx6= 4, + s->addr); + uint64_t reg_attr[2] =3D {cpu_to_be64(s->addr), cpu_to_be64(size)}; + + if (!fdt) { + error_setg(errp, "Cannot modify FDT fields if the machine has none= "); + return; + } + + qemu_fdt_add_subnode(fdt, node); + qemu_fdt_setprop(fdt, node, "reg", ®_attr, sizeof(reg_attr)); + + if (s->kernel) { + const char *compat[2] =3D { "multiboot,module", "multiboot,kernel"= }; + if (qemu_fdt_setprop_string_array(fdt, node, "compatible", + (char **) &compat, + ARRAY_SIZE(compat)) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + if (s->args) { + if (qemu_fdt_setprop_string(fdt, node, "bootargs", s->args) < = 0) { + error_setg(errp, "couldn't set %s/bootargs", node); + } + } + } else if (s->initrd) { + const char *compat[2] =3D { "multiboot,module", "multiboot,ramdisk= " }; + if (qemu_fdt_setprop_string_array(fdt, node, "compatible", + (char **) &compat, + ARRAY_SIZE(compat)) < 0) { + error_setg(errp, "couldn't set %s/compatible", node); + return; + } + } +} + +static void guest_loader_realize(DeviceState *dev, Error **errp) +{ + GuestLoaderState *s =3D GUEST_LOADER(dev); + char *file =3D s->kernel ? s->kernel : s->initrd; + int size =3D 0; + + /* Perform some error checking on the user's options */ + if (s->kernel && s->initrd) { + error_setg(errp, "Cannot specify a kernel and initrd in same stanz= a"); + return; + } else if (!s->kernel && !s->initrd) { + error_setg(errp, "Need to specify a kernel or initrd image"); + return; + } else if (!s->addr) { + error_setg(errp, "Need to specify the address of guest blob"); + return; + } else if (s->args && !s->kernel) { + error_setg(errp, "Boot args only relevant to kernel blobs"); + } + + /* Default to the maximum size being the machine's ram size */ + size =3D load_image_targphys_as(file, s->addr, current_machine->ram_si= ze, + NULL); + if (size < 0) { + error_setg(errp, "Cannot load specified image %s", file); + return; + } + + /* Now the image is loaded we need to update the platform data */ + loader_insert_platform_data(s, size, errp); +} + +static Property guest_loader_props[] =3D { + DEFINE_PROP_UINT64("addr", GuestLoaderState, addr, 0), + DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel), + DEFINE_PROP_STRING("bootargs", GuestLoaderState, args), + DEFINE_PROP_STRING("initrd", GuestLoaderState, initrd), + DEFINE_PROP_END_OF_LIST(), +}; + +static void guest_loader_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D guest_loader_realize; + device_class_set_props(dc, guest_loader_props); + dc->desc =3D "Guest Loader"; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); +} + +static TypeInfo guest_loader_info =3D { + .name =3D TYPE_GUEST_LOADER, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(GuestLoaderState), + .class_init =3D guest_loader_class_init, +}; + +static void guest_loader_register_type(void) +{ + type_register_static(&guest_loader_info); +} + +type_init(guest_loader_register_type) diff --git a/MAINTAINERS b/MAINTAINERS index 738786146d..38644691dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2022,6 +2022,11 @@ F: hw/core/generic-loader.c F: include/hw/core/generic-loader.h F: docs/generic-loader.txt =20 +Guest Loader +M: Alex Benn=C3=A9e +S: Maintained +F: hw/core/guest-loader.c + Intel Hexadecimal Object File Loader M: Su Hang S: Maintained diff --git a/hw/core/meson.build b/hw/core/meson.build index 032576f571..9cd72edf51 100644 --- a/hw/core/meson.build +++ b/hw/core/meson.build @@ -37,6 +37,8 @@ softmmu_ss.add(files( 'clock-vmstate.c', )) =20 +softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('guest-loader.c')) + specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: files( 'machine-qmp-cmds.c', 'numa.c', --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Alistair Francis , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We might as well surface this useful information in the manual so users can find it easily. It is a fairly simple conversion to rst with the only textual fixes being QemuOps to QemuOpts. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org> diff --git a/docs/generic-loader.txt b/docs/generic-loader.txt deleted file mode 100644 index a9603a2af7..0000000000 --- a/docs/generic-loader.txt +++ /dev/null @@ -1,92 +0,0 @@ -Copyright (c) 2016 Xilinx Inc. - -This work is licensed under the terms of the GNU GPL, version 2 or later. = See -the COPYING file in the top-level directory. - - -The 'loader' device allows the user to load multiple images or values into -QEMU at startup. - -Loading Data into Memory Values -------------------------------- -The loader device allows memory values to be set from the command line. Th= is -can be done by following the syntax below: - - -device loader,addr=3D,data=3D,data-len=3D - [,data-be=3D][,cpu-num=3D] - - - The address to store the data in. - - The value to be written to the address. The maximum size= of - the data is 8 bytes. - - The length of the data in bytes. This argument must be - included if the data argument is. - - Set to true if the data to be stored on the guest should= be - written as big endian data. The default is to write litt= le - endian data. - - The number of the CPU's address space where the data sho= uld - be loaded. If not specified the address space of the fir= st - CPU is used. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of loading value 0x8000000e to address 0xfd1a0104 is: - -device loader,addr=3D0xfd1a0104,data=3D0x8000000e,data-len=3D4 - -Setting a CPU's Program Counter -------------------------------- -The loader device allows the CPU's PC to be set from the command line. This -can be done by following the syntax below: - - -device loader,addr=3D,cpu-num=3D - - - The value to use as the CPU's PC. - - The number of the CPU whose PC should be set to the - specified value. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of setting CPU 0's PC to 0x8000 is: - -device loader,addr=3D0x8000,cpu-num=3D0 - -Loading Files -------------- -The loader device also allows files to be loaded into memory. It can load = ELF, -U-Boot, and Intel HEX executable formats as well as raw images. The synta= x is -shown below: - - -device loader,file=3D[,addr=3D][,cpu-num=3D][,fo= rce-raw=3D] - - - A file to be loaded into memory - - The memory address where the file should be loaded. This= is - required for raw images and ignored for non-raw files. - - This specifies the CPU that should be used. This is an - optional argument and will cause the CPU's PC to be set = to - the memory address where the raw file is loaded or the e= ntry - point specified in the executable format header. This op= tion - should only be used for the boot image. - This will also cause the image to be written to the spec= ified - CPU's address space. If not specified, the default is CP= U 0. - - Setting force-raw=3Don forces the file to be treated as = a raw - image. This can be used to load supported executable fo= rmats - as if they were raw. - -All values are parsed using the standard QemuOps parsing. This allows the = user -to specify any values in any format supported. By default the values -will be parsed as decimal. To use hex values the user should prefix the nu= mber -with a '0x'. - -An example of loading an ELF file which CPU0 will boot is shown below: - -device loader,file=3D./images/boot.elf,cpu-num=3D0 - -Restrictions and ToDos ----------------------- - - At the moment it is just assumed that if you specify a cpu-num then you - want to set the PC as well. This might not always be the case. In future - the internal state 'set_pc' (which exists in the generic loader now) sh= ould - be exposed to the user so that they can choose if the PC is set or not. diff --git a/docs/system/generic-loader.rst b/docs/system/generic-loader.rst new file mode 100644 index 0000000000..6bf8a4eb48 --- /dev/null +++ b/docs/system/generic-loader.rst @@ -0,0 +1,117 @@ +.. + Copyright (c) 2016, Xilinx Inc. + +This work is licensed under the terms of the GNU GPL, version 2 or later. = See +the COPYING file in the top-level directory. + +Generic Loader +-------------- + +The 'loader' device allows the user to load multiple images or values into +QEMU at startup. + +Loading Data into Memory Values +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +The loader device allows memory values to be set from the command line. Th= is +can be done by following the syntax below:: + + -device loader,addr=3D,data=3D,data-len=3D \ + [,data-be=3D][,cpu-num=3D] + +```` + The address to store the data in. + +```` + The value to be written to the address. The maximum size of the data + is 8 bytes. + +```` + The length of the data in bytes. This argument must be included if + the data argument is. + +```` + Set to true if the data to be stored on the guest should be written + as big endian data. The default is to write little endian data. + +```` + The number of the CPU's address space where the data should be + loaded. If not specified the address space of the first CPU is used. + +All values are parsed using the standard QemuOps parsing. This allows the = user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of loading value 0x8000000e to address 0xfd1a0104 is:: + + -device loader,addr=3D0xfd1a0104,data=3D0x8000000e,data-len=3D4 + +Setting a CPU's Program Counter +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The loader device allows the CPU's PC to be set from the command line. This +can be done by following the syntax below:: + + -device loader,addr=3D,cpu-num=3D + +```` + The value to use as the CPU's PC. + +```` + The number of the CPU whose PC should be set to the specified value. + +All values are parsed using the standard QemuOpts parsing. This allows the= user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of setting CPU 0's PC to 0x8000 is:: + + -device loader,addr=3D0x8000,cpu-num=3D0 + +Loading Files +^^^^^^^^^^^^^ + +The loader device also allows files to be loaded into memory. It can load = ELF, +U-Boot, and Intel HEX executable formats as well as raw images. The synta= x is +shown below: + + -device loader,file=3D[,addr=3D][,cpu-num=3D][,fo= rce-raw=3D] + +```` + A file to be loaded into memory + +```` + The memory address where the file should be loaded. This is required + for raw images and ignored for non-raw files. + +```` + This specifies the CPU that should be used. This is an + optional argument and will cause the CPU's PC to be set to the + memory address where the raw file is loaded or the entry point + specified in the executable format header. This option should only + be used for the boot image. This will also cause the image to be + written to the specified CPU's address space. If not specified, the + default is CPU 0. - Setting force-raw=3Don forces the file + to be treated as a raw image. This can be used to load supported + executable formats as if they were raw. + +All values are parsed using the standard QemuOpts parsing. This allows the= user +to specify any values in any format supported. By default the values +will be parsed as decimal. To use hex values the user should prefix the nu= mber +with a '0x'. + +An example of loading an ELF file which CPU0 will boot is shown below:: + + -device loader,file=3D./images/boot.elf,cpu-num=3D0 + +Restrictions and ToDos +^^^^^^^^^^^^^^^^^^^^^^ + +At the moment it is just assumed that if you specify a cpu-num then +you want to set the PC as well. This might not always be the case. In +future the internal state 'set_pc' (which exists in the generic loader +now) should be exposed to the user so that they can choose if the PC +is set or not. + + diff --git a/docs/system/index.rst b/docs/system/index.rst index 625b494372..cee1c83540 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -25,6 +25,7 @@ Contents: usb ivshmem linuxboot + generic-loader vnc-security tls gdb diff --git a/MAINTAINERS b/MAINTAINERS index 38644691dc..a1170bad5a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2020,7 +2020,7 @@ M: Alistair Francis S: Maintained F: hw/core/generic-loader.c F: include/hw/core/generic-loader.h -F: docs/generic-loader.txt +F: docs/system/generic-loader.rst =20 Guest Loader M: Alex Benn=C3=A9e --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org> diff --git a/docs/system/guest-loader.rst b/docs/system/guest-loader.rst new file mode 100644 index 0000000000..37d03cbd89 --- /dev/null +++ b/docs/system/guest-loader.rst @@ -0,0 +1,54 @@ +.. + Copyright (c) 2020, Linaro + +Guest Loader +------------ + +The guest loader is similar to the `generic-loader` although it is +aimed at a particular use case of loading hypervisor guests. This is +useful for debugging hypervisors without having to jump through the +hoops of firmware and boot-loaders. + +The guest loader does two things: + + - load blobs (kernels and initial ram disks) into memory + - sets platform FDT data so hypervisors can find and boot them + +This is what is typically done by a boot-loader like grub using it's +multi-boot capability. A typical example would look like: + +.. parsed-literal:: + + |qemu_system| -kernel ~/xen.git/xen/xen \ + -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \ + -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"root= =3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \ + -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio + +In the above example the Xen hypervisor is loaded by the -kernel +parameter and passed it's boot arguments via -append. The Dom0 guest +is loaded into the areas of memory. Each blob will get +`/chosen/module@` entry in the FDT to indicate it's location and +size. Additional information can be passed with by using additional +arguments. + +Currently the only supported machines which use FDT data to boot are +the ARM and RiscV `virt` machines. + +Arguments +^^^^^^^^^ + +The full syntax of the guest-loader is:: + + -device guest-loader,addr=3D[,kernel=3D,[bootargs=3D]]= [,initrd=3D] + +``addr=3D`` + This is mandatory and indicates the start address of the blob. + +``kernel|initrd=3D`` + Indicates the filename of the kernel or initrd blob. Both blobs will + have the "multiboot,module" compatibility string as well as + "multiboot,kernel" or "multiboot,ramdisk" as appropriate. + +``bootargs=3D`` + This is an optional field for kernel blobs which will pass command + like via the `/chosen/module@/bootargs` node. diff --git a/docs/system/index.rst b/docs/system/index.rst index cee1c83540..6ad9c93806 100644 --- a/docs/system/index.rst +++ b/docs/system/index.rst @@ -26,6 +26,7 @@ Contents: ivshmem linuxboot generic-loader + guest-loader vnc-security tls gdb diff --git a/MAINTAINERS b/MAINTAINERS index a1170bad5a..2ad004fed5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2026,6 +2026,7 @@ Guest Loader M: Alex Benn=C3=A9e S: Maintained F: hw/core/guest-loader.c +F: docs/system/guest-loader.rst =20 Intel Hexadecimal Object File Loader M: Su Hang --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Wainer dos Santos Moschetta , qemu-devel@nongnu.org, Cleber Rosa , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) These tests make sure we can boot the Xen hypervisor with a Dom0 kernel using the guest-loader. We currently have to use a kernel I built myself because there are issues using the Debian kernel images. Signed-off-by: Alex Benn=C3=A9e Tested-by: Cleber Rosa Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Cleber Rosa Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org> diff --git a/MAINTAINERS b/MAINTAINERS index 2ad004fed5..ea200aae1d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2027,6 +2027,7 @@ M: Alex Benn=C3=A9e S: Maintained F: hw/core/guest-loader.c F: docs/system/guest-loader.rst +F: tests/acceptance/boot_xen.py =20 Intel Hexadecimal Object File Loader M: Su Hang diff --git a/tests/acceptance/boot_xen.py b/tests/acceptance/boot_xen.py new file mode 100644 index 0000000000..75c2d44492 --- /dev/null +++ b/tests/acceptance/boot_xen.py @@ -0,0 +1,118 @@ +# Functional test that boots a Xen hypervisor with a domU kernel and +# checks the console output is vaguely sane . +# +# Copyright (c) 2020 Linaro +# +# Author: +# Alex Benn=C3=A9e +# +# SPDX-License-Identifier: GPL-2.0-or-later +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. + +import os + +from avocado import skipIf +from avocado_qemu import wait_for_console_pattern +from boot_linux_console import LinuxKernelTest + + +class BootXenBase(LinuxKernelTest): + """ + Boots a Xen hypervisor with a Linux DomU kernel. + """ + + timeout =3D 90 + XEN_COMMON_COMMAND_LINE =3D 'dom0_mem=3D128M loglvl=3Dall guest_loglvl= =3Dall' + + def fetch_guest_kernel(self): + # Using my own built kernel - which works + kernel_url =3D ('https://fileserver.linaro.org/' + 's/JSsewXGZ6mqxPr5/download?path=3D%2F&files=3D' + 'linux-5.9.9-arm64-ajb') + kernel_sha1 =3D '4f92bc4b9f88d5ab792fa7a43a68555d344e1b83' + kernel_path =3D self.fetch_asset(kernel_url, + asset_hash=3Dkernel_sha1) + + return kernel_path + + def launch_xen(self, xen_path): + """ + Launch Xen with a dom0 guest kernel + """ + self.log.info("launch with xen_path: %s", xen_path) + kernel_path =3D self.fetch_guest_kernel() + + self.vm.set_console() + + xen_command_line =3D self.XEN_COMMON_COMMAND_LINE + self.vm.add_args('-machine', 'virtualization=3Don', + '-cpu', 'cortex-a57', + '-m', '768', + '-kernel', xen_path, + '-append', xen_command_line, + '-device', + 'guest-loader,addr=3D0x47000000,kernel=3D%s,boota= rgs=3Dconsole=3Dhvc0' + % (kernel_path)) + + self.vm.launch() + + console_pattern =3D 'VFS: Cannot open root device' + wait_for_console_pattern(self, console_pattern, "Panic on CPU 0:") + + +class BootXen(BootXenBase): + + def test_arm64_xen_411_and_dom0(self): + """ + :avocado: tags=3Darch:aarch64 + :avocado: tags=3Daccel:tcg + :avocado: tags=3Dcpu:cortex-a57 + :avocado: tags=3Dmachine:virt + """ + + # archive of file from https://deb.debian.org/debian/pool/main/x/x= en/ + xen_url =3D ('https://fileserver.linaro.org/s/JSsewXGZ6mqxPr5/' + 'download?path=3D%2F&files=3D' + 'xen-hypervisor-4.11-arm64_4.11.4%2B37-g3263f257ca-1_ar= m64.deb') + xen_sha1 =3D '034e634d4416adbad1212d59b62bccdcda63e62a' + xen_deb =3D self.fetch_asset(xen_url, asset_hash=3Dxen_sha1) + xen_path =3D self.extract_from_deb(xen_deb, "/boot/xen-4.11-arm64") + + self.launch_xen(xen_path) + + def test_arm64_xen_414_and_dom0(self): + """ + :avocado: tags=3Darch:aarch64 + :avocado: tags=3Daccel:tcg + :avocado: tags=3Dcpu:cortex-a57 + :avocado: tags=3Dmachine:virt + """ + + # archive of file from https://deb.debian.org/debian/pool/main/x/x= en/ + xen_url =3D ('https://fileserver.linaro.org/s/JSsewXGZ6mqxPr5/' + 'download?path=3D%2F&files=3D' + 'xen-hypervisor-4.14-arm64_4.14.0%2B80-gd101b417b7-1_ar= m64.deb') + xen_sha1 =3D 'b9d209dd689ed2b393e625303a225badefec1160' + xen_deb =3D self.fetch_asset(xen_url, asset_hash=3Dxen_sha1) + xen_path =3D self.extract_from_deb(xen_deb, "/boot/xen-4.14-arm64") + + self.launch_xen(xen_path) + + def test_arm64_xen_415_and_dom0(self): + """ + :avocado: tags=3Darch:aarch64 + :avocado: tags=3Daccel:tcg + :avocado: tags=3Dcpu:cortex-a57 + :avocado: tags=3Dmachine:virt + """ + + xen_url =3D ('https://fileserver.linaro.org/' + 's/JSsewXGZ6mqxPr5/download' + '?path=3D%2F&files=3Dxen-upstream-4.15-unstable.deb') + xen_sha1 =3D 'fc191172b85cf355abb95d275a24cc0f6d6579d8' + xen_deb =3D self.fetch_asset(xen_url, asset_hash=3Dxen_sha1) + xen_path =3D self.extract_from_deb(xen_deb, "/boot/xen-4.15-unstab= le") + + self.launch_xen(xen_path) --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Aleksandar Rikalo , "open list:RISC-V TCG CPUs" , Sagar Karandikar , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Chris Wulff , qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Max Filippov , Michael Walle , "open list:ARM TCG CPUs" , Palmer Dabbelt , Bastian Koppelmann , Paolo Bonzini , Alistair Francis , Guan Xuetao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org> diff --git a/include/hw/semihosting/console.h b/include/semihosting/console= .h similarity index 100% rename from include/hw/semihosting/console.h rename to include/semihosting/console.h diff --git a/include/hw/semihosting/semihost.h b/include/semihosting/semiho= st.h similarity index 100% rename from include/hw/semihosting/semihost.h rename to include/semihosting/semihost.h diff --git a/gdbstub.c b/gdbstub.c index 16d7c8f534..7a4cc07584 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -49,7 +49,7 @@ #include "sysemu/hw_accel.h" #include "sysemu/kvm.h" #include "sysemu/runstate.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/exec-all.h" #include "sysemu/replay.h" =20 diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9afc0b427b..26e7b1bd9f 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -58,7 +58,7 @@ #include "qemu/error-report.h" #include "hw/misc/empty_slot.h" #include "sysemu/kvm.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "hw/mips/cps.h" #include "hw/qdev-clock.h" =20 diff --git a/hw/semihosting/arm-compat-semi.c b/hw/semihosting/arm-compat-s= emi.c index 23c6e3edcb..94950b6c56 100644 --- a/hw/semihosting/arm-compat-semi.c +++ b/hw/semihosting/arm-compat-semi.c @@ -34,9 +34,9 @@ #include "qemu/osdep.h" =20 #include "cpu.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" +#include "semihosting/common-semi.h" #include "qemu/log.h" #include "qemu/timer.h" #ifdef CONFIG_USER_ONLY diff --git a/hw/semihosting/config.c b/hw/semihosting/config.c index 9807f10cb0..3548e0f627 100644 --- a/hw/semihosting/config.c +++ b/hw/semihosting/config.c @@ -22,7 +22,7 @@ #include "qemu/option.h" #include "qemu/config-file.h" #include "qemu/error-report.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "chardev/char.h" #include "sysemu/sysemu.h" =20 diff --git a/hw/semihosting/console.c b/hw/semihosting/console.c index 9b4fee9260..c9ebd6fdd0 100644 --- a/hw/semihosting/console.c +++ b/hw/semihosting/console.c @@ -17,8 +17,8 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" #include "exec/gdbstub.h" #include "exec/exec-all.h" #include "qemu/log.h" diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index 7c42f65706..ee72a1c20f 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -22,7 +22,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "qemu/guest-random.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #include "target/arm/syndrome.h" =20 #define get_user_code_u32(x, gaddr, env) \ diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index cadfb7fa43..989d03cd89 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -22,7 +22,7 @@ #include "qemu.h" #include "elf.h" #include "cpu_loop-common.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" =20 #define get_user_code_u32(x, gaddr, env) \ ({ abi_long __r =3D get_user_u32((x), (gaddr)); \ diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 9665dabb09..6767f941e8 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -23,7 +23,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "elf.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" =20 void cpu_loop(CPURISCVState *env) { diff --git a/linux-user/semihost.c b/linux-user/semihost.c index c0015ee7f6..82013b8b48 100644 --- a/linux-user/semihost.c +++ b/linux-user/semihost.c @@ -12,7 +12,7 @@ =20 #include "qemu/osdep.h" #include "cpu.h" -#include "hw/semihosting/console.h" +#include "semihosting/console.h" #include "qemu.h" #include =20 diff --git a/softmmu/vl.c b/softmmu/vl.c index ff488ea3e7..b7673b9613 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -108,7 +108,7 @@ #include "qapi/opts-visitor.h" #include "qapi/clone-visitor.h" #include "qom/object_interfaces.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "crypto/init.h" #include "sysemu/replay.h" #include "qapi/qapi-events-run-state.h" diff --git a/stubs/semihost.c b/stubs/semihost.c index 1d8b37f7b2..1b30f38b03 100644 --- a/stubs/semihost.c +++ b/stubs/semihost.c @@ -11,7 +11,7 @@ #include "qemu/osdep.h" #include "qemu/option.h" #include "qemu/error-report.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/sysemu.h" =20 /* Empty config */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 904b0927cd..d9220be7c5 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -22,7 +22,7 @@ #include "exec/exec-all.h" #include /* For crc32 */ #include "hw/irq.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/cpus.h" #include "sysemu/cpu-timers.h" #include "sysemu/kvm.h" @@ -34,7 +34,7 @@ #ifdef CONFIG_TCG #include "arm_ldst.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #endif =20 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 731c435c00..d63ae465e1 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -21,7 +21,7 @@ #include "qemu/qemu-print.h" #include "exec/exec-all.h" #include /* For crc32 */ -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "sysemu/cpus.h" #include "sysemu/kvm.h" #include "qemu/range.h" @@ -31,7 +31,7 @@ #ifdef CONFIG_TCG #include "arm_ldst.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" #endif =20 static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask, diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index b591f096df..0b42e53500 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -28,7 +28,7 @@ #include "internals.h" #include "qemu/host-utils.h" =20 -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/gen-icount.h" =20 #include "exec/helper-proto.h" diff --git a/target/arm/translate.c b/target/arm/translate.c index 1653cca1aa..62b1c2081b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -29,7 +29,7 @@ #include "qemu/log.h" #include "qemu/bitops.h" #include "arm_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" =20 #include "exec/helper-proto.h" #include "exec/helper-gen.h" diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 7c52ae76d6..01cc3c53a5 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -21,7 +21,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/log.h" =20 bool lm32_cpu_tlb_fill(CPUState *cs, vaddr address, int size, diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 202498deb5..730cdf7744 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -21,7 +21,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" =20 #if defined(CONFIG_USER_ONLY) =20 diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bf70c77295..bd4dca571f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -31,7 +31,7 @@ #include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "hw/qdev-clock.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "qapi/qapi-commands-machine-target.h" #include "fpu_helper.h" =20 diff --git a/target/mips/mips-semi.c b/target/mips/mips-semi.c index 898251aa02..6de60fa6dd 100644 --- a/target/mips/mips-semi.c +++ b/target/mips/mips-semi.c @@ -22,8 +22,8 @@ #include "qemu/log.h" #include "exec/helper-proto.h" #include "exec/softmmu-semi.h" -#include "hw/semihosting/semihost.h" -#include "hw/semihosting/console.h" +#include "semihosting/semihost.h" +#include "semihosting/console.h" =20 typedef enum UHIOp { UHI_exit =3D 1, diff --git a/target/mips/translate.c b/target/mips/translate.c index 70891c37cd..0b6d82d228 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -29,7 +29,7 @@ #include "exec/translator.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" =20 #include "target/mips/trace.h" #include "trace-tcg.h" diff --git a/target/nios2/helper.c b/target/nios2/helper.c index 57c97bde3c..53be8398e9 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -26,7 +26,7 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "exec/helper-proto.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" =20 #if defined(CONFIG_USER_ONLY) =20 diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 2f43939fb6..83a6bcfad0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -24,7 +24,7 @@ #include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "trace.h" -#include "hw/semihosting/common-semi.h" +#include "semihosting/common-semi.h" =20 int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) { diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c index 54c26871fe..704393c27f 100644 --- a/target/unicore32/helper.c +++ b/target/unicore32/helper.c @@ -14,7 +14,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" -#include "hw/semihosting/console.h" +#include "semihosting/console.h" =20 #undef DEBUG_UC32 =20 diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 944a157747..0ae4efc48a 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -37,7 +37,7 @@ #include "qemu/log.h" #include "qemu/qemu-print.h" #include "exec/cpu_ldst.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "exec/translator.h" =20 #include "exec/helper-proto.h" diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index 25f57a6500..79f2b043f2 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -29,7 +29,7 @@ #include "cpu.h" #include "chardev/char-fe.h" #include "exec/helper-proto.h" -#include "hw/semihosting/semihost.h" +#include "semihosting/semihost.h" #include "qapi/error.h" #include "qemu/log.h" =20 diff --git a/MAINTAINERS b/MAINTAINERS index ea200aae1d..c5ff881892 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3250,7 +3250,7 @@ Semihosting M: Alex Benn=C3=A9e S: Maintained F: hw/semihosting/ -F: include/hw/semihosting/ +F: include/semihosting/ =20 Multi-process QEMU M: Elena Ufimtseva --=20 2.20.1 From nobody Mon May 20 18:26:45 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615394272; cv=none; d=zohomail.com; s=zohoarc; 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([51.148.130.216]) by smtp.gmail.com with ESMTPSA id m7sm10164219ejk.52.2021.03.10.08.00.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Mar 2021 08:00:20 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 436381FF9E; Wed, 10 Mar 2021 16:00:04 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wCThXbMA7Fymd9SdnPM7KHKkPElYc6GGZP5jhClwnG8=; b=CqsQknLHM/RcYusFg9EOkS1/stQ/uotXUZWgIYCaIrmWnxOMLH1rlrsNHyp35+G7cZ 0VbojtyX9yqct++7ALvMaxqDfshjsFoNShRTqqc9MW/VVSgfWsMG51Zri+QITVohVS0I b+YrCjlOgqPzNPyDQDT+V2AZGbt+WiHToMYRlFLWrbW33pdUe5/RIfRXfX8XhMyuO8Cg /1QUrLI2TIAr1Wbzp5OsP8gakrkYoEtBMsDyy1wbgW7lzxmHcMVrZw1JP+j7g4GOgrVH +uU4Lq6CfHJXa3VQy0WUhvH7fVLd1paIL7DZDAS2vFkNUde6dQgl5S6zmSjNVhfcvyk3 smtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wCThXbMA7Fymd9SdnPM7KHKkPElYc6GGZP5jhClwnG8=; b=GPJvEqPnUHPy4Z6xy8idNwf0kaxHsAt45t1S9xNEqPbdYvNnc2xs25ApIN2Jhf6jD9 UvMVEn57LauUxOYreVwhMJxnDsXhM9m4ur7LWOsW/XawMv+gWLlwMJelRhbUbumPiM70 ExA4wM7u6wUk6cXOA+uZw18pY3UT1ZraRg6SPsW3CTVqCXfpHmMxKczXS5KuIabY1vf6 gI2+R2ipyHSTcXIP+hT44JDrzQeo/4LrscbVBjRrBbh+prekiPZPTyp9p6XWsp3AOI6A uTtC/uTgfrAgdVrA31s4GEiboC3bdizRKb/i/fjMKb0LuxUEA0aP4Cj2tDz4ey47KEt8 rJEA== X-Gm-Message-State: AOAM5311DEn4wgpRURBpryqn39Op0Vc2Rdoytka6SKVm9/aM05us24bU Q80S5WYyvI69SNXKxiUQLMoUVw== X-Google-Smtp-Source: ABdhPJzEsFmPndGL/SC3WF7kukuO9b/pxwIBNbZo4458c1xu1sDSGvnLYb6VqrctmgM31jTNO6iP5w== X-Received: by 2002:a17:906:3ac3:: with SMTP id z3mr4502580ejd.106.1615392023221; Wed, 10 Mar 2021 08:00:23 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org Subject: [PULL v2 15/15] semihosting: Move hw/semihosting/ -> semihosting/ Date: Wed, 10 Mar 2021 16:00:02 +0000 Message-Id: <20210310160002.11659-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210310160002.11659-1-alex.bennee@linaro.org> References: <20210310160002.11659-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Philippe Mathieu-Daud=C3=A9 With the exception of hw/core/, the hw/ directory only contains device models used in system emulation. Semihosting is also used by user emulation. As a generic feature, move it out of hw/ directory. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Alex Benn=C3=A9e Message-Id: <20210226131356.3964782-3-f4bug@amsat.org> Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org> diff --git a/meson.build b/meson.build index adeec153d9..a7d2dd429d 100644 --- a/meson.build +++ b/meson.build @@ -1951,6 +1951,7 @@ subdir('migration') subdir('monitor') subdir('net') subdir('replay') +subdir('semihosting') subdir('hw') subdir('accel') subdir('plugins') diff --git a/hw/semihosting/common-semi.h b/semihosting/common-semi.h similarity index 100% rename from hw/semihosting/common-semi.h rename to semihosting/common-semi.h diff --git a/hw/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi= .c similarity index 100% rename from hw/semihosting/arm-compat-semi.c rename to semihosting/arm-compat-semi.c diff --git a/hw/semihosting/config.c b/semihosting/config.c similarity index 100% rename from hw/semihosting/config.c rename to semihosting/config.c diff --git a/hw/semihosting/console.c b/semihosting/console.c similarity index 100% rename from hw/semihosting/console.c rename to semihosting/console.c diff --git a/Kconfig b/Kconfig index bf694c42af..d52ebd839b 100644 --- a/Kconfig +++ b/Kconfig @@ -2,3 +2,4 @@ source Kconfig.host source backends/Kconfig source accel/Kconfig source hw/Kconfig +source semihosting/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index c5ff881892..3456993062 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3249,7 +3249,7 @@ F: qapi/rdma.json Semihosting M: Alex Benn=C3=A9e S: Maintained -F: hw/semihosting/ +F: semihosting/ F: include/semihosting/ =20 Multi-process QEMU diff --git a/hw/Kconfig b/hw/Kconfig index 8ea26479c4..ff40bd3f7b 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -31,7 +31,6 @@ source remote/Kconfig source rtc/Kconfig source scsi/Kconfig source sd/Kconfig -source semihosting/Kconfig source smbios/Kconfig source ssi/Kconfig source timer/Kconfig diff --git a/hw/meson.build b/hw/meson.build index e615d72d4d..8ba79b1a52 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -30,7 +30,6 @@ subdir('rdma') subdir('rtc') subdir('scsi') subdir('sd') -subdir('semihosting') subdir('smbios') subdir('ssi') subdir('timer') diff --git a/hw/semihosting/Kconfig b/semihosting/Kconfig similarity index 100% rename from hw/semihosting/Kconfig rename to semihosting/Kconfig diff --git a/hw/semihosting/meson.build b/semihosting/meson.build similarity index 100% rename from hw/semihosting/meson.build rename to semihosting/meson.build --=20 2.20.1