Series comparison

v1->v2: fix format-string errors on 32-bit hosts in xilinx csu dma model.

-- PMM

The following changes since commit 0436c55edf6b357ff56e2a5bf688df8636f83456:

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2021-03-08 13:51:41 +0000)

are available in the Git repository at:

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210310

for you to fetch changes up to 81b3ddaf8772ec6f88d372e52f9b433cfa46bc46:

hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() (2021-03-10 13:54:51 +0000)

----------------------------------------------------------------
target-arm queue:
 * Add new mps3-an547 board
 * target/arm: Restrict v7A TCG cpus to TCG accel
 * Implement a Xilinx CSU DMA model
 * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()

----------------------------------------------------------------
Peter Maydell (48):
      clock: Add ClockEvent parameter to callbacks
      clock: Add ClockPreUpdate callback event type
      clock: Add clock_ns_to_ticks() function
      hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks()
      hw/arm/armsse: Introduce SSE subsystem version property
      hw/misc/iotkit-sysctl: Remove is_sse200 flag
      hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values
      hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values
      hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300
      hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR
      hw/timer/sse-counter: Model the SSE Subsystem System Counter
      hw/timer/sse-timer: Model the SSE Subsystem System Timer
      hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour
      hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300
      hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300
      hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register
      hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers
      hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register values
      hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc
      hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block
      hw/arm/armsse: Use an array for apb_ppc fields in the state structure
      hw/arm/armsse: Add a define for number of IRQs used by the SSE itself
      hw/arm/armsse: Add framework for data-driven device placement
      hw/arm/armsse: Move dual-timer device into data-driven framework
      hw/arm/armsse: Move watchdogs into data-driven framework
      hw/arm/armsse: Move s32ktimer into data-driven framework
      hw/arm/armsse: Move sysinfo register block into data-driven framework
      hw/arm/armsse: Move sysctl register block into data-driven framework
      hw/arm/armsse: Move PPUs into data-driven framework
      hw/arm/armsse: Add missing SSE-200 SYS_PPU
      hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo
      hw/arm/armsse: Add support for SSE variants with a system counter
      hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo
      hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block
      hw/arm/armsse: Add SSE-300 support
      hw/arm/mps2-tz: Make UART overflow IRQ board-specific
      hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate
      hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register
      hw/misc/mps2-scc: Implement changes for AN547
      hw/arm/mps2-tz: Support running APB peripherals on different clock
      hw/arm/mps2-tz: Make initsvtor0 setting board-specific
      hw/arm/mps2-tz: Add new mps3-an547 board
      docs/system/arm/mps2.rst: Document the new mps3-an547 board
      tests/qtest/sse-timer-test: Add simple test of the SSE counter
      tests/qtest/sse-timer-test: Test the system timer
      tests/qtest/sse-timer-test: Test counter scaling changes
      hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_
      hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()

Philippe Mathieu-Daudé (1):
      target/arm: Restrict v7A TCG cpus to TCG accel

Xuzhou Cheng (5):
      hw/dma: Implement a Xilinx CSU DMA model
      hw/arm: xlnx-zynqmp: Clean up coding convention issues
      hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI
      hw/ssi: xilinx_spips: Clean up coding convention issues
      hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips

v3->v4: Windows headers define an INT type which clashed
with an enum value name in arm_gicv3_its.c...

The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5:

Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100)

are available in the Git repository at:

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-3

for you to fetch changes up to 28e987a7e7edaa3ca7feeac65edca26145df8814:

hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 21:01:08 +0100)

----------------------------------------------------------------
target-arm queue:
 * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command
   line user-created devices are not plugged into them
 * Take an exception if PSTATE.IL is set
 * Support an emulated ITS in the virt board
 * Add support for kudo-bmc board
 * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
 * cadence_uart: Fix clock handling issues that prevented
   u-boot from running

----------------------------------------------------------------
Bin Meng (6):
      hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase
      hw/char: cadence_uart: Disable transmit when input clock is disabled
      hw/char: cadence_uart: Move clock/reset check to uart_can_receive()
      hw/char: cadence_uart: Convert to memop_with_attrs() ops
      hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}()
      hw/char: cadence_uart: Log a guest error when device is unclocked or in reset

Chris Rauer (1):
      hw/arm: Add support for kudo-bmc board.

Marc Zyngier (1):
      hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM

Peter Maydell (5):
      target/arm: Take an exception if PSTATE.IL is set
      qdev: Support marking individual buses as 'full'
      hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn
      hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full'
      hw/arm/mps2.c: Mark internal-only I2C buses as 'full'

Richard Henderson (1):
      target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn

Shashi Mallela (9):
      hw/intc: GICv3 ITS initial framework
      hw/intc: GICv3 ITS register definitions added
      hw/intc: GICv3 ITS command queue framework
      hw/intc: GICv3 ITS Command processing
      hw/intc: GICv3 ITS Feature enablement
      hw/intc: GICv3 redistributor ITS processing
      tests/data/acpi/virt: Add IORT files for ITS
      hw/arm/virt: add ITS support in virt GIC
      tests/data/acpi/virt: Update IORT files for ITS