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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id b18sm8972008ejb.77.2021.03.09.15.50.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 15:50:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615333839; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vJp/6KIq7jt0wWSOpNuyjar6abO6hZopWxChO98/pAg=; b=QeCH8ugNWigzV+27h6Iq5Dyg5fyvboKr4AM8aGGRsZjsVDW2UY2dqfjkQ/1XKjYDwqjoUG NI1K7Fu2ZoovgLnKItiHQdOsO11DBk+lSo+KlK3Tagt33JrK9QnYFjq5R6YauI9JUj5Fve gAlH8L9wmX7G7iaE8cdKbFr2vLpsTbA= X-MC-Unique: 7Upl-ds6PRGap2jzbqjazw-1 X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vJp/6KIq7jt0wWSOpNuyjar6abO6hZopWxChO98/pAg=; b=t1LLsAJ7eGeS7WcpCQhvd8WrvEsFr+j4MMsQuIukjZO1ASbPni8krntNUWnFZhtpRv +Qj3lAoZDqWNqhCpbi7ebpzWJruKodHiJRYrfYDImdYt/02MVk3YV9kSG9PUm+Fi6dDh cwaF+pVbXLv/9wOyuYvoIMkmz77/14Oe6lSGmy2pZLSYZ3S4g4LthMek7PCE9LDuT+Zl 6TV9kajZa/Uw+YgaAWbK9arsLc9jv3JqDzgEfPZCRNjIFNoBmBAPmX3RgQzjcCRwQscA AnKjMNN4fblPRgJhnsen00vG2CKTIThChLhTLGvA4r2lIQ8NGr9t8kWxKQHukKZWnrCP fnyA== X-Gm-Message-State: AOAM533YVY5KmvAogn1PJ++lQUlP4Ozg7Z5dmurhT1YZOnXihZBNOtqP 2MvjI/8nquJzYeDSmo/Kefm7MfrEpwcN8a6iS9SefYBrV+annl3TPSaj26DRXV3FM2FukrvT4dY adcObirB+nKYoyA== X-Received: by 2002:a17:906:a147:: with SMTP id bu7mr527690ejb.383.1615333836467; Tue, 09 Mar 2021 15:50:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJzDeHb/7aZc6ARNFKu4C8WGlIBLU6oP8l6VfUKoRPpg6Uyuk2X6NQhsWkTkagd0jpa/S4KcQA== X-Received: by 2002:a17:906:a147:: with SMTP id bu7mr527682ejb.383.1615333836296; Tue, 09 Mar 2021 15:50:36 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , Max Reitz , Kevin Wolf , Stephen Checkoway , David Edmondson , qemu-block@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 1/9] hw/block/pflash_cfi: Fix code style for checkpatch.pl Date: Wed, 10 Mar 2021 00:50:20 +0100 Message-Id: <20210309235028.912078-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309235028.912078-1-philmd@redhat.com> References: <20210309235028.912078-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) We are going to move this code, fix its style first. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Bin Meng Reviewed-by: David Edmondson --- hw/block/pflash_cfi01.c | 36 ++++++++++++++++++++++++------------ hw/block/pflash_cfi02.c | 9 ++++++--- 2 files changed, 30 insertions(+), 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 22287a1522e..b6919bbe474 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -115,7 +115,8 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 -/* Perform a CFI query based on the bank width of the flash. +/* + * Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for * this flash. */ @@ -125,7 +126,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwad= dr offset) uint32_t resp =3D 0; hwaddr boff; =20 - /* Adjust incoming offset to match expected device-width + /* + * Adjust incoming offset to match expected device-width * addressing. CFI query addresses are always specified in terms of * the maximum supported width of the device. This means that x8 * devices and x8/x16 devices in x8 mode behave differently. For @@ -141,7 +143,8 @@ static uint32_t pflash_cfi_query(PFlashCFI01 *pfl, hwad= dr offset) if (boff >=3D sizeof(pfl->cfi_table)) { return 0; } - /* Now we will construct the CFI response generated by a single + /* + * Now we will construct the CFI response generated by a single * device, then replicate that for all devices that make up the * bus. For wide parts used in x8 mode, CFI query responses * are different than native byte-wide parts. @@ -185,7 +188,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hw= addr offset) uint32_t resp; hwaddr boff; =20 - /* Adjust incoming offset to match expected device-width + /* + * Adjust incoming offset to match expected device-width * addressing. Device ID read addresses are always specified in * terms of the maximum supported width of the device. This means * that x8 devices and x8/x16 devices in x8 mode behave @@ -198,7 +202,8 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, hw= addr offset) boff =3D offset >> (ctz32(pfl->bank_width) + ctz32(pfl->max_device_width) - ctz32(pfl->device_wid= th)); =20 - /* Mask off upper bits which may be used in to query block + /* + * Mask off upper bits which may be used in to query block * or sector lock status at other addresses. * Offsets 2/3 are block lock status, is not emulated. */ @@ -297,7 +302,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, case 0x60: /* Block /un)lock */ case 0x70: /* Status Register */ case 0xe8: /* Write block */ - /* Status register read. Return status from each device in + /* + * Status register read. Return status from each device in * bank. */ ret =3D pfl->status; @@ -308,7 +314,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, shift +=3D pfl->device_width * 8; } } else if (!pfl->device_width && width > 2) { - /* Handle 32 bit flash cases where device width is not + /* + * Handle 32 bit flash cases where device width is not * set. (Existing behavior before device width added.) */ ret |=3D pfl->status << 16; @@ -340,7 +347,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, break; } } else { - /* If we have a read larger than the bank_width, combine multi= ple + /* + * If we have a read larger than the bank_width, combine multi= ple * manufacturer/device ID queries into a single response. */ int i; @@ -367,7 +375,8 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, ret =3D 0; } } else { - /* If we have a read larger than the bank_width, combine multi= ple + /* + * If we have a read larger than the bank_width, combine multi= ple * CFI queries into a single response. */ int i; @@ -544,7 +553,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, =20 break; case 0xe8: - /* Mask writeblock size based on device width, or bank width if + /* + * Mask writeblock size based on device width, or bank width if * device width not specified. */ /* FIXME check @offset, @width */ @@ -718,7 +728,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) =20 total_len =3D pfl->sector_len * pfl->nb_blocs; =20 - /* These are only used to expose the parameters of each device + /* + * These are only used to expose the parameters of each device * in the cfi_table[]. */ num_devices =3D pfl->device_width ? (pfl->bank_width / pfl->device_wid= th) : 1; @@ -763,7 +774,8 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } } =20 - /* Default to devices being used at their maximum device width. This w= as + /* + * Default to devices being used at their maximum device width. This w= as * assumed before the device_width support was added. */ if (!pfl->max_device_width) { diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 7962cff7455..fa981465e12 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -100,7 +100,8 @@ struct PFlashCFI02 { uint16_t unlock_addr1; uint8_t cfi_table[0x4d]; QEMUTimer timer; - /* The device replicates the flash memory across its memory space. Em= ulate + /* + * The device replicates the flash memory across its memory space. Em= ulate * that by having a container (.mem) filled with an array of aliases * (.mem_mappings) pointing to the flash memory (.orig_mem). */ @@ -884,8 +885,10 @@ static void pflash_cfi02_realize(DeviceState *dev, Err= or **errp) pfl->cfi_table[0x28] =3D 0x02; pfl->cfi_table[0x29] =3D 0x00; /* Max number of bytes in multi-bytes write */ - /* XXX: disable buffered write as it's not supported */ - // pfl->cfi_table[0x2A] =3D 0x05; + /* + * XXX: disable buffered write as it's not supported + * pfl->cfi_table[0x2A] =3D 0x05; + */ pfl->cfi_table[0x2A] =3D 0x00; pfl->cfi_table[0x2B] =3D 0x00; /* Number of erase block regions */ --=20 2.26.2