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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id y2sm8533493ejf.30.2021.03.09.06.57.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:57:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jWKBH1PqrL+3zgv6Q7B53kJS5+64dRl5ardIw0ZvjK0=; b=FkK2utIf0O73XOIr98hxPzah5uyLyj0mGKRM+pID9NHQzlC0Y/NQD9Ba4D9gYeG463 IkV74QWgalbnNIZMeA8wtnJqi0aBMnspL1oft+a0lar1H0XAvnE82qoWM3tuCwu/KG+5 aGo2kQUjVkj8Kbp6rb85qlopC5ygoLsJ8CDTqN3J9KNyhXsfPd14WaNTuVorgMrYbPEC gj3zVEoo2Z0/6+J6Ue1lTJfhCe6DhuzP5U1qh/AVenAnNYneklq9DBWHxSMVWR7NGCwG dA9vpRyB6A4gZo1SdwfCwWbCqryxDHdR1IgAWlTV+mfKKsjp450U9+f2+0KvvKBZ6q1w 8Ltw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=jWKBH1PqrL+3zgv6Q7B53kJS5+64dRl5ardIw0ZvjK0=; b=rRSBG3vDsZuYy0BtkLChbIljdXsKfbt4A6v5vVq48n5rs5YzosCGiNJ/FjUo6N3E5t jc+hpGN2orBRb+Cgb7XJSHP4jIBqwtwGxQBnNGjsabtG7nmRo62eSJxVzjX4W4JEccWP bQ45qYwdHiHpKe5fzMq45h9EJPxF7fuUCOMY3fP4mD6SMAGOPBY+KYH58wItauRs2TBr R/xzwxQu2n8UBaGRNAed0/llp940L9HS7zWR2m8mzBMfdUSME7EE64DGmqYa6tmhheqx c9G9gyU6x0fq/CJlIqYcLWZoKWdhTNw9fkGHlBOSJNCS6uHGqNQQIeR2GAR7O3gnHDyt a3hA== X-Gm-Message-State: AOAM531SGuF5c4I87USc2uBEhxKhi0CSsw/YeX/puuGOxt7UhSJh1FSz RVzGd8aRvaNRqWL7H6b/RNA= X-Google-Smtp-Source: ABdhPJx5eX6x6l7/0VZFB0vL2GBw5fD6OcKX2PEJzGTAYROonUuN1luw95L2/wHlFtbHB3uB7aUOmA== X-Received: by 2002:a17:907:78d9:: with SMTP id kv25mr21129374ejc.415.1615301846072; Tue, 09 Mar 2021 06:57:26 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Aleksandar Rikalo , Jiaxun Yang , Aurelien Jarno , Fredrik Noring , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH v2 06/22] target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree Date: Tue, 9 Mar 2021 15:56:37 +0100 Message-Id: <20210309145653.743937-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309145653.743937-1-f4bug@amsat.org> References: <20210309145653.743937-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Move PCPYLD (Parallel Copy Lower Doubleword) and PCPYUD (Parallel Copy Upper Doubleword) to decodetree. Remove unnecessary code / comments. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-Id: <20210214175912.732946-13-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v2: Use gen_load_gpr_hi (rth) --- target/mips/tx79.decode | 6 +++ target/mips/translate.c | 80 ------------------------------------ target/mips/tx79_translate.c | 42 +++++++++++++++++++ 3 files changed, 48 insertions(+), 80 deletions(-) diff --git a/target/mips/tx79.decode b/target/mips/tx79.decode index 7af35458b0a..0f748b53a64 100644 --- a/target/mips/tx79.decode +++ b/target/mips/tx79.decode @@ -17,6 +17,7 @@ # Named instruction formats. These are generally used to # reduce the amount of duplication between instruction patterns. =20 +@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &rtype sa=3D0 @rt_rd ...... ..... rt:5 rd:5 ..... ...... &rtype rs=3D0 sa= =3D0 @rs ...... rs:5 ..... .......... ...... &rtype rt=3D0 rd= =3D0 sa=3D0 @rd ...... .......... rd:5 ..... ...... &rtype rs=3D0 rt= =3D0 sa=3D0 @@ -28,6 +29,11 @@ MTHI1 011100 ..... 0000000000 00000 010001 = @rs MFLO1 011100 0000000000 ..... 00000 010010 @rd MTLO1 011100 ..... 0000000000 00000 010011 @rs =20 +# MMI2 + +PCPYLD 011100 ..... ..... ..... 01110 001001 @rs_rt_rd + # MMI3 =20 +PCPYUD 011100 ..... ..... ..... 01110 101001 @rs_rt_rd PCPYH 011100 00000 ..... ..... 11011 101001 @rt_rd diff --git a/target/mips/translate.c b/target/mips/translate.c index 25adaa75eb5..00fac4824de 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24062,80 +24062,6 @@ static void decode_opc_special(CPUMIPSState *env, = DisasContext *ctx) * PEXTUW */ =20 -/* - * PCPYLD rd, rs, rt - * - * Parallel Copy Lower Doubleword - * - * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +-----------+---------+---------+---------+---------+-----------+ - * | MMI | rs | rt | rd | PCPYLD | MMI2 | - * +-----------+---------+---------+---------+---------+-----------+ - */ -static void gen_mmi_pcpyld(DisasContext *ctx) -{ - uint32_t rs, rt, rd; - uint32_t opcode; - - opcode =3D ctx->opcode; - - rs =3D extract32(opcode, 21, 5); - rt =3D extract32(opcode, 16, 5); - rd =3D extract32(opcode, 11, 5); - - if (rd =3D=3D 0) { - /* nop */ - } else { - if (rs =3D=3D 0) { - tcg_gen_movi_i64(cpu_gpr_hi[rd], 0); - } else { - tcg_gen_mov_i64(cpu_gpr_hi[rd], cpu_gpr[rs]); - } - if (rt =3D=3D 0) { - tcg_gen_movi_i64(cpu_gpr[rd], 0); - } else { - if (rd !=3D rt) { - tcg_gen_mov_i64(cpu_gpr[rd], cpu_gpr[rt]); - } - } - } -} - -/* - * PCPYUD rd, rs, rt - * - * Parallel Copy Upper Doubleword - * - * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 - * +-----------+---------+---------+---------+---------+-----------+ - * | MMI | rs | rt | rd | PCPYUD | MMI3 | - * +-----------+---------+---------+---------+---------+-----------+ - */ -static void gen_mmi_pcpyud(DisasContext *ctx) -{ - uint32_t rs, rt, rd; - uint32_t opcode; - - opcode =3D ctx->opcode; - - rs =3D extract32(opcode, 21, 5); - rt =3D extract32(opcode, 16, 5); - rd =3D extract32(opcode, 11, 5); - - if (rd =3D=3D 0) { - /* nop */ - } else { - gen_load_gpr_hi(cpu_gpr[rd], rs); - if (rt =3D=3D 0) { - tcg_gen_movi_i64(cpu_gpr_hi[rd], 0); - } else { - if (rd !=3D rt) { - tcg_gen_mov_i64(cpu_gpr_hi[rd], cpu_gpr_hi[rt]); - } - } - } -} - #endif =20 static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ct= x) @@ -24952,9 +24878,6 @@ static void decode_mmi2(CPUMIPSState *env, DisasCon= text *ctx) case MMI_OPC_2_PROT3W: /* TODO: MMI_OPC_2_PROT3W */ gen_reserved_instruction(ctx); /* TODO: MMI_OPC_CLASS_MMI2 */ break; - case MMI_OPC_2_PCPYLD: - gen_mmi_pcpyld(ctx); - break; default: MIPS_INVAL("TX79 MMI class MMI2"); gen_reserved_instruction(ctx); @@ -24980,9 +24903,6 @@ static void decode_mmi3(CPUMIPSState *env, DisasCon= text *ctx) case MMI_OPC_3_PEXCW: /* TODO: MMI_OPC_3_PEXCW */ gen_reserved_instruction(ctx); /* TODO: MMI_OPC_CLASS_MMI3 */ break; - case MMI_OPC_3_PCPYUD: - gen_mmi_pcpyud(ctx); - break; default: MIPS_INVAL("TX79 MMI class MMI3"); gen_reserved_instruction(ctx); diff --git a/target/mips/tx79_translate.c b/target/mips/tx79_translate.c index d58b4fcd7b3..6e90eb64608 100644 --- a/target/mips/tx79_translate.c +++ b/target/mips/tx79_translate.c @@ -71,3 +71,45 @@ static bool trans_PCPYH(DisasContext *s, arg_rtype *a) =20 return true; } + +/* Parallel Copy Lower Doubleword */ +static bool trans_PCPYLD(DisasContext *s, arg_rtype *a) +{ + if (a->rd =3D=3D 0) { + /* nop */ + return true; + } + + if (a->rs =3D=3D 0) { + tcg_gen_movi_i64(cpu_gpr_hi[a->rd], 0); + } else { + tcg_gen_mov_i64(cpu_gpr_hi[a->rd], cpu_gpr[a->rs]); + } + + if (a->rt =3D=3D 0) { + tcg_gen_movi_i64(cpu_gpr[a->rd], 0); + } else if (a->rd !=3D a->rt) { + tcg_gen_mov_i64(cpu_gpr[a->rd], cpu_gpr[a->rt]); + } + + return true; +} + +/* Parallel Copy Upper Doubleword */ +static bool trans_PCPYUD(DisasContext *s, arg_rtype *a) +{ + if (a->rd =3D=3D 0) { + /* nop */ + return true; + } + + gen_load_gpr_hi(cpu_gpr[a->rd], a->rs); + + if (a->rt =3D=3D 0) { + tcg_gen_movi_i64(cpu_gpr_hi[a->rd], 0); + } else if (a->rd !=3D a->rt) { + tcg_gen_mov_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rt]); + } + + return true; +} --=20 2.26.2