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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id n2sm8340751ejl.1.2021.03.09.06.26.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Mar 2021 06:26:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=mRFpumqGEVNpA5+uXsEp9koWeDRufmAAmXZLwzLV4Tcrstu4LRzGsDsi/TQ2PctIKW vA8Ywtru2zNvPspdE6H7pZ/CczkY7uqubKdER+cw5H22hwIv70KPaDz772uYmY/Jq4I/ BxoFUF6gveqgNtgf6bTcmtbbi/nE1fvXnzamkSlTzOjdOHX91JTmnIdXpFjlbKxklBcS Gf/bQToSM6vq3jLhWhWwvLs+tItMpO8yXlBTxl/6WLZ/Muggr4uaXhmSQNaRK1qF2W69 kK4RpaqnGSwjJ7EFzmFOvkmpuRNbRj63+CnX++ZHkYXtTjbmEYfQjaPKj21TmFSfZC+2 r52g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=mNfy/5/nlqv0Q5fhstyNkgcrbG3LlvGYXFnDPOTVlQ6OT0XPu8QW0hQ8KRQdkcg1GJ l+kUxKLnBjGR2SmAg4gb7vSTRlB9ykVxQsbWFuik1u1c1SXs2+F7qGLDcvUy0OoX4C6f bvvsP7CJF4nSu/2aVsEOhKa0OrcZbYUIDlWlwUq+F+xhuJG9LjgqC1a/KR+zeE0y1iiQ JR014d0BHJRtTCBemscA1QQKcqoeCrvzjft64m0ia6h4ynEwxAbY8nFRi1ZcnlZQ0g8w lve8+5ZKT5LDBSdS04O0GhoGkZsT5410dLNK12CxI88HarVQr12MbQ/MOplY1cZeTLUB imZw== X-Gm-Message-State: AOAM533LjHInrfwQ/nqBCIDiVc4hsHAwh6QxUnegvMZ3mr9vBYzue3nn GPGrzwRelULKXAXO2kO4phY= X-Google-Smtp-Source: ABdhPJyY2xGphduKpgVYRaWxoNMhcq+mwZrwrSUUsvqT+POJQ06HZtvvr+/I9AgxZOE8TDIE/Pbd1w== X-Received: by 2002:a17:906:1a44:: with SMTP id j4mr20957347ejf.401.1615300002725; Tue, 09 Mar 2021 06:26:42 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Jiaxun Yang , BALATON Zoltan Subject: [PATCH RESEND 2/6] hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers Date: Tue, 9 Mar 2021 15:26:26 +0100 Message-Id: <20210309142630.728014-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210309142630.728014-1-f4bug@amsat.org> References: <20210309142630.728014-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The ISD MemoryRegion is implemented for 32-bit accesses. Simplify it by setting the MemoryRegionOps::impl min/max access size fields. Since the region is registered with a size of 0x1000 bytes, we can remove the hwaddr mask. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: BALATON Zoltan --- hw/mips/gt64xxx_pci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 6eb73e77057..99b1690af19 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -385,13 +385,12 @@ static void gt64120_writel(void *opaque, hwaddr addr, { GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -695,9 +694,8 @@ static uint64_t gt64120_readl(void *opaque, GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t val; - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -976,6 +974,10 @@ static const MemoryRegionOps isd_mem_ops =3D { .read =3D gt64120_readl, .write =3D gt64120_writel, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, }; =20 static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) --=20 2.26.2