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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , keithp@keithp.com, "open list:ARM TCG CPUs" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) It may be arm-compat-semihosting but more than one architecture uses it so lets move the tests into the multiarch area. We gate it on the feature and split the semicall.h header between the arches. Also clean-up a bit of the Makefile messing about to one common set of runners. Signed-off-by: Alex Benn=C3=A9e --- tests/tcg/aarch64/semicall.h | 18 +++++++++++ tests/tcg/arm/semicall.h | 15 +-------- tests/tcg/riscv64/semicall.h | 22 +++++++++++++ .../arm-compat-semi}/semiconsole.c | 2 ++ .../arm-compat-semi}/semihosting.c | 5 ++- tests/tcg/Makefile.target | 3 ++ tests/tcg/aarch64/Makefile.target | 18 ----------- tests/tcg/arm/Makefile.target | 16 ++-------- tests/tcg/multiarch/Makefile.target | 31 +++++++++++++++++++ 9 files changed, 83 insertions(+), 47 deletions(-) create mode 100644 tests/tcg/aarch64/semicall.h create mode 100644 tests/tcg/riscv64/semicall.h rename tests/tcg/{arm =3D> multiarch/arm-compat-semi}/semiconsole.c (93%) rename tests/tcg/{arm =3D> multiarch/arm-compat-semi}/semihosting.c (85%) diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h new file mode 100644 index 0000000000..8a3fce35c5 --- /dev/null +++ b/tests/tcg/aarch64/semicall.h @@ -0,0 +1,18 @@ +/* + * Semihosting Tests - AArch64 helper + * + * Copyright (c) 2019 + * Written by Alex Benn=C3=A9e + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + +uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) +{ + register uintptr_t t asm("x0") =3D type; + register uintptr_t a0 asm("x1") =3D arg0; + asm("hlt 0xf000" + : "=3Dr" (t) + : "r" (t), "r" (a0)); + return t; +} diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h index d4f6818192..ad8ac51310 100644 --- a/tests/tcg/arm/semicall.h +++ b/tests/tcg/arm/semicall.h @@ -1,5 +1,5 @@ /* - * Semihosting Tests + * Semihosting Tests - ARM Helper * * Copyright (c) 2019 * Written by Alex Benn=C3=A9e @@ -7,13 +7,8 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ =20 -#define SYS_WRITE0 0x04 -#define SYS_READC 0x07 -#define SYS_REPORTEXC 0x18 - uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) { -#if defined(__arm__) register uintptr_t t asm("r0") =3D type; register uintptr_t a0 asm("r1") =3D arg0; #ifdef __thumb__ @@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) #endif asm(SVC : "=3Dr" (t) : "r" (t), "r" (a0)); -#else - register uintptr_t t asm("x0") =3D type; - register uintptr_t a0 asm("x1") =3D arg0; - asm("hlt 0xf000" - : "=3Dr" (t) - : "r" (t), "r" (a0)); -#endif - return t; } diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h new file mode 100644 index 0000000000..f8c88f32dc --- /dev/null +++ b/tests/tcg/riscv64/semicall.h @@ -0,0 +1,22 @@ +/* + * Semihosting Tests - RiscV64 Helper + * + * Copyright (c) 2021 + * Written by Alex Benn=C3=A9e + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + +uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) +{ + register uintptr_t t asm("a0") =3D type; + register uintptr_t a0 asm("a1") =3D arg0; + asm(".option norvc\n\t" + ".balign 16\n\t" + "slli zero, zero, 0x1f\n\t" + "ebreak\n\t" + "srai zero, zero, 0x7\n\t" + : "=3Dr" (t) + : "r" (t), "r" (a0)); + return t; +} diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-s= emi/semiconsole.c similarity index 93% rename from tests/tcg/arm/semiconsole.c rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c index 6ef0bd2450..1d82efc589 100644 --- a/tests/tcg/arm/semiconsole.c +++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c @@ -7,6 +7,8 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ =20 +#define SYS_READC 0x07 + #include #include #include "semicall.h" diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-s= emi/semihosting.c similarity index 85% rename from tests/tcg/arm/semihosting.c rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c index 33faac9916..b3fd16cd12 100644 --- a/tests/tcg/arm/semihosting.c +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c @@ -7,12 +7,15 @@ * SPDX-License-Identifier: GPL-3.0-or-later */ =20 +#define SYS_WRITE0 0x04 +#define SYS_REPORTEXC 0x18 + #include #include "semicall.h" =20 int main(int argc, char *argv[argc]) { -#if defined(__arm__) +#if UINTPTR_MAX =3D=3D UINT32_MAX uintptr_t exit_code =3D 0x20026; #else uintptr_t exit_block[2] =3D {0x20026, 0}; diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 24d75a5801..cab8c6b3a2 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -32,6 +32,9 @@ all: -include ../../../config-host.mak -include ../config-$(TARGET).mak +ifeq ($(CONFIG_USER_ONLY),y) +-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak +endif =20 # for including , in command strings COMMA :=3D , diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile= .target index bf53ad0087..56e48f4b34 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -41,24 +41,6 @@ AARCH64_TESTS +=3D mte-1 mte-2 mte-3 mte-4 mte-%: CFLAGS +=3D -march=3Darmv8.5-a+memtag endif =20 -# Semihosting smoke test for linux-user -AARCH64_TESTS +=3D semihosting -run-semihosting: semihosting - $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") - -run-plugin-semihosting-with-%: - $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ - -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ - $(call strip-plugin,$<) 2> $<.err, \ - "$< on $(TARGET_NAME) with $*") - -AARCH64_TESTS +=3D semiconsole -run-semiconsole: semiconsole - $(call skip-test, $<, "MANUAL ONLY") - -run-plugin-semiconsole-with-%: - $(call skip-test, $<, "MANUAL ONLY") - ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),) # System Registers Tests AARCH64_TESTS +=3D sysregs diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target index ec95156562..1deda384df 100644 --- a/tests/tcg/arm/Makefile.target +++ b/tests/tcg/arm/Makefile.target @@ -30,37 +30,25 @@ run-fcvt: fcvt $(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref) =20 # Semihosting smoke test for linux-user -ARM_TESTS +=3D semihosting semihosting: CFLAGS +=3D -mthumb -run-semihosting: semihosting - $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") =20 ARM_TESTS +=3D semihosting-arm semihosting-arm: CFLAGS +=3D -marm -semihosting-arm: semihosting.c - $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) =20 run-semihosting-arm: semihosting-arm $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") =20 -run-plugin-semihosting-with-%: +run-plugin-semihosting-arm-with-%: $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ $(call strip-plugin,$<) 2> $<.err, \ "$< on $(TARGET_NAME) with $*") =20 -ARM_TESTS +=3D semiconsole semiconsole-arm +ARM_TESTS +=3D semiconsole-arm =20 semiconsole: CFLAGS +=3D -mthumb -run-semiconsole: semiconsole - $(call skip-test, $<, "MANUAL ONLY") - -run-plugin-semiconsole-with-%: - $(call skip-test, $<, "MANUAL ONLY") =20 semiconsole-arm: CFLAGS +=3D -marm -semiconsole-arm: semiconsole.c - $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) =20 run-semiconsole-arm: semiconsole-arm $(call skip-test, $<, "MANUAL ONLY") diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Make= file.target index abbdb2e126..a3a751723d 100644 --- a/tests/tcg/multiarch/Makefile.target +++ b/tests/tcg/multiarch/Makefile.target @@ -69,6 +69,37 @@ run-gdbstub-%: endif EXTRA_RUNS +=3D run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read =20 +# ARM Compatible Semi Hosting Tests +# +# Despite having ARM in the name we actually have several +# architectures that implement it. We gate the tests on the feature +# appearing in config. +# +ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y) +VPATH +=3D $(MULTIARCH_SRC)/arm-compat-semi + +# Add -I path back to TARGET_NAME for semicall.h +semihosting: CFLAGS+=3D-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME) + +run-semihosting: semihosting + $(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)") + +run-plugin-semihosting-with-%: + $(call run-test, $@, $(QEMU) $(QEMU_OPTS) \ + -plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \ + $(call strip-plugin,$<) 2> $<.err, \ + "$< on $(TARGET_NAME) with $*") + +semiconsole: CFLAGS+=3D-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME) + +run-semiconsole: semiconsole + $(call skip-test, $<, "MANUAL ONLY") + +run-plugin-semiconsole-with-%: + $(call skip-test, $<, "MANUAL ONLY") + +TESTS +=3D semihosting semiconsole +endif =20 # Update TESTS TESTS +=3D $(MULTIARCH_TESTS) --=20 2.20.1 From nobody Wed Nov 19 07:02:45 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: keithp@keithp.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From the semihosting point of view what we want to know is the current mode of the processor. Unify this into a single helper and allow us to use the same GET/SET_ARG helpers for the rest of the code. Note: we aren't currently testing riscv32 due to missing toolchain for check-tcg tests. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Keith Packard Reviewed-by: Peter Maydell --- semihosting/arm-compat-semi.c | 54 ++++++++++++----------------------- 1 file changed, 18 insertions(+), 36 deletions(-) diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 94950b6c56..733eea1e2d 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] =3D { }, }; =20 -/* Read the input value from the argument block; fail the semihosting - * call if the memory read fails. +/* + * Read the input value from the argument block; fail the semihosting + * call if the memory read fails. Eventually we could use a generic + * CPUState helper function here. */ +static inline bool is_64bit_semihosting(CPUArchState *env) +{ #ifdef TARGET_ARM + return is_a64(env); +#elif defined(TARGET_RISCV) + return !riscv_cpu_is_32bit(env); +#else +#error un-handled architecture +#endif +} + + #define GET_ARG(n) do { \ - if (is_a64(env)) { \ + if (is_64bit_semihosting(env)) { \ if (get_user_u64(arg ## n, args + (n) * 8)) { \ errno =3D EFAULT; \ - return set_swi_errno(cs, -1); \ + return set_swi_errno(cs, -1); \ } \ } else { \ if (get_user_u32(arg ## n, args + (n) * 4)) { \ @@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] =3D { } while (0) =20 #define SET_ARG(n, val) \ - (is_a64(env) ? \ + (is_64bit_semihosting(env) ? \ put_user_u64(val, args + (n) * 8) : \ put_user_u32(val, args + (n) * 4)) -#endif =20 -#ifdef TARGET_RISCV - -/* - * get_user_ual is defined as get_user_u32 in softmmu-semi.h, - * we need a macro that fetches a target_ulong - */ -#define get_user_utl(arg, p) \ - ((sizeof(target_ulong) =3D=3D 8) ? \ - get_user_u64(arg, p) : \ - get_user_u32(arg, p)) - -/* - * put_user_ual is defined as put_user_u32 in softmmu-semi.h, - * we need a macro that stores a target_ulong - */ -#define put_user_utl(arg, p) \ - ((sizeof(target_ulong) =3D=3D 8) ? \ - put_user_u64(arg, p) : \ - put_user_u32(arg, p)) - -#define GET_ARG(n) do { \ - if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \ - errno =3D EFAULT; \ - return set_swi_errno(cs, -1); \ - } \ - } while (0) - -#define SET_ARG(n, val) \ - put_user_utl(val, args + (n) * sizeof(target_ulong)) -#endif =20 /* * Do a semihosting call. --=20 2.20.1 From nobody Wed Nov 19 07:02:45 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615299802; cv=none; d=zohomail.com; s=zohoarc; b=H1VnGX8syTnwJfb0G68GuPxL4Jc2W0J5gBa7pu2Yfk4xdHrTXuQJ1g5sWyNF1wah7SbViG/LsITkZ/dHdNOhLYfkvK3nBPOnJeNieTWIDtvl0C6B1F+tOoUqC2x+7Yggdik1AlMBfplE/R4Df/qAyU9r0H5Vu4V93KHfHeROiGE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615299802; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bug 1915925 <1915925@bugs.launchpad.net>, keithp@keithp.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) As per the spec: the PARAMETER REGISTER contains the address of a pointer to a four-field data block. So we need to follow the pointer and place the results of SYS_HEAPINFO there. Bug: https://bugs.launchpad.net/bugs/1915925 Cc: Bug 1915925 <1915925@bugs.launchpad.net> Cc: Keith Packard Signed-off-by: Alex Benn=C3=A9e --- semihosting/arm-compat-semi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index 733eea1e2d..2ac9226d29 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs) retvals[2] =3D rambase + limit; /* Stack base */ retvals[3] =3D rambase; /* Stack limit. */ #endif + /* The result array is pointed to by arg0 */ + args =3D arg0; =20 for (i =3D 0; i < ARRAY_SIZE(retvals); i++) { bool fail; --=20 2.20.1 From nobody Wed Nov 19 07:02:45 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: keithp@keithp.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Query the SYS_HEAPINFO semicall and do some basic verification of the information via libc calls. Signed-off-by: Alex Benn=C3=A9e --- .../multiarch/arm-compat-semi/semihosting.c | 35 ++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/= multiarch/arm-compat-semi/semihosting.c index b3fd16cd12..5fa3c0a82d 100644 --- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c @@ -8,9 +8,16 @@ */ =20 #define SYS_WRITE0 0x04 +#define SYS_HEAPINFO 0x16 #define SYS_REPORTEXC 0x18 =20 +#define _GNU_SOURCE /* asprintf is a GNU extension */ + #include +#include +#include +#include +#include #include "semicall.h" =20 int main(int argc, char *argv[argc]) @@ -21,8 +28,34 @@ int main(int argc, char *argv[argc]) uintptr_t exit_block[2] =3D {0x20026, 0}; uintptr_t exit_code =3D (uintptr_t) &exit_block; #endif + struct { + void *heap_base; + void *heap_limit; + void *stack_base; + void *stack_limit; + } info; + void *ptr_to_info =3D (void *) &info; + char *heap_info, *stack_info; + void *brk =3D sbrk(0); + + __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n"); + + memset(&info, 0, sizeof(info)); + __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info); + + asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_lim= it); + __semi_call(SYS_WRITE0, (uintptr_t) heap_info); + if (info.heap_base !=3D brk) { + sprintf(heap_info, "heap mismatch: %p\n", brk); + __semi_call(SYS_WRITE0, (uintptr_t) heap_info); + return -1; + } + + asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack= _limit); + __semi_call(SYS_WRITE0, (uintptr_t) stack_info); + free(heap_info); + free(stack_info); =20 - __semi_call(SYS_WRITE0, (uintptr_t) "Hello World"); __semi_call(SYS_REPORTEXC, exit_code); /* if we get here we failed */ return -1; --=20 2.20.1