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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id n20sm1501466lfu.112.2021.03.08.14.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Mar 2021 14:46:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XsOQmvX4zDMuwKCNargfVKmUbdK5HcLS0RWcPOrqRvE=; b=U0Z37uOzXUyxcTDV+UdYp1Us4M2y3L5uzHm4Hc+accOzVbViK1iDSahZ159uSZrE1y qfc88xinE6bs2ABYd079a+BHlI/vLSsCqTKK+37X5PoZHow+5yK4cF092/hB1b8FxBNY KREhWMoIs8kPXm0r8IeyHbteWoJE9KOoFNTtWGWLpzSHz2FXa5ee5b1tgOEdEpi3fd8a I+ccuF+QcgAqOIWgK9nTRO+2Ct/Nymi21jhIeS7MGRdwdr+a7HJArtoLnsJcSeXLqDvY qcdvbMxkI8VPxkxr0ou8ZRqU7MeBgBO5IMFj1MuyUHjifEu3z66dPwiWMtwelK/svvP/ d+fA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XsOQmvX4zDMuwKCNargfVKmUbdK5HcLS0RWcPOrqRvE=; b=joB2sQ7ukocyl+Y/gWl9KIoRslhpZlsjKt1HHWzRjHb1cXpgK5njZePP4snmPBNuwh 9pQXUbmoiETn2nWk8+erw4HvR8LAeNXtcljdAjEX2GYac+ZnfCnkMeKG7aFtSlif/re6 Cc5BbY5JRiDNpDrlb4F8qmbiotf9U77TcQkfpkj8CKWlWmbJS5uvXk9Yil1CJ7kwNQMY v812QBr4Nf8MuxdRYHICDWuZ9gfgCbMrE0OR0ekSeTGCQYKFkutW1g3m2SYrC9I9PPfa zeu/oGfzCuVNXA2yIq+hTHUItTtLMk4hp2mnKxhXYx+zFHMyvXkPfCk42lbWi0lFdfjf FG6A== X-Gm-Message-State: AOAM533Kkx3RRS3MotJ0BeRqzQ3bGDi543qeRvNGNbdRWC4mAOTlu0lI YLQoY3JxNpl7YUfvOgKmqSXwRAJVyMnhCxrO X-Google-Smtp-Source: ABdhPJw/cUAVdkjyuetxhCaUJYOMCEyP+j4tKvphy/U8hAoIfskpo4YolzllgB8t2S9aUeq5MLImPw== X-Received: by 2002:a2e:9101:: with SMTP id m1mr15389364ljg.378.1615243600370; Mon, 08 Mar 2021 14:46:40 -0800 (PST) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Subject: [PATCH v2 2/2] hw/arm: versal: Add support for the XRAMs Date: Mon, 8 Mar 2021 23:46:37 +0100 Message-Id: <20210308224637.2949533-3-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210308224637.2949533-1-edgar.iglesias@gmail.com> References: <20210308224637.2949533-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=edgar.iglesias@gmail.com; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, sstabellini@kernel.org, joe.komlodi@xilinx.com, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, francisco.iglesias@xilinx.com, frederic.konrad@adacore.com, qemu-arm@nongnu.org, philmd@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: "Edgar E. Iglesias" Connect the support for the Versal Accelerator RAMs (XRAMs). Reviewed-by: Luc Michel Acked-by: Alistair Francis Signed-off-by: Edgar E. Iglesias --- docs/system/arm/xlnx-versal-virt.rst | 1 + include/hw/arm/xlnx-versal.h | 13 ++++++++++ hw/arm/xlnx-versal.c | 36 ++++++++++++++++++++++++++++ 3 files changed, 50 insertions(+) diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-ve= rsal-virt.rst index 2602d0f995..27f73500d9 100644 --- a/docs/system/arm/xlnx-versal-virt.rst +++ b/docs/system/arm/xlnx-versal-virt.rst @@ -30,6 +30,7 @@ Implemented devices: - 8 ADMA (Xilinx zDMA) channels - 2 SD Controllers - OCM (256KB of On Chip Memory) +- XRAM (4MB of on chip Accelerator RAM) - DDR memory =20 QEMU does not yet model any other devices, including the PL and the AI Eng= ine. diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 2b76885afd..22a8fa5d11 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -14,6 +14,7 @@ =20 #include "hw/sysbus.h" #include "hw/arm/boot.h" +#include "hw/or-irq.h" #include "hw/sd/sdhci.h" #include "hw/intc/arm_gicv3.h" #include "hw/char/pl011.h" @@ -22,6 +23,7 @@ #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "qom/object.h" #include "hw/usb/xlnx-usb-subsystem.h" +#include "hw/misc/xlnx-versal-xramc.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) @@ -31,6 +33,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) #define XLNX_VERSAL_NR_GEMS 2 #define XLNX_VERSAL_NR_ADMAS 8 #define XLNX_VERSAL_NR_SDS 2 +#define XLNX_VERSAL_NR_XRAM 4 #define XLNX_VERSAL_NR_IRQS 192 =20 struct Versal { @@ -62,6 +65,11 @@ struct Versal { XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; VersalUsb2 usb; } iou; + + struct { + qemu_or_irq irq_orgate; + XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; + } xram; } lpd; =20 /* The Platform Management Controller subsystem. */ @@ -96,6 +104,7 @@ struct Versal { #define VERSAL_GEM1_IRQ_0 58 #define VERSAL_GEM1_WAKE_IRQ_0 59 #define VERSAL_ADMA_IRQ_0 60 +#define VERSAL_XRAM_IRQ_0 79 #define VERSAL_RTC_APB_ERR_IRQ 121 #define VERSAL_SD0_IRQ_0 126 #define VERSAL_RTC_ALARM_IRQ 142 @@ -128,6 +137,10 @@ struct Versal { #define MM_OCM 0xfffc0000U #define MM_OCM_SIZE 0x40000 =20 +#define MM_XRAM 0xfe800000 +#define MM_XRAMC 0xff8e0000 +#define MM_XRAMC_SIZE 0x10000 + #define MM_USB2_CTRL_REGS 0xFF9D0000 #define MM_USB2_CTRL_REGS_SIZE 0x10000 =20 diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 628e77ef66..79609692e4 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -10,6 +10,7 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/units.h" #include "qapi/error.h" #include "qemu/log.h" #include "qemu/module.h" @@ -278,6 +279,40 @@ static void versal_create_rtc(Versal *s, qemu_irq *pic) sysbus_connect_irq(sbd, 1, pic[VERSAL_RTC_APB_ERR_IRQ]); } =20 +static void versal_create_xrams(Versal *s, qemu_irq *pic) +{ + int nr_xrams =3D ARRAY_SIZE(s->lpd.xram.ctrl); + DeviceState *orgate; + int i; + + /* XRAM IRQs get ORed into a single line. */ + object_initialize_child(OBJECT(s), "xram-irq-orgate", + &s->lpd.xram.irq_orgate, TYPE_OR_IRQ); + orgate =3D DEVICE(&s->lpd.xram.irq_orgate); + object_property_set_int(OBJECT(orgate), + "num-lines", nr_xrams, &error_fatal); + qdev_realize(orgate, NULL, &error_fatal); + qdev_connect_gpio_out(orgate, 0, pic[VERSAL_XRAM_IRQ_0]); + + for (i =3D 0; i < ARRAY_SIZE(s->lpd.xram.ctrl); i++) { + SysBusDevice *sbd; + MemoryRegion *mr; + + object_initialize_child(OBJECT(s), "xram[*]", &s->lpd.xram.ctrl[i], + TYPE_XLNX_XRAM_CTRL); + sbd =3D SYS_BUS_DEVICE(&s->lpd.xram.ctrl[i]); + sysbus_realize(sbd, &error_fatal); + + mr =3D sysbus_mmio_get_region(sbd, 0); + memory_region_add_subregion(&s->mr_ps, + MM_XRAMC + i * MM_XRAMC_SIZE, mr); + mr =3D sysbus_mmio_get_region(sbd, 1); + memory_region_add_subregion(&s->mr_ps, MM_XRAM + i * MiB, mr); + + sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(orgate, i)); + } +} + /* This takes the board allocated linear DDR memory and creates aliases * for each split DDR range/aperture on the Versal address map. */ @@ -363,6 +398,7 @@ static void versal_realize(DeviceState *dev, Error **er= rp) versal_create_admas(s, pic); versal_create_sds(s, pic); versal_create_rtc(s, pic); + versal_create_xrams(s, pic); versal_map_ddr(s); versal_unimp(s); =20 --=20 2.25.1