From nobody Tue Apr 15 10:57:14 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1615226498; cv=none; d=zohomail.com; s=zohoarc; b=JJJhSYgqyowVLUw7Z624t4uYPBPYZ/QjX4VlbYUHDOPNMrNnEROaqoIkWrnuusITixQCkyyZfqQM1gL/hRM1QBqRYUaI71a+mvVFhvsPIOROZjnMVBJ+gJXWpzrCJNDTuUxDkl7+bWwTHtURHGHqA01NxdWvoTin9bw7lRY6Ou4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615226498; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=CW67RL7MAXwimKNWbbCbBTVvZryk82Cn32HWgzzhjoQ=; b=KeRATbs/0LhEQG8Q03efmQStKYAgAYMgJMOtIkaHET8sDAFleqUl0/nX8B0kObuYmimgukc5oljKhAF4raV2nRurKqYRt/jMvcXohkydi4ylT9gtwayuIgtqrc6IZaVHnPfDN2Cuyq0xNAqaFaxK8gwVZWDGJCGwWv42ZbTKvo0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1615226498531578.2910773058978; Mon, 8 Mar 2021 10:01:38 -0800 (PST) Received: from localhost ([::1]:33110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lJKCG-0005Px-VI for importer@patchew.org; Mon, 08 Mar 2021 13:01:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54104) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJJlJ-0007W5-C7 for qemu-devel@nongnu.org; Mon, 08 Mar 2021 12:33:45 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:41642) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lJJkz-0007CX-BK for qemu-devel@nongnu.org; Mon, 08 Mar 2021 12:33:45 -0500 Received: by mail-wr1-x442.google.com with SMTP id f12so12317555wrx.8 for ; Mon, 08 Mar 2021 09:33:24 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id i10sm18628217wrs.11.2021.03.08.09.33.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Mar 2021 09:33:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=CW67RL7MAXwimKNWbbCbBTVvZryk82Cn32HWgzzhjoQ=; b=PHGs0t+VcpoQg+/76W5B5eRc1eRUdVE6v/g9mJLFUmPI+L3fz9WEeR1nUA0/duWKGD UVPQZgU6fOKaRPxQdc4CfdAJnXCzORkVl7oJyF2O0jjCxbWAHQpua+4GQ/EF/c4lgbBS J0hQRBCJR8q4veiy+qH+7HTY6wNpvq+a6zel4Yk2BCjNXEeTUVt9jh4XCYUWXq3s5pxz A+oTcbrjPYLHV1MPVh54lfgcXesEichZwuP9XI1alsxZaFp2Y/L4wcckbHeL6NRZXfdo ORB5C6pIpnTmzZ6tc+GengNItK5DOyk62QzOdgVoKXLbUqZ6J+UFjWsocNFXiD0LbOoq LlWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CW67RL7MAXwimKNWbbCbBTVvZryk82Cn32HWgzzhjoQ=; b=GjX4XBMhWXtKFMpGGCLwFhD/09b4w8ZcN8kwR2laZEdqVb7lpiEJGjyRGEt8vgM2cz jRdPZamomQ3k9wP3ybUzUlXysdA+rM4SGBwyRnE47sbPfPO9nAtgcnRogtujuTPuTaWc DHYpxh4KJJJIRAI8wptqejcUKe3OicXHlZXXPW5vb4zSljL07LcTczyEc3sJ0+zTrXl9 73bduheAofia4VWY9K2d2ocw0fd6Qb+XIopkSS9+zo5t1aSLzZG/k0TMdgUQNfhDDvlu e8ebtur2XW7vIgP2t0/DiruLez+ksp42tK/Q+zaRHwbNeOTHm27TUSyEJbAurY73AxRO keRQ== X-Gm-Message-State: AOAM532sIzqcIA5evKfN4KPREZH8VP1wLVR2GmKd1TzVimCsBQ76yg6i phuAp5U/zPK6BYLQQZceIpCHeTOs+4SI1Q== X-Google-Smtp-Source: ABdhPJyB9OqdRaFrb83vLhfDTxzwLBdjym9spzcelO77OiQrK72tvgg3/IL2giRQIsBsFxAKhb6zHQ== X-Received: by 2002:adf:cd8c:: with SMTP id q12mr23540289wrj.185.1615224803895; Mon, 08 Mar 2021 09:33:23 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 51/54] hw/ssi: xilinx_spips: Clean up coding convention issues Date: Mon, 8 Mar 2021 17:32:41 +0000 Message-Id: <20210308173244.20710-52-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210308173244.20710-1-peter.maydell@linaro.org> References: <20210308173244.20710-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x442.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Xuzhou Cheng There are some coding convention warnings in xilinx_spips.c, as reported by: $ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c Let's clean them up. Signed-off-by: Xuzhou Cheng Signed-off-by: Bin Meng Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Message-id: 20210303135254.3970-5-bmeng.cn@gmail.com Signed-off-by: Peter Maydell --- hw/ssi/xilinx_spips.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index a8970346017..8a0cc22d42e 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -176,7 +176,8 @@ FIELD(GQSPI_FIFO_CTRL, GENERIC_FIFO_RESET, 0, 1) #define R_GQSPI_GFIFO_THRESH (0x150 / 4) #define R_GQSPI_DATA_STS (0x15c / 4) -/* We use the snapshot register to hold the core state for the currently +/* + * We use the snapshot register to hold the core state for the currently * or most recently executed command. So the generic fifo format is defined * for the snapshot register */ @@ -424,7 +425,8 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d) xlnx_zynqmp_qspips_update_ixr(s); } =20 -/* N way (num) in place bit striper. Lay out row wise bits (MSB to LSB) +/* + * N way (num) in place bit striper. Lay out row wise bits (MSB to LSB) * column wise (from element 0 to N-1). num is the length of x, and dir * reverses the direction of the transform. Best illustrated by example: * Each digit in the below array is a single bit (num =3D=3D 3): @@ -637,8 +639,10 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) tx_rx[i] =3D tx; } } else { - /* Extract a dummy byte and generate dummy cycles according to= the - * link state */ + /* + * Extract a dummy byte and generate dummy cycles according to= the + * link state + */ tx =3D fifo8_pop(&s->tx_fifo); dummy_cycles =3D 8 / s->link_state; } @@ -721,8 +725,9 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s) } break; case (SNOOP_ADDR): - /* Address has been transmitted, transmit dummy cycles now if - * needed */ + /* + * Address has been transmitted, transmit dummy cycles now if = needed + */ if (s->cmd_dummies < 0) { s->snoop_state =3D SNOOP_NONE; } else { @@ -876,7 +881,7 @@ static void xlnx_zynqmp_qspips_notify(void *opaque) } =20 static uint64_t xilinx_spips_read(void *opaque, hwaddr addr, - unsigned size) + unsigned size) { XilinxSPIPS *s =3D opaque; uint32_t mask =3D ~0; @@ -970,7 +975,7 @@ static uint64_t xlnx_zynqmp_qspips_read(void *opaque, } =20 static void xilinx_spips_write(void *opaque, hwaddr addr, - uint64_t value, unsigned size) + uint64_t value, unsigned size) { int mask =3D ~0; XilinxSPIPS *s =3D opaque; @@ -1072,7 +1077,7 @@ static void xilinx_qspips_write(void *opaque, hwaddr = addr, } =20 static void xlnx_zynqmp_qspips_write(void *opaque, hwaddr addr, - uint64_t value, unsigned size) + uint64_t value, unsigned size) { XlnxZynqMPQSPIPS *s =3D XLNX_ZYNQMP_QSPIPS(opaque); uint32_t reg =3D addr / 4; --=20 2.20.1