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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id i10sm18628217wrs.11.2021.03.08.09.33.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Mar 2021 09:33:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=TlkLK70vLo3e5fw7uvBkZ9GVF0hxHA2ERjrFREIYGjw=; b=lE517Rt6v7kMAItrmtQloMFdgoNweMCLj0LGuptBfHiKvOO08b71CczTjJ7xATJRGZ WlD0Go+9Pge+xJnSDFStq4CNYVPBOjtHWK+L2FIS7knJFmWvJOj6rARqArqjZYbvBrk+ ixztCEu0OwBqC6s0xUpOeMpR6s1WQ6f5cD97ikiVTv+0GcmY2jUT6eW3KHZy7OaA5RF1 NGceuD+Yc28JOkPdnT+vnjm5R9Rn57o3TGPTQe1ead/FlDOVStW6rU+KfQFhpjjG3uRZ dIH/xqGHbWRbR/GhC0pRmrAo7wFK6wXD5FTdD4MLx6GLuXu1imLc6SL20QlU9KgVSz5o iR+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TlkLK70vLo3e5fw7uvBkZ9GVF0hxHA2ERjrFREIYGjw=; b=C/PivMajcC5v2CldEHC3Edvg11X4c+I4YvVsXFhVSB3XbeQYLbuxuVymXs9sS2HTTL ma1KQwrMcPwFDahZE2ewdxsy81NNrVWhly1Xkg5N1CJbUQCchnBIwwOB8j7/HgoUTtb4 cHNlrHig9yrbIj0PldudrEzAsSFYJfu+QhxMLdu1fjHntwwFQ4eF9AUCiLdNMAlg55np D6dspXyilQRjNoFplvb5jHX+zRUplKQMlmKEX0L5Okpjv8Jt2oAab38lGhMobBbpLc0q x3PpJxRMwuCYDAFrP16J7bexSDdHxwBfh0dwJV/O3f+bOvx8IdqLkmcyWfEfERaMhDkr CHyg== X-Gm-Message-State: AOAM530y4069H67hIaB0JUntdDCoPedvGHb2ilwh2GBOE3Wp9MKoJjv5 CvxyA7RY1cD6w2Hifhemdc1hMvw/+8hIMg== X-Google-Smtp-Source: ABdhPJy+RFPmv5NHBESjOAWuaY2nN1avnxSNERfN+OKu+IwlcXyYwOz6m8IcVoszkZNaTkSeEIyeSw== X-Received: by 2002:a7b:cb04:: with SMTP id u4mr7602239wmj.122.1615224786042; Mon, 08 Mar 2021 09:33:06 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/54] hw/arm/armsse: Move s32ktimer into data-driven framework Date: Mon, 8 Mar 2021 17:32:16 +0000 Message-Id: <20210308173244.20710-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210308173244.20710-1-peter.maydell@linaro.org> References: <20210308173244.20710-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Move the CMSDK timer that uses the S32K slow clock into the data-driven device placement framework. Signed-off-by: Peter Maydell Tested-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20210219144617.4782-27-peter.maydell@linaro.org --- include/hw/arm/armsse.h | 3 +-- hw/arm/armsse.c | 31 ++++++++++++------------------- 2 files changed, 13 insertions(+), 21 deletions(-) diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 3f8f3750577..7416c08a802 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -158,8 +158,7 @@ struct ARMSSE { IoTKitSecCtl secctl; TZPPC apb_ppc[NUM_INTERNAL_PPCS]; TZMPC mpc[IOTS_NUM_MPC]; - CMSDKAPBTimer timer[2]; - CMSDKAPBTimer s32ktimer; + CMSDKAPBTimer timer[3]; qemu_or_irq ppc_irq_orgate; SplitIRQ sec_resp_splitter; SplitIRQ ppc_irq_splitter[NUM_PPCS]; diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 6540ffb919b..3270362d599 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -113,6 +113,16 @@ static const ARMSSEDeviceInfo sse200_devices[] =3D { .ppc_port =3D 1, .irq =3D 4, }, + { + .name =3D "s32ktimer", + .type =3D TYPE_CMSDK_APB_TIMER, + .index =3D 2, + .addr =3D 0x4002f000, + .ppc =3D 1, + .ppc_port =3D 0, + .irq =3D 2, + .slowclk =3D true, + }, { .name =3D "dualtimer", .type =3D TYPE_CMSDK_APB_DUALTIMER, @@ -425,8 +435,6 @@ static void armsse_init(Object *obj) g_free(name); } =20 - object_initialize_child(obj, "s32ktimer", &s->s32ktimer, - TYPE_CMSDK_APB_TIMER); object_initialize_child(obj, "armsse-sysctl", &s->sysctl, TYPE_IOTKIT_SYSCTL); object_initialize_child(obj, "armsse-sysinfo", &s->sysinfo, @@ -858,7 +866,8 @@ static void armsse_realize(DeviceState *dev, Error **er= rp) if (!strcmp(devinfo->type, TYPE_CMSDK_APB_TIMER)) { sbd =3D SYS_BUS_DEVICE(&s->timer[devinfo->index]); =20 - qdev_connect_clock_in(DEVICE(sbd), "pclk", s->mainclk); + qdev_connect_clock_in(DEVICE(sbd), "pclk", + devinfo->slowclk ? s->s32kclk : s->mainc= lk); if (!sysbus_realize(sbd, errp)) { return; } @@ -1059,25 +1068,9 @@ static void armsse_realize(DeviceState *dev, Error *= *errp) } } =20 - /* 0x40020000 .. 0x4002ffff : ARMSSE system control peripheral region = */ - /* Devices behind APB PPC1: - * 0x4002f000: S32K timer - */ - qdev_connect_clock_in(DEVICE(&s->s32ktimer), "pclk", s->s32kclk); - if (!sysbus_realize(SYS_BUS_DEVICE(&s->s32ktimer), errp)) { - return; - } - sysbus_connect_irq(SYS_BUS_DEVICE(&s->s32ktimer), 0, - armsse_get_common_irq_in(s, 2)); - mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->s32ktimer), 0); - object_property_set_link(OBJECT(&s->apb_ppc[1]), "port[0]", OBJECT(mr), - &error_abort); - if (!sysbus_realize(SYS_BUS_DEVICE(&s->apb_ppc[1]), errp)) { return; } - mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->apb_ppc[1]), 0); - memory_region_add_subregion(&s->container, 0x4002f000, mr); =20 dev_apb_ppc1 =3D DEVICE(&s->apb_ppc[1]); qdev_connect_gpio_out_named(dev_secctl, "apb_ppc1_nonsec", 0, --=20 2.20.1