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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id 1sm5150022wmj.2.2021.03.05.08.21.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EVB7ePXcQjZw4uETcObG8sFKSRsuTJl6nrIlWHavPsM=; b=aG9oVS0J+UTQN8dM4gU8J5RpHY+hYafow5pj1sGhP/3CZSOamMIXjwFo9Y6Y0xSKmQ d8gRJkMZYynh49Ms6nmbLobZU4u6Rc/R7iJrkPIyp9sTn/n3+Z6vBOeUk85Zfgr/WGF7 o8rIVRtgU7kOSGBA7/yPLazVDIqvAdo4HAd1vyBMwd8arTN4hoB7qxH2ICA2uuN1zz+n 9THqZ+LtWITJam9ORnOzrubrUpbp2ToOVI+bA13QnxsUVH8Rz8NUfVu/Nayd4hMG1YXf T03feu32pmwuuFGqf8WlCo14pnCMr+AfZMK4VJZ46PkngOplwqwdfpJp3qfjAnymVDBr VtFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=EVB7ePXcQjZw4uETcObG8sFKSRsuTJl6nrIlWHavPsM=; b=H1WzA0dr4tx6Ul9CfQz9sSbj38tBRxgvZ6mUD0jzJU9FW8cq33pOkS//0ZXohUuf7S WZf9D5Lf9m4XAdrSb6bzXSk03p+7COArHfD6u4itTe4eaAEigxeIy3fcJhNw7VUNL7Ue OAFoHEbGYIjwy0UBNi08ySiQqwsW/28JAswiBf654AGhbTvWSW6C1ndd+hRm2P17Xlm+ HKQNJszX9RSwFkur2NYZZioIZBbXfhm4+ckmFtV8CNcdxrwz3m15+ufzLyYArhzm1LJ3 1nAtuEwM4JwUL4o5qXc/ztdrTNG3jvdIvKSUkUMgC0R7abOhY+x3M5QrvqN1CZmYbooh ugJQ== X-Gm-Message-State: AOAM532YlaLEyNtVoEeYpff1NbzoOxXhA3ZDIRi07WY1ES21cXjOvRO/ 2SsfZZZlqwD97HNgNHJYBUw= X-Google-Smtp-Source: ABdhPJydriQOE7rQM05g+B3S0waULSetSM/u08Tovb1KocXPYf4PZ6z6UPytj+2SdsJPxsBB5XB3FQ== X-Received: by 2002:a1c:2b05:: with SMTP id r5mr9514534wmr.179.1614961274200; Fri, 05 Mar 2021 08:21:14 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo Subject: [PATCH 1/6] hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize() Date: Fri, 5 Mar 2021 17:21:02 +0100 Message-Id: <20210305162107.2233203-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305162107.2233203-1-f4bug@amsat.org> References: <20210305162107.2233203-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE, so initialize it before it is realized, not after. Rename the region as 'gt64120-isd' so it is clearer to realize it belongs to the GT64120 in the memory tree view. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 588e6f99301..6eb73e77057 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1196,6 +1196,14 @@ static void gt64120_reset(DeviceState *dev) gt64120_pci_mapping(s); } =20 +static void gt64120_realize(DeviceState *dev, Error **errp) +{ + GT64120State *s =3D GT64120_PCI_HOST_BRIDGE(dev); + + memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, + "gt64120-isd", 0x1000); +} + PCIBus *gt64120_register(qemu_irq *pic) { GT64120State *d; @@ -1214,8 +1222,6 @@ PCIBus *gt64120_register(qemu_irq *pic) get_system_io(), PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, - "isd-mem", 0x1000); =20 pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "gt64120_pci"); return phb->bus; @@ -1270,6 +1276,7 @@ static void gt64120_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize =3D gt64120_realize; dc->reset =3D gt64120_reset; dc->vmsd =3D &vmstate_gt64120; } --=20 2.26.2 From nobody Mon Feb 9 08:42:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.42 as permitted sender) client-ip=209.85.221.42; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-f42.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.42 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1614961280; cv=none; d=zohomail.com; s=zohoarc; b=TqJeenR4GvN/kLPo4MNL8pxVS/lX9Jn/cEAZFVHdsQQOQ0bKeEM1ZC7jPGkryOSUX2vh7VoXaZfB7VwZJwfRt+q8g8VcOcYpxsSl468CcJzPk+HVZNkQpLskyAcF++cXREY1re4hk1PsMXWP/jGw2KCxsNiQbT3rQpacqSVaIB4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614961280; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=oHlkUiMTKqyGFC2GP02dUzd7FxOeDpa/6Wguj+py0TWPVTO6GTPB5fojZnDxOPjEKgY7fpiryOg+XnGM2RqJWDOok4QLGkgbVdt+fk+KnUlJUWFNM+nf65v4+Jz/ouTlVYbRf4t2z4m0P7kE6r/Cvs5s6uzOwWLD4yjNuaOOzx8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.221.42 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by mx.zohomail.com with SMTPS id 1614961280693568.3467817122367; Fri, 5 Mar 2021 08:21:20 -0800 (PST) Received: by mail-wr1-f42.google.com with SMTP id d15so2719213wrv.5 for ; Fri, 05 Mar 2021 08:21:20 -0800 (PST) Return-Path: Return-Path: Received: from localhost.localdomain (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id h62sm5259597wmf.37.2021.03.05.08.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=t2QvGL/fUV8WMz/TEXngi7meDFvL+PTNNNLHCxnpiVfd8QksSwyKa1Nqf0amOdu/jb m1nOo3js3mwz3o6J+Wbg0cS9s9nqY086tQdc/ycdn2U0ZEmaAZ6GXNGMIux2a+jdYj5Y JR+KCgkOvsKQ9sERI59eWAImE7Y1XmE0unbaotDF7VgCejQDnvDc6mlXOsH3CCSd86IO 8tL1n+2wgLJNx+ueFR4L7a2nyKuSgJ/Uu8Jg/lo1xmXXX5P5SV7DGUSjJRoYtI4vsnD4 LNwv8AiSngBDQmsJ+bCAc9Pflv2CeysSml7B9hA0uu7ekBmmoNVWI8QcSprYbpUnkwFt 7UmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=fHShbnL609j0MJwdNHwq2VVMU06lFz5d39e3YBTfjlM=; b=IqGPP3pmk9XbBQNcmRvTbB863e8NFSjaJnSxFxzKprO40kEfxN3Ia8iM0+WwGkidcz Mz7zlqbsL8A76JIvPsGOWpRiSg9Ya8EkPIy2FZWAYVDBY/U7Ye8kJpC4lCCMGZRXMd9O /cO7RKyaMIW1xgBn9FwEMZ3a4yLpdA45SQEdQODOvTSFF3eVAPORc7DMBZ3R2c2NG34X n/45E9A8GROdYW7vuqLKqmtop6fuIatgoZFCVzXR9x0FVxYnhFX69ZecSUkPG3/NcaEp PMKRS8Jqc6OWbA7DYhFK+bpv8CXMZwZwevi6vhnsgEgsfzmBc1YHU2KwCyJb5oftZeC8 +/Mw== X-Gm-Message-State: AOAM533Hjnb0MpepmYCACe1TsiRqsoqeoJCVT45Y5N+kKtnDo4afaqnQ 9BuryyD7+pirC/rLAWWwEgmer8nSO4Y= X-Google-Smtp-Source: ABdhPJxYaYHsMWLVOa/RlkupvG2ev+qVey1GEs4vvZL/yBRPzxyLs4c70zIgsNzkwCgUiNj85MMvDg== X-Received: by 2002:adf:a406:: with SMTP id d6mr10274176wra.141.1614961278887; Fri, 05 Mar 2021 08:21:18 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo Subject: [PATCH 2/6] hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers Date: Fri, 5 Mar 2021 17:21:03 +0100 Message-Id: <20210305162107.2233203-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305162107.2233203-1-f4bug@amsat.org> References: <20210305162107.2233203-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) The ISD MemoryRegion is implemented for 32-bit accesses. Simplify it by setting the MemoryRegionOps::impl min/max access size fields. Since the region is registered with a size of 0x1000 bytes, we can remove the hwaddr mask. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 6eb73e77057..99b1690af19 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -385,13 +385,12 @@ static void gt64120_writel(void *opaque, hwaddr addr, { GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -695,9 +694,8 @@ static uint64_t gt64120_readl(void *opaque, GT64120State *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t val; - uint32_t saddr; + uint32_t saddr =3D addr >> 2; =20 - saddr =3D (addr & 0xfff) >> 2; switch (saddr) { =20 /* CPU Configuration */ @@ -976,6 +974,10 @@ static const MemoryRegionOps isd_mem_ops =3D { .read =3D gt64120_readl, .write =3D gt64120_writel, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, }; =20 static int gt64120_pci_map_irq(PCIDevice *pci_dev, int irq_num) --=20 2.26.2 From nobody Mon Feb 9 08:42:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) client-ip=209.85.128.49; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f49.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1614961285; cv=none; d=zohomail.com; s=zohoarc; b=NRbHwHGFF0oOqS03wYaKiSDAzUD9czYHYn3T9dV3mGP6mhv/fS5yh2xe7QPjNj0hUuT01IOXSWtCUgl+27hLcA7peTYDy6IeaILLjAC3NQTZsXnyDyyozhK8cYj+DOtZvUT9/heh9BkjbaagExVWTLT/sSMiRkUzAQyaCPWc60U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614961285; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; b=VE7n/cz//hDJ/jdEh9Z5kmz0i+zH7OIEyGKH2n8if8ICHTZaZkqtRm2L7OeWZIRw0gNN2vJHGGTLO3d4p5OK9VOYCvJxl7e7oU7LgFhkSeHwua1xA2YlvWc7IcBsjzTdZtWz65RRM77aV0H36IGKkFn0TYNjOz4ZQaIUepmaO+w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.49 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) by mx.zohomail.com with SMTPS id 1614961285282411.3919224155702; Fri, 5 Mar 2021 08:21:25 -0800 (PST) Received: by mail-wm1-f49.google.com with SMTP id l22so1954912wme.1 for ; Fri, 05 Mar 2021 08:21:24 -0800 (PST) Return-Path: Return-Path: Received: from localhost.localdomain (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id t14sm5422872wru.64.2021.03.05.08.21.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; b=aLJjVx8mUzS2bizwLYi+Xa6EajYA53wSDFn7GVS1jSOYnZEXDJuwUHMjoCZlCoRhRU WAXLaTTASD0vFKT29VN8G/5tpmFC1J2GcAU01HgkrcqvWqq6M7yhEdP3lLEVshneoKHQ 7H6ZZYPF9fxbna3T5X3GakxUiKmgBUkmJBnVtm3Xj86d5jcCEsPa7ueWIq4gkIPyfyI6 03DYRAwV/TJY7LuGPXeeku1d+UTnOakTS7v8jrpI7znrIcOBNENxz2MgQe7ErY5lPRjB YjkcxUl1e4Js36fUD4YtNRBeygJi8FXO22rwLwUudmQ0ATeYbl3YaWELW0Z2/m3Nxwmr RKhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=wPcnqGU4UTHM8Jk/Lrqw/LIFbJVS4CYQnfKcUElhSEw=; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Fix the following typos: - GT_PCI1_CFGDATA is not a timer register but a PCI one, - zero-padding flag is out of the format Fixes: 641ca2bfcd5 ("hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of de= bug printf()") Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 99b1690af19..8ff31380d74 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -463,7 +463,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -473,7 +473,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -515,7 +515,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented device register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -528,7 +528,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Read-only registers, do nothing */ qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Read-only register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -565,7 +565,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented DMA register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -578,7 +578,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* Not implemented */ qemu_log_mask(LOG_UNIMP, "gt64120: Unimplemented timer register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; =20 @@ -621,8 +621,8 @@ static void gt64120_writel(void *opaque, hwaddr addr, case GT_PCI1_CFGDATA: /* not implemented */ qemu_log_mask(LOG_UNIMP, - "gt64120: Unimplemented timer register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "gt64120: Unimplemented PCI register write " + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; case GT_PCI0_CFGADDR: @@ -682,7 +682,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, default: qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Illegal register write " - "reg:0x03%x size:%u value:0x%0*" PRIx64 "\n", + "reg:0x%03x size:%u value:0x%0*" PRIx64 "\n", saddr << 2, size, size << 1, val); break; } @@ -958,7 +958,7 @@ static uint64_t gt64120_readl(void *opaque, val =3D s->regs[saddr]; qemu_log_mask(LOG_GUEST_ERROR, "gt64120: Illegal register read " - "reg:0x03%x size:%u value:0x%0*x\n", + "reg:0x%03x size:%u value:0x%0*x\n", saddr << 2, size, size << 1, val); break; } --=20 2.26.2 From nobody Mon Feb 9 08:42:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.221.41 as permitted sender) client-ip=209.85.221.41; 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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id y10sm4867483wrl.19.2021.03.05.08.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kTzOWUKGqF7Ld/iGKjPTw96gS52bnIzue7kcTaEyF0A=; b=pfxbPtH/jI83c4YupKkE1LFPlUPQj+VLu0TgEbAPdZhINRU0mz+FXo69duOv8+kBew jWGZ0ZFJ1Bxw+uwrh9k+cRrKjNBEb/JL1ayRyNbvTAe9wRvTNqPge067UEnfiE+kan/U KQGxVKYVCbYrjO9mXJHS0y9Pt6VvAAgJnQN8e5DRP9cnvEJgJQXx4VJMky58xglYLsyg msPx4g2zEWYi3aeVN54ljR33q2oQeDI9kzEDBh+huApC+Py+7Uu1o1qhg5HAT4T35TQV ZwfLloRKZOhkAL21KVxwUk5idpFjT/eyZrAF+nrHZ7thzmQbYzPWMSuumjoF06vPNqPF YN6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kTzOWUKGqF7Ld/iGKjPTw96gS52bnIzue7kcTaEyF0A=; b=sJB1w9xBC4GEIay46ptWWaaMQdizml4mwOJWZ/GHKxK6+yjLDiY6r5FlCr0Oe5BRbL HhO8dNWGLAVymaVMQvfhDYzTvmb6o4IAQdqLOSpkjSVmJStaNP/+FbkihBTyOb3ti+0T n7YKpTPCam9GzySbUct9cbzCjPeVvB6ZFZTiuUKdUjX3i1DfioNJx4WW/2q6NtiAOqi9 8o5sxT+8K8wBElbTpGd03g1EqW+ob63gxPv3EvljZ1katKhMuFQJY/WUjJ9cc7AEXSOM TuibUh4D/Ig7/GTKZRUBqHGQpt98f/kEnjj0YJPaGCLW0AHQYOun3lhIjmHd6GhlQ+Rs s6lA== X-Gm-Message-State: AOAM531qQcU6BoOsAt34sL68rRBcOUy5FsrsUkLr7OkiLQtY6URImxcZ szY8qRWklRjDszvWRqXy/vc= X-Google-Smtp-Source: ABdhPJywnQJZHSShpVoh4UTDEWKmXEgQNzWV6Rp6s/JxHpStL68LkJb20dazazHeuXuB2kQc7q1Y8w== X-Received: by 2002:adf:f303:: with SMTP id i3mr10031298wro.67.1614961288160; Fri, 05 Mar 2021 08:21:28 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo Subject: [PATCH 4/6] hw/mips/gt64xxx: Rename trace events related to interrupt registers Date: Fri, 5 Mar 2021 17:21:05 +0100 Message-Id: <20210305162107.2233203-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305162107.2233203-1-f4bug@amsat.org> References: <20210305162107.2233203-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) We want to trace all register accesses. First rename the current gt64120_read / gt64120_write events with '_intreg' suffix, as they are restricted to interrupt registers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 16 ++++++++-------- hw/mips/trace-events | 4 ++-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 8ff31380d74..9a12d00d1e1 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -642,19 +642,19 @@ static void gt64120_writel(void *opaque, hwaddr addr, /* not really implemented */ s->regs[saddr] =3D ~(~(s->regs[saddr]) | ~(val & 0xfffffffe)); s->regs[saddr] |=3D !!(s->regs[saddr] & 0xfffffffe); - trace_gt64120_write("INTRCAUSE", size, val); + trace_gt64120_write_intreg("INTRCAUSE", size, val); break; case GT_INTRMASK: s->regs[saddr] =3D val & 0x3c3ffffe; - trace_gt64120_write("INTRMASK", size, val); + trace_gt64120_write_intreg("INTRMASK", size, val); break; case GT_PCI0_ICMASK: s->regs[saddr] =3D val & 0x03fffffe; - trace_gt64120_write("ICMASK", size, val); + trace_gt64120_write_intreg("ICMASK", size, val); break; case GT_PCI0_SERR0MASK: s->regs[saddr] =3D val & 0x0000003f; - trace_gt64120_write("SERR0MASK", size, val); + trace_gt64120_write_intreg("SERR0MASK", size, val); break; =20 /* Reserved when only PCI_0 is configured. */ @@ -929,19 +929,19 @@ static uint64_t gt64120_readl(void *opaque, /* Interrupts */ case GT_INTRCAUSE: val =3D s->regs[saddr]; - trace_gt64120_read("INTRCAUSE", size, val); + trace_gt64120_read_intreg("INTRCAUSE", size, val); break; case GT_INTRMASK: val =3D s->regs[saddr]; - trace_gt64120_read("INTRMASK", size, val); + trace_gt64120_read_intreg("INTRMASK", size, val); break; case GT_PCI0_ICMASK: val =3D s->regs[saddr]; - trace_gt64120_read("ICMASK", size, val); + trace_gt64120_read_intreg("ICMASK", size, val); break; case GT_PCI0_SERR0MASK: val =3D s->regs[saddr]; - trace_gt64120_read("SERR0MASK", size, val); + trace_gt64120_read_intreg("SERR0MASK", size, val); break; =20 /* Reserved when only PCI_0 is configured. */ diff --git a/hw/mips/trace-events b/hw/mips/trace-events index 915139d9811..b7e934c3933 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +1,4 @@ # gt64xxx_pci.c -gt64120_read(const char *regname, unsigned size, uint64_t value) "gt64120 = read %s size:%u value:0x%08" PRIx64 -gt64120_write(const char *regname, unsigned size, uint64_t value) "gt64120= write %s size:%u value:0x%08" PRIx64 +gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "g= t64120 read %s size:%u value:0x%08" PRIx64 +gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "= gt64120 write %s size:%u value:0x%08" PRIx64 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.26.2 From nobody Mon Feb 9 08:42:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.44 as permitted sender) client-ip=209.85.128.44; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f44.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.44 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1614961294; cv=none; d=zohomail.com; s=zohoarc; b=AjeWUrKHoq74lRG2N9wK+sR0TesA4/DnkZ1tH1zOtZuqIGV8MRKIHWRhwzN5Ho0o9m+97YSY7g0JOXPVX//V4ztFanOBNbfX/UIz9AcGj0QJlB4bu2pIzU5sLu0k8RZ5Q04Y6/psvq7n6pXvUlD6nV7ibfDZ2c330GyTrb9F89A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614961294; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=epNc8tyxbAhljB+MlNTYlLVwFVsxlh2fATKEZv1eYWt/zp3ERFVCD1NgqzLQHrBJsOT5LMdOwPI+7hV+FOIOoVewB7fsRKkWc3pt2Xbv8iWS4yCfH3QVOAFSl7ZkjVaXvCURIowadIcLM9HeVWcs9XmQZBrFlkNdbETYuV1PwUQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.44 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) by mx.zohomail.com with SMTPS id 1614961294571370.5146756959041; Fri, 5 Mar 2021 08:21:34 -0800 (PST) Received: by mail-wm1-f44.google.com with SMTP id n11-20020a05600c4f8bb029010e5cf86347so1030589wmq.1 for ; Fri, 05 Mar 2021 08:21:34 -0800 (PST) Return-Path: Return-Path: Received: from localhost.localdomain (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id f7sm5026504wmh.39.2021.03.05.08.21.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=k9/JNp+drIugeMIXMV6TMBWcQZ9odEDj5cXVzLjG4tafg9VBwnyFBQBb9WgPItNtHn qnRTcC1L1wcObVOub5enOWlcUxN3MpwP2EHW46CMJHk8l7iKVEkmb70Bcev+QqESukSJ HHNndlTtkTUi7XysWReM2yQuWni0gtNE53X+OyBd8AS2K+bQ+eiEsXTA7tdxmnirZ5xz yeKxXkulVez+c2Tj9WmgUzFEjgsFVQ8fGLsGJ1LkxCvYkJ8xQxLepx2mV3qTNSa+yO96 UdvbKw34xHrkjaRjFgnUEgHZdoVpTsbrwG+lo8Sa6/vt2hgt8Fj4HmkT/kVv9hoKzSMD Q0jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=L3v18ZL7N+cktt0efKAeS8NVT3CCQT0jjeaLH5CTmjc=; b=X8pi+xrJsF3gj+7E0xLZLWFTJb0rRqJ6fJjEGTy556hy7EtmbRN1HyPLFvJbcz1eaH Wfl72oaWJxkolF8USNR1Nr3YbyTgCeEdjA2KXRxLPrj825RzCuEIEDONL/kGP5gJiQC0 JKdRsB99efcTYxwP5jU8ureuxctBp7hLyQHbWN+j1LS8gV4t7PH6og9rKu/NNhDl4VCr XjwV79HHogI9fYDfF86vu2VbzGBEnLWWMlU9UjNrQMr/Zq/aeiIWmPctq8FVwDtRZ2pK ruemulFfTvuSt2L4q+nnanp8uDfSL/E6uuGfjiQY2DkrWRDsRcUiJR1Bss+/JIc4f7kX D6cw== X-Gm-Message-State: AOAM532hKc2RwlmHSz9k7bytfl3KAEM1SdnQGnZ3lVRx+OPAPDha1Fqx AqDW+v/z0IPfW3iO7ZCZQcg= X-Google-Smtp-Source: ABdhPJzcKBxGMWeSS8wj12nugQVqSTpzYfqURfdxUV7ksFDCHRqEJ9fWsBVmibW+1xH5QkirzO8nsA== X-Received: by 2002:a7b:cbd1:: with SMTP id n17mr3968714wmi.170.1614961292783; Fri, 05 Mar 2021 08:21:32 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo Subject: [PATCH 5/6] hw/mips/gt64xxx: Trace accesses to ISD registers Date: Fri, 5 Mar 2021 17:21:06 +0100 Message-Id: <20210305162107.2233203-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305162107.2233203-1-f4bug@amsat.org> References: <20210305162107.2233203-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Trace all accesses to Internal Space Decode (ISD) registers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 2 ++ hw/mips/trace-events | 2 ++ 2 files changed, 4 insertions(+) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 9a12d00d1e1..43349d6837d 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -387,6 +387,7 @@ static void gt64120_writel(void *opaque, hwaddr addr, PCIHostState *phb =3D PCI_HOST_BRIDGE(s); uint32_t saddr =3D addr >> 2; =20 + trace_gt64120_write(addr, val); if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } @@ -966,6 +967,7 @@ static uint64_t gt64120_readl(void *opaque, if (!(s->regs[GT_CPU] & 0x00001000)) { val =3D bswap32(val); } + trace_gt64120_read(addr, val); =20 return val; } diff --git a/hw/mips/trace-events b/hw/mips/trace-events index b7e934c3933..13ee731a488 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +1,6 @@ # gt64xxx_pci.c +gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" va= lue:0x%08" PRIx64 +gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" = value:0x%08" PRIx64 gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "g= t64120 read %s size:%u value:0x%08" PRIx64 gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "= gt64120 write %s size:%u value:0x%08" PRIx64 gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.26.2 From nobody Mon Feb 9 08:42:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of _spf.google.com designates 209.85.128.41 as permitted sender) client-ip=209.85.128.41; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-f41.google.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.41 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1614961299; cv=none; d=zohomail.com; s=zohoarc; b=f47cfu647hFSsG1c/7nfDEhvz/7js5npxj3w7Aq0VwfxGDckIjwLxxRuKGNfN7Fs3qLI7PepIMTZusQ7UNYH0OSOq3Td6mqox/kR5aK2u8RNBuZUNQ9KaFP0ti/CSaLaMaegV7ujcCIpeVaOfgQsq8b8JY7n57SnRBB64zoEgxU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614961299; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Sender:Subject:To; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=mrWdUwMtjP8mf7A1VA2EdXegK5bI5hVrdrvN48XnKyqs75QrkyNqOz4O9VVDuLdfO9PLs/TjSj1Qw5qk3lvC4FYGC5bv//xOHR6GZCilZWN2m0V+dmQbLUcPVXjDyNQOKnRJ4SdyymDQUstBxds0XAs+0vVXVjmpmcZyiKn0a7k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of _spf.google.com designates 209.85.128.41 as permitted sender) smtp.mailfrom=philippe.mathieu.daude@gmail.com Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) by mx.zohomail.com with SMTPS id 1614961299190251.1124471733251; Fri, 5 Mar 2021 08:21:39 -0800 (PST) Received: by mail-wm1-f41.google.com with SMTP id m7so1972918wmq.0 for ; Fri, 05 Mar 2021 08:21:38 -0800 (PST) Return-Path: Return-Path: Received: from localhost.localdomain (68.red-83-57-175.dynamicip.rima-tde.net. [83.57.175.68]) by smtp.gmail.com with ESMTPSA id c3sm5033116wrr.29.2021.03.05.08.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Mar 2021 08:21:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=o7MlH9Oodd972e/C8geXVcLvys+HAUlS7CXcRnu6GzIzKmbVyiLFPRroXo1dlQABUK NUcBCKHr9TfpISblbhSaNCY/fR6N2mI1OfTw8iAPhz4OUcvtsGIKAcFFhC+pS8REyHmY fDgb8U0NbpPRtNFOaICXwS32ASUGAdixoS3JHXkhzeeYVxj85clBE8BY+gyFUJ0cxfJX sb7+beLwvA8BoOQLWYcGcKyozAHbWVxbjat7AKE4Mwthtj2VMydFphcKXZNBcNjTdiYD olpoQ+4eTEMbGhy/OgDrbrEQNGzljd10uS5CnLrdLziD7vH/IQ06pjH8ZTuiudByWe9G m7Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=RFA8710d7y21V9/sjoSrymWAAotgH49b0pKscVplcYw=; b=bGcSjIlzc3WCzVxhaLPSVepyr6c6OK3Do4tummKhXu9iUs9OcIN5PyByeQqXigDIHI vrv5m/W30W5nL4N9NSZZpHiEejd8tPFJDFEaGW/G/ZNkrPo9u+WGRKxz4+YZcoJCLf4P q+TUqOwiZ64jmQN1ABnZeRcxKguWPFMHzbd2oqtMdB0C4M7UCj6dpDaKxJd0rYvfYUmX G71n4NPXskPQkbbjiIcS2nTaw96yOSimiG2jDXi3eWXvJHyYEr4S0SzvvYlnZ5QNY/nv HHhxoY7KUP8CX+A4EYlv06q2cBZrJdrCF10w3Dk95HUFJrRflv/TbjwUV4mrIQMuJi/i m59A== X-Gm-Message-State: AOAM530YvoZ0XDG3vhwyNCaASag0k7lecPK6fv2De71JGqhyHK8bw6iq 9zr7LbJaT/Qa4OB07Pw/qQs= X-Google-Smtp-Source: ABdhPJxlYv1yidtuaDF1acJQiIzyeN/7Y8hpel7K5gREIdKoxE6sGOwqOG69nLLHIGMecruNogeZMg== X-Received: by 2002:a1c:bb89:: with SMTP id l131mr9936815wmf.47.1614961297422; Fri, 05 Mar 2021 08:21:37 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo Subject: [PATCH 6/6] hw/mips/gt64xxx: Let the GT64120 manage the lower 512MiB hole Date: Fri, 5 Mar 2021 17:21:07 +0100 Message-Id: <20210305162107.2233203-7-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210305162107.2233203-1-f4bug@amsat.org> References: <20210305162107.2233203-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Per the comment in the Malta board, the [0x0000.0000-0x2000.0000] range is decoded by the GT64120, so move the "empty_slot" there. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/mips/gt64xxx_pci.c | 8 ++++++++ hw/mips/malta.c | 7 ------- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 43349d6837d..a3926e5cb8a 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -29,6 +29,7 @@ #include "hw/mips/mips.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" +#include "hw/misc/empty_slot.h" #include "hw/southbridge/piix.h" #include "migration/vmstate.h" #include "hw/intc/i8259.h" @@ -1206,6 +1207,13 @@ static void gt64120_realize(DeviceState *dev, Error = **errp) =20 memory_region_init_io(&s->ISD_mem, OBJECT(dev), &isd_mem_ops, s, "gt64120-isd", 0x1000); + + /* + * The whole address space decoded by the GT-64120A doesn't generate + * exception when accessing invalid memory. Create an empty slot to + * emulate this feature. + */ + empty_slot_init("GT64120", 0, 0x20000000); } =20 PCIBus *gt64120_register(qemu_irq *pic) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9afc0b427bf..b2469f8ee78 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -56,7 +56,6 @@ #include "sysemu/runstate.h" #include "qapi/error.h" #include "qemu/error-report.h" -#include "hw/misc/empty_slot.h" #include "sysemu/kvm.h" #include "hw/semihosting/semihost.h" #include "hw/mips/cps.h" @@ -1396,12 +1395,6 @@ void mips_malta_init(MachineState *machine) =20 /* Northbridge */ pci_bus =3D gt64120_register(s->i8259); - /* - * The whole address space decoded by the GT-64120A doesn't generate - * exception when accessing invalid memory. Create an empty slot to - * emulate this feature. - */ - empty_slot_init("GT64120", 0, 0x20000000); =20 /* Southbridge */ dev =3D piix4_create(pci_bus, &isa_bus, &smbus); --=20 2.26.2