From nobody Fri Oct 25 19:39:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1614896940; cv=none; d=zohomail.com; s=zohoarc; b=OpvWaSr1veXxu1rQYaRegTvLDRoDrq2HHY8K04ryURIB0TxST/ncch78cOEENwTfK5Uy+/QFta8HYDMSyalYMwPkguYULUPb0jleeaZqkJc4qbZf90uBY8g77bNwDvu/wLS7NfuKEbESkOXy6/Q4kciY0yqzgcsAy5m8GJSaICU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614896940; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ZzBPUa0+eSq1q8hcpO2PpYtQN152wss2JdLz1vbCwmM=; b=CPePeGL+WaY/KOerjDRK3m3NqECDreq6N7+SeeKIPgexQlJ7xcl6k9Uc1UjWRVDWq2HU7Qwy/+/jO5aburxsF3d7b5VYpM8BGPxjpiN5czgfWvxAbwBWoY+c1Cmi3AxkuzVboJ3LYK+h6Ffqq3oxYSdlcBp1w4u1C+cgk5t8HoE= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1614896940076146.82865324302247; Thu, 4 Mar 2021 14:29:00 -0800 (PST) Received: from localhost ([::1]:55752 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lHwSp-0004uy-1f for importer@patchew.org; Thu, 04 Mar 2021 17:28:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54160) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHwFN-0002Xy-7l for qemu-devel@nongnu.org; Thu, 04 Mar 2021 17:15:05 -0500 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:40310 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHwFL-0006yU-0W for qemu-devel@nongnu.org; Thu, 04 Mar 2021 17:15:04 -0500 Received: from host86-148-34-47.range86-148.btcentralplus.com ([86.148.34.47] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lHwF4-0008MJ-Qa; Thu, 04 Mar 2021 22:14:51 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, pbonzini@redhat.com, fam@euphon.net, laurent@vivier.eu Date: Thu, 4 Mar 2021 22:11:02 +0000 Message-Id: <20210304221103.6369-42-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210304221103.6369-1-mark.cave-ayland@ilande.co.uk> References: <20210304221103.6369-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 86.148.34.47 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v3 41/42] esp: implement non-DMA transfers in PDMA mode X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The MacOS toolbox ROM uses non-DMA TI commands to handle the first/last byte of an unaligned 16-bit transfer to memory. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 133 ++++++++++++++++++++++++++++++------------ include/hw/scsi/esp.h | 1 + 2 files changed, 98 insertions(+), 36 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 8a9b1500de..f828e70865 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -296,6 +296,7 @@ static void do_busid_cmd(ESPState *s, uint8_t busid) if (datalen !=3D 0) { s->rregs[ESP_RSTAT] =3D STAT_TC; s->rregs[ESP_RSEQ] =3D SEQ_CD; + s->ti_cmd =3D 0; esp_set_tc(s, 0); if (datalen > 0) { /* @@ -645,6 +646,71 @@ static void esp_do_dma(ESPState *s) esp_lower_drq(s); } =20 +static void esp_do_nodma(ESPState *s) +{ + int to_device =3D ((s->rregs[ESP_RSTAT] & 7) =3D=3D STAT_DO); + uint32_t cmdlen, n; + int len; + + if (s->do_cmd) { + cmdlen =3D fifo8_num_used(&s->cmdfifo); + trace_esp_handle_ti_cmd(cmdlen); + s->ti_size =3D 0; + if ((s->rregs[ESP_RSTAT] & 7) =3D=3D STAT_CD) { + /* No command received */ + if (s->cmdfifo_cdb_offset =3D=3D fifo8_num_used(&s->cmdfifo)) { + return; + } + + /* Command has been received */ + s->do_cmd =3D 0; + do_cmd(s); + } else { + /* + * Extra message out bytes received: update cmdfifo_cdb_offset + * and then switch to commmand phase + */ + s->cmdfifo_cdb_offset =3D fifo8_num_used(&s->cmdfifo); + s->rregs[ESP_RSTAT] =3D STAT_TC | STAT_CD; + s->rregs[ESP_RSEQ] =3D SEQ_CD; + s->rregs[ESP_RINTR] |=3D INTR_BS; + esp_raise_irq(s); + } + return; + } + + if (s->async_len =3D=3D 0) { + /* Defer until data is available. */ + return; + } + + if (to_device) { + len =3D MIN(fifo8_num_used(&s->fifo), ESP_FIFO_SZ); + memcpy(s->async_buf, fifo8_pop_buf(&s->fifo, len, &n), len); + s->async_buf +=3D len; + s->async_len -=3D len; + s->ti_size +=3D len; + } else { + len =3D MIN(s->ti_size, s->async_len); + len =3D MIN(len, fifo8_num_free(&s->fifo)); + fifo8_push_all(&s->fifo, s->async_buf, len); + s->async_buf +=3D len; + s->async_len -=3D len; + s->ti_size -=3D len; + } + + if (s->async_len =3D=3D 0) { + scsi_req_continue(s->current_req); + + if (to_device || s->ti_size =3D=3D 0) { + return; + } + } + + s->rregs[ESP_RINTR] |=3D INTR_BS; + esp_raise_irq(s); +} + void esp_command_complete(SCSIRequest *req, size_t resid) { ESPState *s =3D req->hba_private; @@ -701,56 +767,51 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len) return; } =20 - if (dmalen) { - esp_do_dma(s); - } else if (s->ti_size <=3D 0) { + if (s->ti_cmd =3D=3D 0) { /* - * If this was the last part of a DMA transfer then the - * completion interrupt is deferred to here. + * Always perform the initial transfer upon reception of the next = TI + * command to ensure the DMA/non-DMA status of the command is corr= ect. + * It is not possible to use s->dma directly in the section below = as + * some OSs send non-DMA NOP commands after a DMA transfer. Hence = if the + * async data transfer is delayed then s->dma is set incorrectly. */ - esp_dma_done(s); - esp_lower_drq(s); + return; + } + + if (s->ti_cmd & CMD_DMA) { + if (dmalen) { + esp_do_dma(s); + } else if (s->ti_size <=3D 0) { + /* + * If this was the last part of a DMA transfer then the + * completion interrupt is deferred to here. + */ + esp_dma_done(s); + esp_lower_drq(s); + } + } else { + esp_do_nodma(s); } } =20 static void handle_ti(ESPState *s) { - uint32_t dmalen, cmdlen; + uint32_t dmalen; =20 if (s->dma && !s->dma_enabled) { s->dma_cb =3D handle_ti; return; } =20 - dmalen =3D esp_get_tc(s); + s->ti_cmd =3D s->rregs[ESP_CMD]; if (s->dma) { + dmalen =3D esp_get_tc(s); trace_esp_handle_ti(dmalen); s->rregs[ESP_RSTAT] &=3D ~STAT_TC; esp_do_dma(s); - } else if (s->do_cmd) { - cmdlen =3D fifo8_num_used(&s->cmdfifo); - trace_esp_handle_ti_cmd(cmdlen); - s->ti_size =3D 0; - if ((s->rregs[ESP_RSTAT] & 7) =3D=3D STAT_CD) { - /* No command received */ - if (s->cmdfifo_cdb_offset =3D=3D fifo8_num_used(&s->cmdfifo)) { - return; - } - - /* Command has been received */ - s->do_cmd =3D 0; - do_cmd(s); - } else { - /* - * Extra message out bytes received: update cmdfifo_cdb_offset - * and then switch to commmand phase - */ - s->cmdfifo_cdb_offset =3D fifo8_num_used(&s->cmdfifo); - s->rregs[ESP_RSTAT] =3D STAT_TC | STAT_CD; - s->rregs[ESP_RSEQ] =3D SEQ_CD; - s->rregs[ESP_RINTR] |=3D INTR_BS; - esp_raise_irq(s); - } + } else { + trace_esp_handle_ti(s->ti_size); + esp_do_nodma(s); } } =20 @@ -789,12 +850,12 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) =20 switch (saddr) { case ESP_FIFO: - if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) =3D=3D 0) { + if (s->dma_memory_read && s->dma_memory_write && + (s->rregs[ESP_RSTAT] & STAT_PIO_MASK) =3D=3D 0) { /* Data out. */ qemu_log_mask(LOG_UNIMP, "esp: PIO data read not implemented\n= "); s->rregs[ESP_FIFO] =3D 0; } else { - s->ti_size--; s->rregs[ESP_FIFO] =3D esp_fifo_pop(s); } val =3D s->rregs[ESP_FIFO]; @@ -846,7 +907,6 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_= t val) if (s->do_cmd) { esp_cmdfifo_push(s, val); } else { - s->ti_size++; esp_fifo_push(s, val); } =20 @@ -1047,6 +1107,7 @@ const VMStateDescription vmstate_esp =3D { VMSTATE_UINT8_TEST(cmdfifo_cdb_offset, ESPState, esp_is_version_5), VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5), VMSTATE_FIFO8_TEST(cmdfifo, ESPState, esp_is_version_5), + VMSTATE_UINT8_TEST(ti_cmd, ESPState, esp_is_version_5), VMSTATE_END_OF_LIST() }, }; diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 2fe8d20ab5..95088490aa 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -40,6 +40,7 @@ struct ESPState { uint32_t do_cmd; =20 bool data_in_ready; + uint8_t ti_cmd; int dma_enabled; =20 uint32_t async_len; --=20 2.20.1