From nobody Fri Oct 25 19:29:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1614897314; cv=none; d=zohomail.com; s=zohoarc; b=glqBNprgmdawg6hrrVaJCJaUaLZfJj7dz89x6EPd9PFmEhLvIlGp97b89v5CBUIa+CD5khhLqSgi19ZnAZwVBdizUCKOsSEISLTxKut4VALdpYSTsMWBboFqxspLiLM1lkDZTibj5h4EJYRzbvuV6dvDwjkoPY+Udc/OYProysg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1614897314; h=Content-Type:Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=20ICr5dOG6UYlU+i/8V98y0NQ1lRneCRHNVqpgPhGm0=; b=CBqYiW4cRfsdtLWR/jKIf7axZQlhmhwwotzaSfALC6gUrDipUZpyxUyGmSiojcgmzLTzN6poWLCqTpu68nlOYRC8t3u41eus0jZuMr2Vf71X3Id1KdJlHxld8VZ5taqRsNu6BXlmabz7NWABELyYCPgG0QtoKKRAgX1sQ6ockP8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 161489731492368.88257877225738; Thu, 4 Mar 2021 14:35:14 -0800 (PST) Received: from localhost ([::1]:46558 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lHwYr-0004X7-R7 for importer@patchew.org; Thu, 04 Mar 2021 17:35:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54078) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHwF3-0001j5-Qo for qemu-devel@nongnu.org; Thu, 04 Mar 2021 17:14:45 -0500 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:40280 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHwF1-0006q6-K6 for qemu-devel@nongnu.org; Thu, 04 Mar 2021 17:14:45 -0500 Received: from host86-148-34-47.range86-148.btcentralplus.com ([86.148.34.47] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lHwEm-0008MJ-1s; Thu, 04 Mar 2021 22:14:32 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, pbonzini@redhat.com, fam@euphon.net, laurent@vivier.eu Date: Thu, 4 Mar 2021 22:10:59 +0000 Message-Id: <20210304221103.6369-39-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210304221103.6369-1-mark.cave-ayland@ilande.co.uk> References: <20210304221103.6369-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 86.148.34.47 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PATCH v3 38/42] esp: convert ti_buf from array to Fifo8 X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Rename TI_BUFSZ to ESP_FIFO_SZ since this constant is really describing the= size of the FIFO and is not directly related to the TI size. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Laurent Vivier --- hw/scsi/esp.c | 118 ++++++++++++++++++++++++++---------------- include/hw/scsi/esp.h | 8 +-- 2 files changed, 79 insertions(+), 47 deletions(-) diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 0d5c07e4c1..44e70aa789 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -98,6 +98,25 @@ void esp_request_cancelled(SCSIRequest *req) } } =20 +static void esp_fifo_push(ESPState *s, uint8_t val) +{ + if (fifo8_num_used(&s->fifo) =3D=3D ESP_FIFO_SZ) { + trace_esp_error_fifo_overrun(); + return; + } + + fifo8_push(&s->fifo, val); +} + +static uint8_t esp_fifo_pop(ESPState *s) +{ + if (fifo8_is_empty(&s->fifo)) { + return 0; + } + + return fifo8_pop(&s->fifo); +} + static uint32_t esp_get_tc(ESPState *s) { uint32_t dmalen; @@ -134,7 +153,7 @@ static uint8_t esp_pdma_read(ESPState *s) if (s->do_cmd) { val =3D s->cmdbuf[s->cmdlen++]; } else { - val =3D s->ti_buf[s->ti_rptr++]; + val =3D esp_fifo_pop(s); } =20 return val; @@ -151,7 +170,7 @@ static void esp_pdma_write(ESPState *s, uint8_t val) if (s->do_cmd) { s->cmdbuf[s->cmdlen++] =3D val; } else { - s->ti_buf[s->ti_wptr++] =3D val; + esp_fifo_push(s, val); } =20 dmalen--; @@ -165,8 +184,7 @@ static int esp_select(ESPState *s) target =3D s->wregs[ESP_WBUSID] & BUSID_DID; =20 s->ti_size =3D 0; - s->ti_rptr =3D 0; - s->ti_wptr =3D 0; + fifo8_reset(&s->fifo); =20 if (s->current_req) { /* Started a new command before the old one finished. Cancel it. = */ @@ -197,7 +215,7 @@ static int esp_select(ESPState *s) static uint32_t get_cmd(ESPState *s, uint32_t maxlen) { uint8_t *buf =3D s->cmdbuf; - uint32_t dmalen; + uint32_t dmalen, n; int target; =20 target =3D s->wregs[ESP_WBUSID] & BUSID_DID; @@ -220,7 +238,7 @@ static uint32_t get_cmd(ESPState *s, uint32_t maxlen) if (dmalen =3D=3D 0) { return 0; } - memcpy(buf, s->ti_buf, dmalen); + memcpy(buf, fifo8_pop_buf(&s->fifo, dmalen, &n), dmalen); if (dmalen >=3D 3) { buf[0] =3D buf[2] >> 5; } @@ -392,12 +410,18 @@ static void write_response_pdma_cb(ESPState *s) =20 static void write_response(ESPState *s) { + uint32_t n; + trace_esp_write_response(s->status); - s->ti_buf[0] =3D s->status; - s->ti_buf[1] =3D 0; + + fifo8_reset(&s->fifo); + esp_fifo_push(s, s->status); + esp_fifo_push(s, 0); + if (s->dma) { if (s->dma_memory_write) { - s->dma_memory_write(s->dma_opaque, s->ti_buf, 2); + s->dma_memory_write(s->dma_opaque, + (uint8_t *)fifo8_pop_buf(&s->fifo, 2, &n),= 2); s->rregs[ESP_RSTAT] =3D STAT_TC | STAT_ST; s->rregs[ESP_RINTR] |=3D INTR_BS | INTR_FC; s->rregs[ESP_RSEQ] =3D SEQ_CD; @@ -408,8 +432,6 @@ static void write_response(ESPState *s) } } else { s->ti_size =3D 2; - s->ti_rptr =3D 0; - s->ti_wptr =3D 2; s->rregs[ESP_RFLAGS] =3D 2; } esp_raise_irq(s); @@ -429,6 +451,7 @@ static void do_dma_pdma_cb(ESPState *s) { int to_device =3D ((s->rregs[ESP_RSTAT] & 7) =3D=3D STAT_DO); int len; + uint32_t n; =20 if (s->do_cmd) { s->ti_size =3D 0; @@ -441,10 +464,8 @@ static void do_dma_pdma_cb(ESPState *s) =20 if (to_device) { /* Copy FIFO data to device */ - len =3D MIN(s->ti_wptr, TI_BUFSZ); - memcpy(s->async_buf, s->ti_buf, len); - s->ti_wptr =3D 0; - s->ti_rptr =3D 0; + len =3D MIN(fifo8_num_used(&s->fifo), ESP_FIFO_SZ); + memcpy(s->async_buf, fifo8_pop_buf(&s->fifo, len, &n), len); s->async_buf +=3D len; s->async_len -=3D len; s->ti_size +=3D len; @@ -471,11 +492,8 @@ static void do_dma_pdma_cb(ESPState *s) =20 if (esp_get_tc(s) !=3D 0) { /* Copy device data to FIFO */ - s->ti_wptr =3D 0; - s->ti_rptr =3D 0; - len =3D MIN(s->async_len, TI_BUFSZ); - memcpy(s->ti_buf, s->async_buf, len); - s->ti_wptr +=3D len; + len =3D MIN(s->async_len, fifo8_num_free(&s->fifo)); + fifo8_push_all(&s->fifo, s->async_buf, len); s->async_buf +=3D len; s->async_len -=3D len; s->ti_size -=3D len; @@ -555,9 +573,8 @@ static void esp_do_dma(ESPState *s) s->dma_memory_write(s->dma_opaque, s->async_buf, len); } else { /* Copy device data to FIFO */ - len =3D MIN(len, TI_BUFSZ - s->ti_wptr); - memcpy(&s->ti_buf[s->ti_wptr], s->async_buf, len); - s->ti_wptr +=3D len; + len =3D MIN(len, fifo8_num_free(&s->fifo)); + fifo8_push_all(&s->fifo, s->async_buf, len); s->async_buf +=3D len; s->async_len -=3D len; s->ti_size -=3D len; @@ -710,8 +727,7 @@ void esp_hard_reset(ESPState *s) memset(s->wregs, 0, ESP_REGS); s->tchi_written =3D 0; s->ti_size =3D 0; - s->ti_rptr =3D 0; - s->ti_wptr =3D 0; + fifo8_reset(&s->fifo); s->dma =3D 0; s->do_cmd =3D 0; s->dma_cb =3D NULL; @@ -743,13 +759,9 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) /* Data out. */ qemu_log_mask(LOG_UNIMP, "esp: PIO data read not implemented\n= "); s->rregs[ESP_FIFO] =3D 0; - } else if (s->ti_rptr < s->ti_wptr) { + } else { s->ti_size--; - s->rregs[ESP_FIFO] =3D s->ti_buf[s->ti_rptr++]; - } - if (s->ti_rptr =3D=3D s->ti_wptr) { - s->ti_rptr =3D 0; - s->ti_wptr =3D 0; + s->rregs[ESP_FIFO] =3D esp_fifo_pop(s); } val =3D s->rregs[ESP_FIFO]; break; @@ -799,11 +811,9 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64= _t val) } else { trace_esp_error_fifo_overrun(); } - } else if (s->ti_wptr =3D=3D TI_BUFSZ - 1) { - trace_esp_error_fifo_overrun(); } else { s->ti_size++; - s->ti_buf[s->ti_wptr++] =3D val & 0xff; + esp_fifo_push(s, val); } =20 /* Non-DMA transfers raise an interrupt after every byte */ @@ -831,9 +841,7 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_= t val) break; case CMD_FLUSH: trace_esp_mem_writeb_cmd_flush(val); - /*s->ti_size =3D 0;*/ - s->ti_wptr =3D 0; - s->ti_rptr =3D 0; + fifo8_reset(&s->fifo); break; case CMD_RESET: trace_esp_mem_writeb_cmd_reset(val); @@ -951,11 +959,18 @@ static int esp_pre_save(void *opaque) static int esp_post_load(void *opaque, int version_id) { ESPState *s =3D ESP(opaque); + int len, i; =20 version_id =3D MIN(version_id, s->mig_version_id); =20 if (version_id < 5) { esp_set_tc(s, s->mig_dma_left); + + /* Migrate ti_buf to fifo */ + len =3D s->mig_ti_wptr - s->mig_ti_rptr; + for (i =3D 0; i < len; i++) { + fifo8_push(&s->fifo, s->mig_ti_buf[i]); + } } =20 s->mig_version_id =3D vmstate_esp.version_id; @@ -972,9 +987,9 @@ const VMStateDescription vmstate_esp =3D { VMSTATE_BUFFER(rregs, ESPState), VMSTATE_BUFFER(wregs, ESPState), VMSTATE_INT32(ti_size, ESPState), - VMSTATE_UINT32(ti_rptr, ESPState), - VMSTATE_UINT32(ti_wptr, ESPState), - VMSTATE_BUFFER(ti_buf, ESPState), + VMSTATE_UINT32_TEST(mig_ti_rptr, ESPState, esp_is_before_version_5= ), + VMSTATE_UINT32_TEST(mig_ti_wptr, ESPState, esp_is_before_version_5= ), + VMSTATE_BUFFER_TEST(mig_ti_buf, ESPState, esp_is_before_version_5), VMSTATE_UINT32(status, ESPState), VMSTATE_UINT32_TEST(mig_deferred_status, ESPState, esp_is_before_version_5), @@ -988,6 +1003,7 @@ const VMStateDescription vmstate_esp =3D { VMSTATE_UINT32_TEST(mig_dma_left, ESPState, esp_is_before_version_= 5), VMSTATE_BOOL_TEST(data_in_ready, ESPState, esp_is_version_5), VMSTATE_UINT8_TEST(cmdbuf_cdb_offset, ESPState, esp_is_version_5), + VMSTATE_FIFO8_TEST(fifo, ESPState, esp_is_version_5), VMSTATE_END_OF_LIST() }, }; @@ -1040,7 +1056,7 @@ static void sysbus_esp_pdma_write(void *opaque, hwadd= r addr, break; } dmalen =3D esp_get_tc(s); - if (dmalen =3D=3D 0 || (s->ti_wptr =3D=3D TI_BUFSZ)) { + if (dmalen =3D=3D 0 || fifo8_is_full(&s->fifo)) { s->pdma_cb(s); } } @@ -1063,9 +1079,7 @@ static uint64_t sysbus_esp_pdma_read(void *opaque, hw= addr addr, val =3D (val << 8) | esp_pdma_read(s); break; } - if (s->ti_rptr =3D=3D s->ti_wptr) { - s->ti_wptr =3D 0; - s->ti_rptr =3D 0; + if (fifo8_is_empty(&s->fifo)) { s->pdma_cb(s); } return val; @@ -1177,6 +1191,20 @@ static const TypeInfo sysbus_esp_info =3D { .class_init =3D sysbus_esp_class_init, }; =20 +static void esp_finalize(Object *obj) +{ + ESPState *s =3D ESP(obj); + + fifo8_destroy(&s->fifo); +} + +static void esp_init(Object *obj) +{ + ESPState *s =3D ESP(obj); + + fifo8_create(&s->fifo, ESP_FIFO_SZ); +} + static void esp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -1189,6 +1217,8 @@ static void esp_class_init(ObjectClass *klass, void *= data) static const TypeInfo esp_info =3D { .name =3D TYPE_ESP, .parent =3D TYPE_DEVICE, + .instance_init =3D esp_init, + .instance_finalize =3D esp_finalize, .instance_size =3D sizeof(ESPState), .class_init =3D esp_class_init, }; diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index f697645c05..eb4e8ba171 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -3,6 +3,7 @@ =20 #include "hw/scsi/scsi.h" #include "hw/sysbus.h" +#include "qemu/fifo8.h" #include "qom/object.h" =20 /* esp.c */ @@ -10,7 +11,7 @@ typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, uint8_t *buf, int = len); =20 #define ESP_REGS 16 -#define TI_BUFSZ 16 +#define ESP_FIFO_SZ 16 #define ESP_CMDBUF_SZ 32 =20 typedef struct ESPState ESPState; @@ -28,10 +29,9 @@ struct ESPState { uint8_t chip_id; bool tchi_written; int32_t ti_size; - uint32_t ti_rptr, ti_wptr; uint32_t status; uint32_t dma; - uint8_t ti_buf[TI_BUFSZ]; + Fifo8 fifo; SCSIBus bus; SCSIDevice *current_dev; SCSIRequest *current_req; @@ -58,6 +58,8 @@ struct ESPState { uint32_t mig_dma_left; uint32_t mig_deferred_status; bool mig_deferred_complete; + uint32_t mig_ti_rptr, mig_ti_wptr; + uint8_t mig_ti_buf[ESP_FIFO_SZ]; }; =20 #define TYPE_SYSBUS_ESP "sysbus-esp" --=20 2.20.1