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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id f16sm32652298wrt.21.2021.03.03.13.48.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 13:48:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+jPLhsEGuSQelHyPz9BxX5tZZqthgY1a40XW4S6Sd60=; b=WNdrj8dPWwqyXW7+gX3jJsKJVD1MqaTQpRYiqerhSlaYz6eqqr1PX9tsS1AVmWNsqZ YWgHUGaFCcna3vaAqyBBak7ItwX4ilmU1ns3TUvkOP+QJAE16y7b6q7F//LRZM9caE6n 3RoDZ1xhbj07vTJrlsc7gUz9REp83X1jyqxUjIWE+ONwUpOpLch9AyGe14ifqtvnPS4k VwTcTXogrH3i/bwg6xDVlOscZZGrE3ItATot/kNB0bUbHlkVhjv2avWBh5dUquBx2uPB z5Z+llvdByrPZnVSA5ZhXWG5bFEDh1d4DWws7lTsKzNhne/VQIQhlpYhhsuZw1bgn30x Jr+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=+jPLhsEGuSQelHyPz9BxX5tZZqthgY1a40XW4S6Sd60=; b=FJMg+1i3u+FNC57DQZ8W9igoufkrajw1ltz5y7Gzr1G4znA4X5I0qoP1EuPB+95XJW L48pN7df68vmm+pXvvzN7ojU2SmhqRKeQwYT4GTid5P/EsKcnfn5gHHN4BGUvVV7V+wK qQLpnToImao6WO0bmtmRt0ZFrl8UD8DOcEBziY3fZikNxR7S7IqhwGIPJBjqQBYotWcg nvERuXnmklCzXkGBlBnf36gPwqe98FoBNaEvBZEXKUdMeHkiuUJkzlQMQXt7zKlEIEmb BsVaJNxUj19Wsh6hccArZtJ4pqOY4BAQJnskA4ybrgVPgbbwWPJ5hKpJhtEge51S/HrD Sicg== X-Gm-Message-State: AOAM532LE+YD+IR93IiVoN3oYQMafmtifGPnQEvh13x23FVtDqfeSrdJ JVP4cXEvo3TVjLSCyHQsCZwDYFgj83Q= X-Google-Smtp-Source: ABdhPJzeqoIqC66Phs7TVVWlM+zEFWq9N5xg0qAHePbZ55pTvYFsMxVVPuL5zj5CVmEZa8IHflmKnQ== X-Received: by 2002:a1c:f60b:: with SMTP id w11mr882481wmc.134.1614808107729; Wed, 03 Mar 2021 13:48:27 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Claudio Fontana , qemu-arm@nongnu.org, Peter Maydell , Paolo Bonzini , Richard Henderson , qemu-s390x@nongnu.org, Thomas Huth , qemu-ppc@nongnu.org, Laurent Vivier , Cornelia Huck , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum Subject: [PATCH v4 14/28] cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps Date: Wed, 3 Mar 2021 22:46:54 +0100 Message-Id: <20210303214708.1727801-15-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303214708.1727801-1-f4bug@amsat.org> References: <20210303214708.1727801-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/core/cpu.h | 3 --- include/hw/core/sysemu-cpu-ops.h | 5 +++++ hw/core/cpu.c | 4 ++-- target/i386/cpu.c | 2 +- 4 files changed, 8 insertions(+), 6 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 9a86c707cf7..8af78cdde23 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -94,7 +94,6 @@ struct AccelCPUClass; * @dump_statistics: Callback for dumping statistics. * @get_arch_id: Callback for getting architecture-dependent CPU ID. * @get_paging_enabled: Callback for inquiring whether paging is enabled. - * @get_memory_mapping: Callback for obtaining the memory mappings. * @set_pc: Callback for setting the Program Counter register. This * should have the semantics used by the target architecture when * setting the PC from a source such as an ELF file entry point; @@ -138,8 +137,6 @@ struct CPUClass { void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); bool (*get_paging_enabled)(const CPUState *cpu); - void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, - Error **errp); void (*set_pc)(CPUState *cpu, vaddr value); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index 0c8f616a565..460e7d63b0c 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -16,6 +16,11 @@ * struct SysemuCPUOps: System operations specific to a CPU class */ typedef struct SysemuCPUOps { + /** + * @get_memory_mapping: Callback for obtaining the memory mappings. + */ + void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, + Error **errp); /** * @get_phys_page_debug: Callback for obtaining a physical address. */ diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 6932781425a..339bdfadd7a 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -83,8 +83,8 @@ void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingL= ist *list, { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 - if (cc->get_memory_mapping) { - cc->get_memory_mapping(cpu, list, errp); + if (cc->sysemu_ops->get_memory_mapping) { + cc->sysemu_ops->get_memory_mapping(cpu, list, errp); return; } =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0de4ee18bee..b2d3debd1f2 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7388,6 +7388,7 @@ static Property x86_cpu_properties[] =3D { =20 #ifndef CONFIG_USER_ONLY static const struct SysemuCPUOps i386_sysemu_ops =3D { + .get_memory_mapping =3D x86_cpu_get_memory_mapping, .get_phys_page_attrs_debug =3D x86_cpu_get_phys_page_attrs_debug, .asidx_from_attrs =3D x86_asidx_from_attrs, .get_crash_info =3D x86_cpu_get_crash_info, @@ -7431,7 +7432,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) cc->get_paging_enabled =3D x86_cpu_get_paging_enabled; =20 #ifndef CONFIG_USER_ONLY - cc->get_memory_mapping =3D x86_cpu_get_memory_mapping; cc->sysemu_ops =3D &i386_sysemu_ops; #endif /* !CONFIG_USER_ONLY */ =20 --=20 2.26.2